From 4b43f05f3c754df56e8b6f844c012efd4e51a032 Mon Sep 17 00:00:00 2001 From: Rich Felker Date: Wed, 5 Dec 2012 19:13:47 -0500 Subject: [PATCH] remove fenv saving/loading code from setjmp/longjmp on arm the issue is identical to the recent commit fixing the mips versions: despite other implementations doing this, it conflicts with the requirements of ISO C and it's a waste of time and code size. --- src/setjmp/arm/longjmp.s | 2 -- src/setjmp/arm/setjmp.s | 2 -- 2 files changed, 4 deletions(-) diff --git a/src/setjmp/arm/longjmp.s b/src/setjmp/arm/longjmp.s index 84ddc22f..aff15fbd 100644 --- a/src/setjmp/arm/longjmp.s +++ b/src/setjmp/arm/longjmp.s @@ -21,8 +21,6 @@ longjmp: 2: tst r1,#0x40 beq 2f ldc p11, cr8, [ip], #64 - ldmia ip!, {r2,r3} - mcr p10, 7, r3, cr1, cr0, 0 2: tst r1,#0x200 beq 3f ldcl p1, cr10, [ip], #8 diff --git a/src/setjmp/arm/setjmp.s b/src/setjmp/arm/setjmp.s index 904ff102..b74dfc68 100644 --- a/src/setjmp/arm/setjmp.s +++ b/src/setjmp/arm/setjmp.s @@ -23,8 +23,6 @@ setjmp: 2: tst r1,#0x40 beq 2f stc p11, cr8, [ip], #64 - mrc p10, 7, r2, cr1, cr0, 0 - stmia ip!, {r0,r2} 2: tst r1,#0x200 beq 3f stcl p1, cr10, [ip], #8