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clean up x86_64 (and x32) atomics for new atomics framework
this commit mostly makes consistent things like spacing, function ordering in atomic_arch.h, argument names, use of volatile, etc. a_ctz_l was also removed from x86_64 since atomic.h provides it automatically using a_ctz_64.
This commit is contained in:
Rich Felker
parent
e24984efd5
commit
16b55298dc
@ -1,3 +1,104 @@
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#define a_cas a_cas
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static inline int a_cas(volatile int *p, int t, int s)
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{
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__asm__ __volatile__ (
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"lock ; cmpxchg %3, %1"
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: "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
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return t;
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}
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#define a_swap a_swap
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static inline int a_swap(volatile int *p, int v)
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{
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__asm__ __volatile__(
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"xchg %0, %1"
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: "=r"(v), "=m"(*p) : "0"(v) : "memory" );
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return v;
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}
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#define a_fetch_add a_fetch_add
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static inline int a_fetch_add(volatile int *p, int v)
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{
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__asm__ __volatile__(
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"lock ; xadd %0, %1"
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: "=r"(v), "=m"(*p) : "0"(v) : "memory" );
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return v;
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}
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#define a_and a_and
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static inline void a_and(volatile int *p, int v)
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{
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__asm__ __volatile__(
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"lock ; and %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_or a_or
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static inline void a_or(volatile int *p, int v)
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{
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__asm__ __volatile__(
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"lock ; or %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_and_64 a_and_64
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static inline void a_and_64(volatile uint64_t *p, uint64_t v)
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{
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__asm__ __volatile(
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"lock ; and %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_or_64 a_or_64
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static inline void a_or_64(volatile uint64_t *p, uint64_t v)
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{
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__asm__ __volatile__(
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"lock ; or %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_inc a_inc
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static inline void a_inc(volatile int *p)
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{
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__asm__ __volatile__(
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"lock ; incl %0"
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: "=m"(*p) : "m"(*p) : "memory" );
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}
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#define a_dec a_dec
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static inline void a_dec(volatile int *p)
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{
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__asm__ __volatile__(
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"lock ; decl %0"
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: "=m"(*p) : "m"(*p) : "memory" );
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}
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#define a_store a_store
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static inline void a_store(volatile int *p, int x)
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{
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__asm__ __volatile__(
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"mov %1, %0 ; lock ; orl $0,(%%rsp)"
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: "=m"(*p) : "r"(x) : "memory" );
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}
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#define a_barrier a_barrier
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static inline void a_barrier()
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{
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__asm__ __volatile__( "" : : : "memory" );
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}
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#define a_pause a_pause
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static inline void a_spin()
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{
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__asm__ __volatile__( "pause" : : : "memory" );
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}
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#define a_crash a_crash
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static inline void a_crash()
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{
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__asm__ __volatile__( "hlt" : : : "memory" );
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}
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#define a_ctz_64 a_ctz_64
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static inline int a_ctz_64(uint64_t x)
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{
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@ -11,96 +112,3 @@ static inline int a_ctz_l(unsigned long x)
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__asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
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return x;
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}
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#define a_and_64 a_and_64
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static inline void a_and_64(volatile uint64_t *p, uint64_t v)
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{
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__asm__( "lock ; and %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_or_64 a_or_64
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static inline void a_or_64(volatile uint64_t *p, uint64_t v)
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{
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__asm__( "lock ; or %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_or_l a_or_l
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static inline void a_or_l(volatile void *p, long v)
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{
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__asm__( "lock ; or %1, %0"
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: "=m"(*(long *)p) : "r"(v) : "memory" );
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}
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#define a_cas a_cas
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static inline int a_cas(volatile int *p, int t, int s)
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{
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__asm__( "lock ; cmpxchg %3, %1"
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: "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
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return t;
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}
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#define a_or a_or
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static inline void a_or(volatile int *p, int v)
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{
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__asm__( "lock ; or %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_and a_and
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static inline void a_and(volatile int *p, int v)
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{
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__asm__( "lock ; and %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_swap a_swap
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static inline int a_swap(volatile int *x, int v)
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{
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__asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
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return v;
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}
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#define a_fetch_add a_fetch_add
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static inline int a_fetch_add(volatile int *x, int v)
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{
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__asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
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return v;
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}
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#define a_inc a_inc
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static inline void a_inc(volatile int *x)
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{
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__asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
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}
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#define a_dec a_dec
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static inline void a_dec(volatile int *x)
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{
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__asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
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}
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#define a_store a_store
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static inline void a_store(volatile int *p, int x)
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{
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__asm__( "mov %1, %0 ; lock ; orl $0,(%%rsp)" : "=m"(*p) : "r"(x) : "memory" );
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}
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#define a_spin a_spin
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static inline void a_spin()
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{
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__asm__ __volatile__( "pause" : : : "memory" );
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}
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#define a_barrier a_barrier
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static inline void a_barrier()
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{
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__asm__ __volatile__( "" : : : "memory" );
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}
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#define a_crash a_crash
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static inline void a_crash()
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{
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__asm__ __volatile__( "hlt" : : : "memory" );
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}
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@ -1,97 +1,93 @@
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#define a_ctz_64 a_ctz_64
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static inline int a_ctz_64(uint64_t x)
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#define a_cas a_cas
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static inline int a_cas(volatile int *p, int t, int s)
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{
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__asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
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return x;
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}
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#define a_and_64 a_and_64
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static inline void a_and_64(volatile uint64_t *p, uint64_t v)
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{
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__asm__( "lock ; and %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_or_64 a_or_64
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static inline void a_or_64(volatile uint64_t *p, uint64_t v)
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{
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__asm__( "lock ; or %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_or_l a_or_l
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static inline void a_or_l(volatile void *p, long v)
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{
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__asm__( "lock ; or %1, %0"
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: "=m"(*(long *)p) : "r"(v) : "memory" );
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__asm__ __volatile__ (
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"lock ; cmpxchg %3, %1"
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: "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
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return t;
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}
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#define a_cas_p a_cas_p
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static inline void *a_cas_p(volatile void *p, void *t, void *s)
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{
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__asm__( "lock ; cmpxchg %3, %1"
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: "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
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: "=a"(t), "=m"(*(void *volatile *)p)
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: "a"(t), "r"(s) : "memory" );
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return t;
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}
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#define a_cas a_cas
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static inline int a_cas(volatile int *p, int t, int s)
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#define a_swap a_swap
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static inline int a_swap(volatile int *p, int v)
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{
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__asm__( "lock ; cmpxchg %3, %1"
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: "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
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return t;
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__asm__ __volatile__(
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"xchg %0, %1"
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: "=r"(v), "=m"(*p) : "0"(v) : "memory" );
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return v;
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}
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#define a_or a_or
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static inline void a_or(volatile int *p, int v)
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#define a_fetch_add a_fetch_add
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static inline int a_fetch_add(volatile int *p, int v)
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{
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__asm__( "lock ; or %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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__asm__ __volatile__(
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"lock ; xadd %0, %1"
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: "=r"(v), "=m"(*p) : "0"(v) : "memory" );
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return v;
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}
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#define a_and a_and
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static inline void a_and(volatile int *p, int v)
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{
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__asm__( "lock ; and %1, %0"
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__asm__ __volatile__(
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"lock ; and %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_swap a_swap
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static inline int a_swap(volatile int *x, int v)
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#define a_or a_or
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static inline void a_or(volatile int *p, int v)
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{
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__asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
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return v;
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__asm__ __volatile__(
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"lock ; or %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_fetch_add a_fetch_add
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static inline int a_fetch_add(volatile int *x, int v)
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#define a_and_64 a_and_64
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static inline void a_and_64(volatile uint64_t *p, uint64_t v)
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{
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__asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
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return v;
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__asm__ __volatile(
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"lock ; and %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_or_64 a_or_64
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static inline void a_or_64(volatile uint64_t *p, uint64_t v)
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{
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__asm__ __volatile__(
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"lock ; or %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_inc a_inc
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static inline void a_inc(volatile int *x)
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static inline void a_inc(volatile int *p)
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{
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__asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
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__asm__ __volatile__(
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"lock ; incl %0"
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: "=m"(*p) : "m"(*p) : "memory" );
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}
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#define a_dec a_dec
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static inline void a_dec(volatile int *x)
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static inline void a_dec(volatile int *p)
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{
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__asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
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__asm__ __volatile__(
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"lock ; decl %0"
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: "=m"(*p) : "m"(*p) : "memory" );
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}
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#define a_store a_store
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static inline void a_store(volatile int *p, int x)
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{
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__asm__( "mov %1, %0 ; lock ; orl $0,(%%rsp)" : "=m"(*p) : "r"(x) : "memory" );
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}
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#define a_spin a_spin
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static inline void a_spin()
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{
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__asm__ __volatile__( "pause" : : : "memory" );
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__asm__ __volatile__(
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"mov %1, %0 ; lock ; orl $0,(%%rsp)"
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: "=m"(*p) : "r"(x) : "memory" );
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}
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#define a_barrier a_barrier
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@ -100,8 +96,21 @@ static inline void a_barrier()
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__asm__ __volatile__( "" : : : "memory" );
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}
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#define a_pause a_pause
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static inline void a_spin()
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{
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__asm__ __volatile__( "pause" : : : "memory" );
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}
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#define a_crash a_crash
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static inline void a_crash()
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{
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__asm__ __volatile__( "hlt" : : : "memory" );
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}
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#define a_ctz_64 a_ctz_64
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static inline int a_ctz_64(uint64_t x)
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{
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__asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
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return x;
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}
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