musl/arch/or1k/bits/stdarg.h

#define va_start(v,l)   __builtin_va_start(v,l)
#define va_end(v)       __builtin_va_end(v)
#define va_arg(v,l)     __builtin_va_arg(v,l)
#define va_copy(d,s)    __builtin_va_copy(d,s)
add or1k (OpenRISC 1000) architecture port With the exception of a fenv implementation, the port is fully featured. The port has been tested in or1ksim, the golden reference functional simulator for OpenRISC 1000. It passes all libc-test tests (except the math tests that requires a fenv implementation). The port assumes an or1k implementation that has support for atomic instructions (l.lwa/l.swa). Although it passes all the libc-test tests, the port is still in an experimental state, and has yet experienced very little 'real-world' use. 2014-07-17 19:09:10 +00:00			`#define va_start(v,l) __builtin_va_start(v,l)`
			`#define va_end(v) __builtin_va_end(v)`
			`#define va_arg(v,l) __builtin_va_arg(v,l)`
			`#define va_copy(d,s) __builtin_va_copy(d,s)`