musl/arch/aarch64/bits/hwcap.h

#define HWCAP_FP		(1 << 0)
#define HWCAP_ASIMD		(1 << 1)
#define HWCAP_EVTSTRM		(1 << 2)
#define HWCAP_AES		(1 << 3)
#define HWCAP_PMULL		(1 << 4)
#define HWCAP_SHA1		(1 << 5)
#define HWCAP_SHA2		(1 << 6)
#define HWCAP_CRC32		(1 << 7)
#define HWCAP_ATOMICS		(1 << 8)
#define HWCAP_FPHP		(1 << 9)
#define HWCAP_ASIMDHP		(1 << 10)
#define HWCAP_CPUID		(1 << 11)
#define HWCAP_ASIMDRDM		(1 << 12)
#define HWCAP_JSCVT		(1 << 13)
#define HWCAP_FCMA		(1 << 14)
#define HWCAP_LRCPC		(1 << 15)
#define HWCAP_DCPOP		(1 << 16)
#define HWCAP_SHA3		(1 << 17)
#define HWCAP_SM3		(1 << 18)
#define HWCAP_SM4		(1 << 19)
#define HWCAP_ASIMDDP		(1 << 20)
#define HWCAP_SHA512		(1 << 21)
#define HWCAP_SVE		(1 << 22)
#define HWCAP_ASIMDFHM		(1 << 23)
#define HWCAP_DIT		(1 << 24)
#define HWCAP_USCAT		(1 << 25)
#define HWCAP_ILRCPC		(1 << 26)
#define HWCAP_FLAGM		(1 << 27)
#define HWCAP_SSBS		(1 << 28)
add bits/hwcap.h and include it in sys/auxv.h aarch64, arm, mips, mips64, mipsn32, powerpc, powerpc64 and sh have cpu feature bits defined in linux for AT_HWCAP auxv entry, so expose those in sys/auxv.h it seems the mips hwcaps were never exposed to userspace neither by linux nor by glibc, but that's most likely an oversight. 2016-10-09 18:42:02 +00:00			`#define HWCAP_FP (1 << 0)`
			`#define HWCAP_ASIMD (1 << 1)`
			`#define HWCAP_EVTSTRM (1 << 2)`
			`#define HWCAP_AES (1 << 3)`
			`#define HWCAP_PMULL (1 << 4)`
			`#define HWCAP_SHA1 (1 << 5)`
			`#define HWCAP_SHA2 (1 << 6)`
			`#define HWCAP_CRC32 (1 << 7)`
			`#define HWCAP_ATOMICS (1 << 8)`
			`#define HWCAP_FPHP (1 << 9)`
			`#define HWCAP_ASIMDHP (1 << 10)`
update aarch64 hwcap.h for linux v4.11 new hwcap bits were added in kernel commits 77c97b4ee21290f5f083173d957843b615abbff2 f92f5ce01ee6a6a86cbfc4e3b0d18529c302b1ea 2017-06-17 21:23:57 +00:00			`#define HWCAP_CPUID (1 << 11)`
			`#define HWCAP_ASIMDRDM (1 << 12)`
aarch64: add new HWCAP_* flags from linux v4.12 hwcap bits for armv8.3 extensions, added in linux commits c8c3798d2369e4285da44b244638eafe446a8f8a cb567e79fa504575cb97fb2f866d2040ed1c92e7 c651aae5a7732287c1c9bc974ece4ed798780544 2017-09-09 09:13:27 +00:00			`#define HWCAP_JSCVT (1 << 13)`
			`#define HWCAP_FCMA (1 << 14)`
			`#define HWCAP_LRCPC (1 << 15)`
aarch64: add HWCAP_DCPOP from linux v4.14 indicates ARMv8.2-DCPoP persistent memory support extension. new in linux commit 7aac405ebb3224037efd56b73d82d181111cdac3 2017-11-26 23:05:45 +00:00			`#define HWCAP_DCPOP (1 << 16)`
aarch64: update hwcap.h for linux v4.15 HWCAP_SVE is new in linux commit 43994d824e8443263dc98b151e6326bf677be52e HWCAP_SHA3, HWCAP_SM3, HWCAP_SM4, HWCAP_ASIMDDP and HWCAP_SHA512 are new in f5e035f8694c3bdddc66ea46ecda965ee6853718 2018-02-02 20:46:45 +00:00			`#define HWCAP_SHA3 (1 << 17)`
			`#define HWCAP_SM3 (1 << 18)`
			`#define HWCAP_SM4 (1 << 19)`
			`#define HWCAP_ASIMDDP (1 << 20)`
			`#define HWCAP_SHA512 (1 << 21)`
			`#define HWCAP_SVE (1 << 22)`
aarch64: add HWCAP_ASIMDFHM from linux v4.16 armv8.4 fp mul instructions. added in commit 3b3b681097fae73b7f5dcdd42db6cfdf32943d4c 2018-04-28 16:29:55 +00:00			`#define HWCAP_ASIMDFHM (1 << 23)`
aarch64: add HWCAP_ flags from linux v4.17 hwcaps for armv8.4, new in linux commit 7206dc93a58fb76421c4411eefa3c003337bcb2d 2018-06-09 22:51:08 +00:00			`#define HWCAP_DIT (1 << 24)`
			`#define HWCAP_USCAT (1 << 25)`
			`#define HWCAP_ILRCPC (1 << 26)`
			`#define HWCAP_FLAGM (1 << 27)`
aarch64: add HWCAP_SSBS from linux v4.20 for armv8.5 speculative store bypass PSTATE bit support, added in linux commit d71be2b6c0e19180b5f80a6d42039cc074a693a2 2019-02-24 17:27:39 +00:00			`#define HWCAP_SSBS (1 << 28)`