musl/crt/or1k/crtn.s

.section .init
	l.lwz	r9,0(r1)
	l.jr	r9
	 l.addi	r1,r1,4

.section .fini
	l.lwz	r9,0(r1)
	l.jr	r9
	 l.addi	r1,r1,4
add or1k (OpenRISC 1000) architecture port With the exception of a fenv implementation, the port is fully featured. The port has been tested in or1ksim, the golden reference functional simulator for OpenRISC 1000. It passes all libc-test tests (except the math tests that requires a fenv implementation). The port assumes an or1k implementation that has support for atomic instructions (l.lwa/l.swa). Although it passes all the libc-test tests, the port is still in an experimental state, and has yet experienced very little 'real-world' use. 2014-07-17 19:09:10 +00:00			`.section .init`
			`l.lwz r9,0(r1)`
			`l.jr r9`
			`l.addi r1,r1,4`

			`.section .fini`
			`l.lwz r9,0(r1)`
			`l.jr r9`
			`l.addi r1,r1,4`