mirror of https://github.com/mpv-player/mpv
485 lines
13 KiB
C
485 lines
13 KiB
C
/*
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* generic alpha renderers for all YUV modes and RGB depths
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* Optimized by Nick and Michael.
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*
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* This file is part of MPlayer.
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*
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* MPlayer is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* MPlayer is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with MPlayer; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#undef PREFETCH
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#undef EMMS
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#undef PREFETCHW
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#undef PAVGB
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#if HAVE_AMD3DNOW
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#define PREFETCH "prefetch"
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#define PREFETCHW "prefetchw"
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#define PAVGB "pavgusb"
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#elif HAVE_MMX2
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#define PREFETCH "prefetchnta"
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#define PREFETCHW "prefetcht0"
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#define PAVGB "pavgb"
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#else
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#define PREFETCH " # nop"
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#define PREFETCHW " # nop"
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#endif
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#if HAVE_AMD3DNOW
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/* On K6 femms is faster of emms. On K7 femms is directly mapped on emms. */
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#define EMMS "femms"
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#else
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#define EMMS "emms"
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#endif
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static inline void RENAME(vo_draw_alpha_yv12)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
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int y;
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#if defined(FAST_OSD) && !HAVE_MMX
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w=w>>1;
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#endif
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#if HAVE_MMX
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__asm__ volatile(
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"pcmpeqb %%mm5, %%mm5\n\t" // F..F
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"movq %%mm5, %%mm4\n\t"
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"movq %%mm5, %%mm7\n\t"
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"psllw $8, %%mm5\n\t" //FF00FF00FF00
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"psrlw $8, %%mm4\n\t" //00FF00FF00FF
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::);
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#endif
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for(y=0;y<h;y++){
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register int x;
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#if HAVE_MMX
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__asm__ volatile(
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PREFETCHW" %0\n\t"
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PREFETCH" %1\n\t"
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PREFETCH" %2\n\t"
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::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
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for(x=0;x<w;x+=8){
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__asm__ volatile(
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"movl %1, %%eax\n\t"
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"orl 4%1, %%eax\n\t"
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" jz 1f\n\t"
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PREFETCHW" 32%0\n\t"
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PREFETCH" 32%1\n\t"
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PREFETCH" 32%2\n\t"
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"movq %0, %%mm0\n\t" // dstbase
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"movq %%mm0, %%mm1\n\t"
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"pand %%mm4, %%mm0\n\t" //0Y0Y0Y0Y
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"psrlw $8, %%mm1\n\t" //0Y0Y0Y0Y
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"movq %1, %%mm2\n\t" //srca HGFEDCBA
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"paddb %%mm7, %%mm2\n\t"
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"movq %%mm2, %%mm3\n\t"
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"pand %%mm4, %%mm2\n\t" //0G0E0C0A
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"psrlw $8, %%mm3\n\t" //0H0F0D0B
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"pmullw %%mm2, %%mm0\n\t"
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"pmullw %%mm3, %%mm1\n\t"
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"psrlw $8, %%mm0\n\t"
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"pand %%mm5, %%mm1\n\t"
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"por %%mm1, %%mm0\n\t"
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"paddb %2, %%mm0\n\t"
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"movq %%mm0, %0\n\t"
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"1:\n\t"
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:: "m" (dstbase[x]), "m" (srca[x]), "m" (src[x])
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: "%eax");
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}
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#else
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for(x=0;x<w;x++){
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#ifdef FAST_OSD
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if(srca[2*x+0]) dstbase[2*x+0]=src[2*x+0];
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if(srca[2*x+1]) dstbase[2*x+1]=src[2*x+1];
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#else
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if(srca[x]) dstbase[x]=((dstbase[x]*srca[x])>>8)+src[x];
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#endif
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}
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#endif
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src+=srcstride;
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srca+=srcstride;
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dstbase+=dststride;
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}
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#if HAVE_MMX
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__asm__ volatile(EMMS:::"memory");
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#endif
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return;
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}
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static inline void RENAME(vo_draw_alpha_yuy2)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
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int y;
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#if defined(FAST_OSD) && !HAVE_MMX
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w=w>>1;
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#endif
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#if HAVE_MMX
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__asm__ volatile(
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"pxor %%mm7, %%mm7\n\t"
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"pcmpeqb %%mm5, %%mm5\n\t" // F..F
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"movq %%mm5, %%mm6\n\t"
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"movq %%mm5, %%mm4\n\t"
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"psllw $8, %%mm5\n\t" //FF00FF00FF00
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"psrlw $8, %%mm4\n\t" //00FF00FF00FF
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::);
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#endif
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for(y=0;y<h;y++){
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register int x;
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#if HAVE_MMX
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__asm__ volatile(
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PREFETCHW" %0\n\t"
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PREFETCH" %1\n\t"
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PREFETCH" %2\n\t"
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::"m"(*dstbase),"m"(*srca),"m"(*src));
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for(x=0;x<w;x+=4){
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__asm__ volatile(
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"movl %1, %%eax\n\t"
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"orl %%eax, %%eax\n\t"
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" jz 1f\n\t"
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PREFETCHW" 32%0\n\t"
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PREFETCH" 32%1\n\t"
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PREFETCH" 32%2\n\t"
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"movq %0, %%mm0\n\t" // dstbase
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"movq %%mm0, %%mm1\n\t"
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"pand %%mm4, %%mm0\n\t" //0Y0Y0Y0Y
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"movd %%eax, %%mm2\n\t" //srca 0000DCBA
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"paddb %%mm6, %%mm2\n\t"
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"punpcklbw %%mm7, %%mm2\n\t" //srca 0D0C0B0A
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"pmullw %%mm2, %%mm0\n\t"
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"psrlw $8, %%mm0\n\t"
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"pand %%mm5, %%mm1\n\t" //U0V0U0V0
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"movd %2, %%mm2\n\t" //src 0000DCBA
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"punpcklbw %%mm7, %%mm2\n\t" //srca 0D0C0B0A
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"por %%mm1, %%mm0\n\t"
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"paddb %%mm2, %%mm0\n\t"
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"movq %%mm0, %0\n\t"
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"1:\n\t"
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:: "m" (dstbase[x*2]), "m" (srca[x]), "m" (src[x])
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: "%eax");
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}
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#else
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for(x=0;x<w;x++){
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#ifdef FAST_OSD
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if(srca[2*x+0]) dstbase[4*x+0]=src[2*x+0];
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if(srca[2*x+1]) dstbase[4*x+2]=src[2*x+1];
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#else
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if(srca[x]) {
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dstbase[2*x]=((dstbase[2*x]*srca[x])>>8)+src[x];
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dstbase[2*x+1]=((((signed)dstbase[2*x+1]-128)*srca[x])>>8)+128;
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}
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#endif
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}
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#endif
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src+=srcstride;
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srca+=srcstride;
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dstbase+=dststride;
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}
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#if HAVE_MMX
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__asm__ volatile(EMMS:::"memory");
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#endif
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return;
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}
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static inline void RENAME(vo_draw_alpha_uyvy)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
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int y;
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#if defined(FAST_OSD)
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w=w>>1;
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#endif
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for(y=0;y<h;y++){
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register int x;
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for(x=0;x<w;x++){
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#ifdef FAST_OSD
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if(srca[2*x+0]) dstbase[4*x+2]=src[2*x+0];
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if(srca[2*x+1]) dstbase[4*x+0]=src[2*x+1];
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#else
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if(srca[x]) {
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dstbase[2*x+1]=((dstbase[2*x+1]*srca[x])>>8)+src[x];
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dstbase[2*x]=((((signed)dstbase[2*x]-128)*srca[x])>>8)+128;
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}
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#endif
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}
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src+=srcstride;
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srca+=srcstride;
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dstbase+=dststride;
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}
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}
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static inline void RENAME(vo_draw_alpha_rgb24)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
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int y;
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#if HAVE_MMX
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__asm__ volatile(
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"pxor %%mm7, %%mm7\n\t"
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"pcmpeqb %%mm6, %%mm6\n\t" // F..F
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::);
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#endif
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for(y=0;y<h;y++){
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register unsigned char *dst = dstbase;
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register int x;
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#if ARCH_X86 && (!ARCH_X86_64 || HAVE_MMX)
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#if HAVE_MMX
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__asm__ volatile(
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PREFETCHW" %0\n\t"
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PREFETCH" %1\n\t"
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PREFETCH" %2\n\t"
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::"m"(*dst),"m"(*srca),"m"(*src):"memory");
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for(x=0;x<w;x+=2){
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if(srca[x] || srca[x+1])
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__asm__ volatile(
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PREFETCHW" 32%0\n\t"
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PREFETCH" 32%1\n\t"
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PREFETCH" 32%2\n\t"
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"movq %0, %%mm0\n\t" // dstbase
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"movq %%mm0, %%mm1\n\t"
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"movq %%mm0, %%mm5\n\t"
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"punpcklbw %%mm7, %%mm0\n\t"
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"punpckhbw %%mm7, %%mm1\n\t"
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"movd %1, %%mm2\n\t" // srca ABCD0000
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"paddb %%mm6, %%mm2\n\t"
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"punpcklbw %%mm2, %%mm2\n\t" // srca AABBCCDD
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"punpcklbw %%mm2, %%mm2\n\t" // srca AAAABBBB
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"psrlq $8, %%mm2\n\t" // srca AAABBBB0
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"movq %%mm2, %%mm3\n\t"
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"punpcklbw %%mm7, %%mm2\n\t" // srca 0A0A0A0B
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"punpckhbw %%mm7, %%mm3\n\t" // srca 0B0B0B00
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"pmullw %%mm2, %%mm0\n\t"
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"pmullw %%mm3, %%mm1\n\t"
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"psrlw $8, %%mm0\n\t"
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"psrlw $8, %%mm1\n\t"
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"packuswb %%mm1, %%mm0\n\t"
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"movd %2, %%mm2 \n\t" // src ABCD0000
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"punpcklbw %%mm2, %%mm2\n\t" // src AABBCCDD
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"punpcklbw %%mm2, %%mm2\n\t" // src AAAABBBB
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"psrlq $8, %%mm2\n\t" // src AAABBBB0
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"paddb %%mm2, %%mm0\n\t"
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"pand %4, %%mm5\n\t"
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"pand %3, %%mm0\n\t"
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"por %%mm0, %%mm5\n\t"
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"movq %%mm5, %0\n\t"
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:: "m" (dst[0]), "m" (srca[x]), "m" (src[x]), "m"(mask24hl), "m"(mask24lh));
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dst += 6;
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}
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#else /* HAVE_MMX */
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for(x=0;x<w;x++){
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if(srca[x]){
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__asm__ volatile(
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"movzbl (%0), %%ecx\n\t"
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"movzbl 1(%0), %%eax\n\t"
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"imull %1, %%ecx\n\t"
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"imull %1, %%eax\n\t"
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"addl %2, %%ecx\n\t"
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"addl %2, %%eax\n\t"
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"movb %%ch, (%0)\n\t"
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"movb %%ah, 1(%0)\n\t"
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"movzbl 2(%0), %%eax\n\t"
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"imull %1, %%eax\n\t"
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"addl %2, %%eax\n\t"
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"movb %%ah, 2(%0)\n\t"
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:
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:"D" (dst),
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"r" ((unsigned)srca[x]),
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"r" (((unsigned)src[x])<<8)
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:"%eax", "%ecx"
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);
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}
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dst += 3;
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}
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#endif /* !HAVE_MMX */
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#else /*non x86 arch or x86_64 with MMX disabled */
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for(x=0;x<w;x++){
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if(srca[x]){
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#ifdef FAST_OSD
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dst[0]=dst[1]=dst[2]=src[x];
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#else
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dst[0]=((dst[0]*srca[x])>>8)+src[x];
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dst[1]=((dst[1]*srca[x])>>8)+src[x];
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dst[2]=((dst[2]*srca[x])>>8)+src[x];
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#endif
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}
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dst+=3; // 24bpp
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}
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#endif /* arch_x86 */
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src+=srcstride;
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srca+=srcstride;
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dstbase+=dststride;
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}
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#if HAVE_MMX
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__asm__ volatile(EMMS:::"memory");
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#endif
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return;
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}
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static inline void RENAME(vo_draw_alpha_rgb32)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
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int y;
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#if HAVE_BIGENDIAN
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dstbase++;
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#endif
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#if HAVE_MMX
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#if HAVE_AMD3DNOW
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__asm__ volatile(
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"pxor %%mm7, %%mm7\n\t"
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"pcmpeqb %%mm6, %%mm6\n\t" // F..F
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::);
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#else /* HAVE_AMD3DNOW */
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__asm__ volatile(
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"pxor %%mm7, %%mm7\n\t"
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"pcmpeqb %%mm5, %%mm5\n\t" // F..F
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"movq %%mm5, %%mm4\n\t"
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"psllw $8, %%mm5\n\t" //FF00FF00FF00
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"psrlw $8, %%mm4\n\t" //00FF00FF00FF
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::);
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#endif /* HAVE_AMD3DNOW */
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#endif /* HAVE_MMX */
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for(y=0;y<h;y++){
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register int x;
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#if ARCH_X86 && (!ARCH_X86_64 || HAVE_MMX)
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#if HAVE_MMX
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#if HAVE_AMD3DNOW
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__asm__ volatile(
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PREFETCHW" %0\n\t"
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PREFETCH" %1\n\t"
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PREFETCH" %2\n\t"
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::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
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for(x=0;x<w;x+=2){
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if(srca[x] || srca[x+1])
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__asm__ volatile(
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PREFETCHW" 32%0\n\t"
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PREFETCH" 32%1\n\t"
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PREFETCH" 32%2\n\t"
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"movq %0, %%mm0\n\t" // dstbase
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"movq %%mm0, %%mm1\n\t"
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"punpcklbw %%mm7, %%mm0\n\t"
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"punpckhbw %%mm7, %%mm1\n\t"
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"movd %1, %%mm2\n\t" // srca ABCD0000
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"paddb %%mm6, %%mm2\n\t"
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"punpcklbw %%mm2, %%mm2\n\t" // srca AABBCCDD
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"punpcklbw %%mm2, %%mm2\n\t" // srca AAAABBBB
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"movq %%mm2, %%mm3\n\t"
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"punpcklbw %%mm7, %%mm2\n\t" // srca 0A0A0A0A
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"punpckhbw %%mm7, %%mm3\n\t" // srca 0B0B0B0B
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"pmullw %%mm2, %%mm0\n\t"
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"pmullw %%mm3, %%mm1\n\t"
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"psrlw $8, %%mm0\n\t"
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"psrlw $8, %%mm1\n\t"
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"packuswb %%mm1, %%mm0\n\t"
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"movd %2, %%mm2 \n\t" // src ABCD0000
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"punpcklbw %%mm2, %%mm2\n\t" // src AABBCCDD
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"punpcklbw %%mm2, %%mm2\n\t" // src AAAABBBB
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"paddb %%mm2, %%mm0\n\t"
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"movq %%mm0, %0\n\t"
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:: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x]));
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}
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#else //this is faster for intels crap
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__asm__ volatile(
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PREFETCHW" %0\n\t"
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PREFETCH" %1\n\t"
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PREFETCH" %2\n\t"
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::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
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for(x=0;x<w;x+=4){
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__asm__ volatile(
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"movl %1, %%eax\n\t"
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"orl %%eax, %%eax\n\t"
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" jz 1f\n\t"
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PREFETCHW" 32%0\n\t"
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PREFETCH" 32%1\n\t"
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PREFETCH" 32%2\n\t"
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"movq %0, %%mm0\n\t" // dstbase
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"movq %%mm0, %%mm1\n\t"
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"pand %%mm4, %%mm0\n\t" //0R0B0R0B
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"psrlw $8, %%mm1\n\t" //0?0G0?0G
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"movd %%eax, %%mm2\n\t" //srca 0000DCBA
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"paddb %3, %%mm2\n\t"
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"punpcklbw %%mm2, %%mm2\n\t" //srca DDCCBBAA
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"movq %%mm2, %%mm3\n\t"
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"punpcklbw %%mm7, %%mm2\n\t" //srca 0B0B0A0A
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"pmullw %%mm2, %%mm0\n\t"
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"pmullw %%mm2, %%mm1\n\t"
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"psrlw $8, %%mm0\n\t"
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"pand %%mm5, %%mm1\n\t"
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"por %%mm1, %%mm0\n\t"
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"movd %2, %%mm2 \n\t" //src 0000DCBA
|
|
"punpcklbw %%mm2, %%mm2\n\t" //src DDCCBBAA
|
|
"movq %%mm2, %%mm6\n\t"
|
|
"punpcklbw %%mm2, %%mm2\n\t" //src BBBBAAAA
|
|
"paddb %%mm2, %%mm0\n\t"
|
|
"movq %%mm0, %0\n\t"
|
|
|
|
"movq 8%0, %%mm0\n\t" // dstbase
|
|
"movq %%mm0, %%mm1\n\t"
|
|
"pand %%mm4, %%mm0\n\t" //0R0B0R0B
|
|
"psrlw $8, %%mm1\n\t" //0?0G0?0G
|
|
"punpckhbw %%mm7, %%mm3\n\t" //srca 0D0D0C0C
|
|
"pmullw %%mm3, %%mm0\n\t"
|
|
"pmullw %%mm3, %%mm1\n\t"
|
|
"psrlw $8, %%mm0\n\t"
|
|
"pand %%mm5, %%mm1\n\t"
|
|
"por %%mm1, %%mm0\n\t"
|
|
"punpckhbw %%mm6, %%mm6\n\t" //src DDDDCCCC
|
|
"paddb %%mm6, %%mm0\n\t"
|
|
"movq %%mm0, 8%0\n\t"
|
|
"1:\n\t"
|
|
:: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x]), "m" (bFF)
|
|
: "%eax");
|
|
}
|
|
#endif
|
|
#else /* HAVE_MMX */
|
|
for(x=0;x<w;x++){
|
|
if(srca[x]){
|
|
__asm__ volatile(
|
|
"movzbl (%0), %%ecx\n\t"
|
|
"movzbl 1(%0), %%eax\n\t"
|
|
"movzbl 2(%0), %%edx\n\t"
|
|
|
|
"imull %1, %%ecx\n\t"
|
|
"imull %1, %%eax\n\t"
|
|
"imull %1, %%edx\n\t"
|
|
|
|
"addl %2, %%ecx\n\t"
|
|
"addl %2, %%eax\n\t"
|
|
"addl %2, %%edx\n\t"
|
|
|
|
"movb %%ch, (%0)\n\t"
|
|
"movb %%ah, 1(%0)\n\t"
|
|
"movb %%dh, 2(%0)\n\t"
|
|
|
|
:
|
|
:"r" (&dstbase[4*x]),
|
|
"r" ((unsigned)srca[x]),
|
|
"r" (((unsigned)src[x])<<8)
|
|
:"%eax", "%ecx", "%edx"
|
|
);
|
|
}
|
|
}
|
|
#endif /* HAVE_MMX */
|
|
#else /*non x86 arch or x86_64 with MMX disabled */
|
|
for(x=0;x<w;x++){
|
|
if(srca[x]){
|
|
#ifdef FAST_OSD
|
|
dstbase[4*x+0]=dstbase[4*x+1]=dstbase[4*x+2]=src[x];
|
|
#else
|
|
dstbase[4*x+0]=((dstbase[4*x+0]*srca[x])>>8)+src[x];
|
|
dstbase[4*x+1]=((dstbase[4*x+1]*srca[x])>>8)+src[x];
|
|
dstbase[4*x+2]=((dstbase[4*x+2]*srca[x])>>8)+src[x];
|
|
#endif
|
|
}
|
|
}
|
|
#endif /* arch_x86 */
|
|
src+=srcstride;
|
|
srca+=srcstride;
|
|
dstbase+=dststride;
|
|
}
|
|
#if HAVE_MMX
|
|
__asm__ volatile(EMMS:::"memory");
|
|
#endif
|
|
return;
|
|
}
|