mirror of
https://github.com/mpv-player/mpv
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7ff83a7181
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@9381 b3059339-0415-0410-9bf9-f77b7e298cf2
913 lines
17 KiB
C
913 lines
17 KiB
C
/*
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Linux Real Mode Interface - A library of DPMI-like functions for Linux.
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Copyright (C) 1998 by Josh Vanderhoof
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You are free to distribute and modify this file, as long as you
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do not remove this copyright notice and clearly label modified
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versions as being modified.
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This software has NO WARRANTY. Use it at your own risk.
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Original location: http://cvs.debian.org/lrmi/
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*/
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#include <stdio.h>
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#include <string.h>
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#include <sys/io.h>
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#include <asm/vm86.h>
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#ifdef USE_LIBC_VM86
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#include <sys/vm86.h>
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#endif
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include "lrmi.h"
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#define REAL_MEM_BASE ((void *)0x10000)
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#define REAL_MEM_SIZE 0x10000
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#define REAL_MEM_BLOCKS 0x100
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struct mem_block
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{
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unsigned int size : 20;
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unsigned int free : 1;
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};
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static struct
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{
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int ready;
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int count;
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struct mem_block blocks[REAL_MEM_BLOCKS];
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} mem_info = { 0 };
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static int
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real_mem_init(void)
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{
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void *m;
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int fd_zero;
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if (mem_info.ready)
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return 1;
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fd_zero = open("/dev/zero", O_RDONLY);
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if (fd_zero == -1)
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{
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perror("open /dev/zero");
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return 0;
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}
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m = mmap((void *)REAL_MEM_BASE, REAL_MEM_SIZE,
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PROT_READ | PROT_WRITE | PROT_EXEC,
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MAP_FIXED | MAP_PRIVATE, fd_zero, 0);
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if (m == (void *)-1)
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{
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perror("mmap /dev/zero");
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close(fd_zero);
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return 0;
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}
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mem_info.ready = 1;
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mem_info.count = 1;
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mem_info.blocks[0].size = REAL_MEM_SIZE;
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mem_info.blocks[0].free = 1;
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return 1;
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}
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static void
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insert_block(int i)
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{
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memmove(
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mem_info.blocks + i + 1,
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mem_info.blocks + i,
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(mem_info.count - i) * sizeof(struct mem_block));
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mem_info.count++;
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}
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static void
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delete_block(int i)
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{
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mem_info.count--;
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memmove(
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mem_info.blocks + i,
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mem_info.blocks + i + 1,
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(mem_info.count - i) * sizeof(struct mem_block));
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}
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void *
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LRMI_alloc_real(int size)
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{
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int i;
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char *r = (char *)REAL_MEM_BASE;
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if (!mem_info.ready)
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return NULL;
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if (mem_info.count == REAL_MEM_BLOCKS)
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return NULL;
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size = (size + 15) & ~15;
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for (i = 0; i < mem_info.count; i++)
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{
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if (mem_info.blocks[i].free && size < mem_info.blocks[i].size)
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{
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insert_block(i);
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mem_info.blocks[i].size = size;
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mem_info.blocks[i].free = 0;
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mem_info.blocks[i + 1].size -= size;
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return (void *)r;
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}
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r += mem_info.blocks[i].size;
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}
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return NULL;
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}
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void
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LRMI_free_real(void *m)
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{
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int i;
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char *r = (char *)REAL_MEM_BASE;
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if (!mem_info.ready)
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return;
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i = 0;
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while (m != (void *)r)
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{
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r += mem_info.blocks[i].size;
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i++;
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if (i == mem_info.count)
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return;
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}
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mem_info.blocks[i].free = 1;
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if (i + 1 < mem_info.count && mem_info.blocks[i + 1].free)
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{
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mem_info.blocks[i].size += mem_info.blocks[i + 1].size;
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delete_block(i + 1);
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}
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if (i - 1 >= 0 && mem_info.blocks[i - 1].free)
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{
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mem_info.blocks[i - 1].size += mem_info.blocks[i].size;
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delete_block(i);
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}
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}
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#define DEFAULT_VM86_FLAGS (IF_MASK | IOPL_MASK)
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#define DEFAULT_STACK_SIZE 0x1000
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#define RETURN_TO_32_INT 255
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static struct
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{
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int ready;
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unsigned short ret_seg, ret_off;
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unsigned short stack_seg, stack_off;
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struct vm86_struct vm;
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} context = { 0 };
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static inline void
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set_bit(unsigned int bit, void *array)
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{
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unsigned char *a = array;
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a[bit / 8] |= (1 << (bit % 8));
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}
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static inline unsigned int
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get_int_seg(int i)
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{
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return *(unsigned short *)(i * 4 + 2);
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}
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static inline unsigned int
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get_int_off(int i)
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{
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return *(unsigned short *)(i * 4);
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}
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static inline void
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pushw(unsigned short i)
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{
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struct vm86_regs *r = &context.vm.regs;
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r->esp -= 2;
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*(unsigned short *)(((unsigned int)r->ss << 4) + r->esp) = i;
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}
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int
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LRMI_init(void)
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{
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void *m;
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int fd_mem;
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if (context.ready)
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return 1;
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if (!real_mem_init())
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return 0;
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/*
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Map the Interrupt Vectors (0x0 - 0x400) + BIOS data (0x400 - 0x502)
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and the ROM (0xa0000 - 0x100000)
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*/
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fd_mem = open("/dev/mem", O_RDWR);
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if (fd_mem == -1)
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{
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perror("open /dev/mem");
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return 0;
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}
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m = mmap((void *)0, 0x502,
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PROT_READ | PROT_WRITE | PROT_EXEC,
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MAP_FIXED | MAP_PRIVATE, fd_mem, 0);
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if (m == (void *)-1)
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{
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perror("mmap /dev/mem");
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return 0;
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}
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m = mmap((void *)0xa0000, 0x100000 - 0xa0000,
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PROT_READ | PROT_WRITE,
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MAP_FIXED | MAP_SHARED, fd_mem, 0xa0000);
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if (m == (void *)-1)
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{
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perror("mmap /dev/mem");
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return 0;
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}
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/*
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Allocate a stack
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*/
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m = LRMI_alloc_real(DEFAULT_STACK_SIZE);
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context.stack_seg = (unsigned int)m >> 4;
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context.stack_off = DEFAULT_STACK_SIZE;
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/*
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Allocate the return to 32 bit routine
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*/
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m = LRMI_alloc_real(2);
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context.ret_seg = (unsigned int)m >> 4;
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context.ret_off = (unsigned int)m & 0xf;
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((unsigned char *)m)[0] = 0xcd; /* int opcode */
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((unsigned char *)m)[1] = RETURN_TO_32_INT;
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memset(&context.vm, 0, sizeof(context.vm));
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/*
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Enable kernel emulation of all ints except RETURN_TO_32_INT
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*/
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memset(&context.vm.int_revectored, 0, sizeof(context.vm.int_revectored));
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set_bit(RETURN_TO_32_INT, &context.vm.int_revectored);
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context.ready = 1;
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return 1;
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}
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static void
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set_regs(struct LRMI_regs *r)
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{
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context.vm.regs.edi = r->edi;
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context.vm.regs.esi = r->esi;
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context.vm.regs.ebp = r->ebp;
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context.vm.regs.ebx = r->ebx;
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context.vm.regs.edx = r->edx;
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context.vm.regs.ecx = r->ecx;
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context.vm.regs.eax = r->eax;
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context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
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context.vm.regs.es = r->es;
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context.vm.regs.ds = r->ds;
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context.vm.regs.fs = r->fs;
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context.vm.regs.gs = r->gs;
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}
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static void
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get_regs(struct LRMI_regs *r)
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{
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r->edi = context.vm.regs.edi;
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r->esi = context.vm.regs.esi;
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r->ebp = context.vm.regs.ebp;
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r->ebx = context.vm.regs.ebx;
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r->edx = context.vm.regs.edx;
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r->ecx = context.vm.regs.ecx;
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r->eax = context.vm.regs.eax;
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r->flags = context.vm.regs.eflags;
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r->es = context.vm.regs.es;
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r->ds = context.vm.regs.ds;
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r->fs = context.vm.regs.fs;
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r->gs = context.vm.regs.gs;
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}
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#define DIRECTION_FLAG (1 << 10)
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static void
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em_ins(int size)
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{
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unsigned int edx, edi;
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edx = context.vm.regs.edx & 0xffff;
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edi = context.vm.regs.edi & 0xffff;
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edi += (unsigned int)context.vm.regs.ds << 4;
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if (context.vm.regs.eflags & DIRECTION_FLAG)
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{
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if (size == 4)
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asm volatile ("std; insl; cld"
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: "=D" (edi) : "d" (edx), "0" (edi));
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else if (size == 2)
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asm volatile ("std; insw; cld"
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: "=D" (edi) : "d" (edx), "0" (edi));
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else
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asm volatile ("std; insb; cld"
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: "=D" (edi) : "d" (edx), "0" (edi));
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}
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else
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{
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if (size == 4)
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asm volatile ("cld; insl"
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: "=D" (edi) : "d" (edx), "0" (edi));
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else if (size == 2)
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asm volatile ("cld; insw"
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: "=D" (edi) : "d" (edx), "0" (edi));
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else
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asm volatile ("cld; insb"
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: "=D" (edi) : "d" (edx), "0" (edi));
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}
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edi -= (unsigned int)context.vm.regs.ds << 4;
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context.vm.regs.edi &= 0xffff0000;
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context.vm.regs.edi |= edi & 0xffff;
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}
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static void
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em_rep_ins(int size)
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{
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unsigned int ecx, edx, edi;
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ecx = context.vm.regs.ecx & 0xffff;
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edx = context.vm.regs.edx & 0xffff;
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edi = context.vm.regs.edi & 0xffff;
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edi += (unsigned int)context.vm.regs.ds << 4;
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if (context.vm.regs.eflags & DIRECTION_FLAG)
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{
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if (size == 4)
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asm volatile ("std; rep; insl; cld"
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: "=D" (edi), "=c" (ecx)
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: "d" (edx), "0" (edi), "1" (ecx));
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else if (size == 2)
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asm volatile ("std; rep; insw; cld"
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: "=D" (edi), "=c" (ecx)
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: "d" (edx), "0" (edi), "1" (ecx));
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else
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asm volatile ("std; rep; insb; cld"
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: "=D" (edi), "=c" (ecx)
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: "d" (edx), "0" (edi), "1" (ecx));
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}
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else
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{
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if (size == 4)
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asm volatile ("cld; rep; insl"
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: "=D" (edi), "=c" (ecx)
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: "d" (edx), "0" (edi), "1" (ecx));
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else if (size == 2)
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asm volatile ("cld; rep; insw"
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: "=D" (edi), "=c" (ecx)
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: "d" (edx), "0" (edi), "1" (ecx));
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else
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asm volatile ("cld; rep; insb"
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: "=D" (edi), "=c" (ecx)
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: "d" (edx), "0" (edi), "1" (ecx));
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}
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edi -= (unsigned int)context.vm.regs.ds << 4;
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context.vm.regs.edi &= 0xffff0000;
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context.vm.regs.edi |= edi & 0xffff;
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context.vm.regs.ecx &= 0xffff0000;
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context.vm.regs.ecx |= ecx & 0xffff;
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}
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static void
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em_outs(int size)
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{
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unsigned int edx, esi;
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edx = context.vm.regs.edx & 0xffff;
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esi = context.vm.regs.esi & 0xffff;
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esi += (unsigned int)context.vm.regs.ds << 4;
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if (context.vm.regs.eflags & DIRECTION_FLAG)
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{
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if (size == 4)
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asm volatile ("std; outsl; cld"
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: "=S" (esi) : "d" (edx), "0" (esi));
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else if (size == 2)
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asm volatile ("std; outsw; cld"
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: "=S" (esi) : "d" (edx), "0" (esi));
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else
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asm volatile ("std; outsb; cld"
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: "=S" (esi) : "d" (edx), "0" (esi));
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}
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else
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{
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if (size == 4)
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asm volatile ("cld; outsl"
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: "=S" (esi) : "d" (edx), "0" (esi));
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else if (size == 2)
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asm volatile ("cld; outsw"
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: "=S" (esi) : "d" (edx), "0" (esi));
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else
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asm volatile ("cld; outsb"
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: "=S" (esi) : "d" (edx), "0" (esi));
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}
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esi -= (unsigned int)context.vm.regs.ds << 4;
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context.vm.regs.esi &= 0xffff0000;
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context.vm.regs.esi |= esi & 0xffff;
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}
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static void
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em_rep_outs(int size)
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{
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unsigned int ecx, edx, esi;
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ecx = context.vm.regs.ecx & 0xffff;
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edx = context.vm.regs.edx & 0xffff;
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esi = context.vm.regs.esi & 0xffff;
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esi += (unsigned int)context.vm.regs.ds << 4;
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if (context.vm.regs.eflags & DIRECTION_FLAG)
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{
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if (size == 4)
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asm volatile ("std; rep; outsl; cld"
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: "=S" (esi), "=c" (ecx)
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: "d" (edx), "0" (esi), "1" (ecx));
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else if (size == 2)
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asm volatile ("std; rep; outsw; cld"
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: "=S" (esi), "=c" (ecx)
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: "d" (edx), "0" (esi), "1" (ecx));
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else
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asm volatile ("std; rep; outsb; cld"
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: "=S" (esi), "=c" (ecx)
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: "d" (edx), "0" (esi), "1" (ecx));
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}
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else
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{
|
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if (size == 4)
|
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asm volatile ("cld; rep; outsl"
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: "=S" (esi), "=c" (ecx)
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: "d" (edx), "0" (esi), "1" (ecx));
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else if (size == 2)
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asm volatile ("cld; rep; outsw"
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: "=S" (esi), "=c" (ecx)
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: "d" (edx), "0" (esi), "1" (ecx));
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else
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asm volatile ("cld; rep; outsb"
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: "=S" (esi), "=c" (ecx)
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: "d" (edx), "0" (esi), "1" (ecx));
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|
}
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|
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esi -= (unsigned int)context.vm.regs.ds << 4;
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|
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context.vm.regs.esi &= 0xffff0000;
|
|
context.vm.regs.esi |= esi & 0xffff;
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|
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context.vm.regs.ecx &= 0xffff0000;
|
|
context.vm.regs.ecx |= ecx & 0xffff;
|
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}
|
|
|
|
static void
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em_inbl(unsigned char literal)
|
|
{
|
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context.vm.regs.eax = inb(literal) & 0xff;
|
|
}
|
|
|
|
static void
|
|
em_inb(void)
|
|
{
|
|
asm volatile ("inb (%w1), %b0"
|
|
: "=a" (context.vm.regs.eax)
|
|
: "d" (context.vm.regs.edx), "0" (context.vm.regs.eax));
|
|
}
|
|
|
|
static void
|
|
em_inw(void)
|
|
{
|
|
asm volatile ("inw (%w1), %w0"
|
|
: "=a" (context.vm.regs.eax)
|
|
: "d" (context.vm.regs.edx), "0" (context.vm.regs.eax));
|
|
}
|
|
|
|
static void
|
|
em_inl(void)
|
|
{
|
|
asm volatile ("inl (%w1), %0"
|
|
: "=a" (context.vm.regs.eax)
|
|
: "d" (context.vm.regs.edx));
|
|
}
|
|
|
|
static void
|
|
em_outbl(unsigned char literal)
|
|
{
|
|
outb(context.vm.regs.eax & 0xff, literal);
|
|
}
|
|
|
|
static void
|
|
em_outb(void)
|
|
{
|
|
asm volatile ("outb %b0, (%w1)"
|
|
: : "a" (context.vm.regs.eax),
|
|
"d" (context.vm.regs.edx));
|
|
}
|
|
|
|
static void
|
|
em_outw(void)
|
|
{
|
|
asm volatile ("outw %w0, (%w1)"
|
|
: : "a" (context.vm.regs.eax),
|
|
"d" (context.vm.regs.edx));
|
|
}
|
|
|
|
static void
|
|
em_outl(void)
|
|
{
|
|
asm volatile ("outl %0, (%w1)"
|
|
: : "a" (context.vm.regs.eax),
|
|
"d" (context.vm.regs.edx));
|
|
}
|
|
|
|
static int
|
|
emulate(void)
|
|
{
|
|
unsigned char *insn;
|
|
struct
|
|
{
|
|
unsigned int size : 1;
|
|
unsigned int rep : 1;
|
|
} prefix = { 0, 0 };
|
|
int i = 0;
|
|
|
|
insn = (unsigned char *)((unsigned int)context.vm.regs.cs << 4);
|
|
insn += context.vm.regs.eip;
|
|
|
|
while (1)
|
|
{
|
|
if (insn[i] == 0x66)
|
|
{
|
|
prefix.size = 1 - prefix.size;
|
|
i++;
|
|
}
|
|
else if (insn[i] == 0xf3)
|
|
{
|
|
prefix.rep = 1;
|
|
i++;
|
|
}
|
|
else if (insn[i] == 0xf0 || insn[i] == 0xf2
|
|
|| insn[i] == 0x26 || insn[i] == 0x2e
|
|
|| insn[i] == 0x36 || insn[i] == 0x3e
|
|
|| insn[i] == 0x64 || insn[i] == 0x65
|
|
|| insn[i] == 0x67)
|
|
{
|
|
/* these prefixes are just ignored */
|
|
i++;
|
|
}
|
|
else if (insn[i] == 0x6c)
|
|
{
|
|
if (prefix.rep)
|
|
em_rep_ins(1);
|
|
else
|
|
em_ins(1);
|
|
i++;
|
|
break;
|
|
}
|
|
else if (insn[i] == 0x6d)
|
|
{
|
|
if (prefix.rep)
|
|
{
|
|
if (prefix.size)
|
|
em_rep_ins(4);
|
|
else
|
|
em_rep_ins(2);
|
|
}
|
|
else
|
|
{
|
|
if (prefix.size)
|
|
em_ins(4);
|
|
else
|
|
em_ins(2);
|
|
}
|
|
i++;
|
|
break;
|
|
}
|
|
else if (insn[i] == 0x6e)
|
|
{
|
|
if (prefix.rep)
|
|
em_rep_outs(1);
|
|
else
|
|
em_outs(1);
|
|
i++;
|
|
break;
|
|
}
|
|
else if (insn[i] == 0x6f)
|
|
{
|
|
if (prefix.rep)
|
|
{
|
|
if (prefix.size)
|
|
em_rep_outs(4);
|
|
else
|
|
em_rep_outs(2);
|
|
}
|
|
else
|
|
{
|
|
if (prefix.size)
|
|
em_outs(4);
|
|
else
|
|
em_outs(2);
|
|
}
|
|
i++;
|
|
break;
|
|
}
|
|
else if (insn[i] == 0xe4)
|
|
{
|
|
em_inbl(insn[i + 1]);
|
|
i += 2;
|
|
break;
|
|
}
|
|
else if (insn[i] == 0xe6)
|
|
{
|
|
em_outbl(insn[i + 1]);
|
|
i += 2;
|
|
break;
|
|
}
|
|
else if (insn[i] == 0xec)
|
|
{
|
|
em_inb();
|
|
i++;
|
|
break;
|
|
}
|
|
else if (insn[i] == 0xed)
|
|
{
|
|
if (prefix.size)
|
|
em_inl();
|
|
else
|
|
em_inw();
|
|
i++;
|
|
break;
|
|
}
|
|
else if (insn[i] == 0xee)
|
|
{
|
|
em_outb();
|
|
i++;
|
|
break;
|
|
}
|
|
else if (insn[i] == 0xef)
|
|
{
|
|
if (prefix.size)
|
|
em_outl();
|
|
else
|
|
em_outw();
|
|
|
|
i++;
|
|
break;
|
|
}
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
context.vm.regs.eip += i;
|
|
return 1;
|
|
}
|
|
|
|
|
|
/*
|
|
I don't know how to make sure I get the right vm86() from libc.
|
|
The one I want is syscall # 113 (vm86old() in libc 5, vm86() in glibc)
|
|
which should be declared as "int vm86(struct vm86_struct *);" in
|
|
<sys/vm86.h>.
|
|
|
|
This just does syscall 113 with inline asm, which should work
|
|
for both libc's (I hope).
|
|
*/
|
|
#if !defined(USE_LIBC_VM86)
|
|
static int
|
|
lrmi_vm86(struct vm86_struct *vm)
|
|
{
|
|
int r;
|
|
#ifdef __PIC__
|
|
asm volatile (
|
|
"pushl %%ebx\n\t"
|
|
"movl %2, %%ebx\n\t"
|
|
"int $0x80\n\t"
|
|
"popl %%ebx"
|
|
: "=a" (r)
|
|
: "0" (113), "r" (vm));
|
|
#else
|
|
asm volatile (
|
|
"int $0x80"
|
|
: "=a" (r)
|
|
: "0" (113), "b" (vm));
|
|
#endif
|
|
return r;
|
|
}
|
|
#else
|
|
#define lrmi_vm86 vm86
|
|
#endif
|
|
|
|
|
|
static void
|
|
debug_info(int vret)
|
|
{
|
|
int i;
|
|
unsigned char *p;
|
|
|
|
fputs("vm86() failed\n", stderr);
|
|
fprintf(stderr, "return = 0x%x\n", vret);
|
|
fprintf(stderr, "eax = 0x%08lx\n", context.vm.regs.eax);
|
|
fprintf(stderr, "ebx = 0x%08lx\n", context.vm.regs.ebx);
|
|
fprintf(stderr, "ecx = 0x%08lx\n", context.vm.regs.ecx);
|
|
fprintf(stderr, "edx = 0x%08lx\n", context.vm.regs.edx);
|
|
fprintf(stderr, "esi = 0x%08lx\n", context.vm.regs.esi);
|
|
fprintf(stderr, "edi = 0x%08lx\n", context.vm.regs.edi);
|
|
fprintf(stderr, "ebp = 0x%08lx\n", context.vm.regs.ebp);
|
|
fprintf(stderr, "eip = 0x%08lx\n", context.vm.regs.eip);
|
|
fprintf(stderr, "cs = 0x%04x\n", context.vm.regs.cs);
|
|
fprintf(stderr, "esp = 0x%08lx\n", context.vm.regs.esp);
|
|
fprintf(stderr, "ss = 0x%04x\n", context.vm.regs.ss);
|
|
fprintf(stderr, "ds = 0x%04x\n", context.vm.regs.ds);
|
|
fprintf(stderr, "es = 0x%04x\n", context.vm.regs.es);
|
|
fprintf(stderr, "fs = 0x%04x\n", context.vm.regs.fs);
|
|
fprintf(stderr, "gs = 0x%04x\n", context.vm.regs.gs);
|
|
fprintf(stderr, "eflags = 0x%08lx\n", context.vm.regs.eflags);
|
|
|
|
fputs("cs:ip = [ ", stderr);
|
|
|
|
p = (unsigned char *)((context.vm.regs.cs << 4) + (context.vm.regs.eip & 0xffff));
|
|
|
|
for (i = 0; i < 16; ++i)
|
|
fprintf(stderr, "%02x ", (unsigned int)p[i]);
|
|
|
|
fputs("]\n", stderr);
|
|
}
|
|
|
|
|
|
static int
|
|
run_vm86(void)
|
|
{
|
|
unsigned int vret;
|
|
|
|
while (1)
|
|
{
|
|
vret = lrmi_vm86(&context.vm);
|
|
|
|
if (VM86_TYPE(vret) == VM86_INTx)
|
|
{
|
|
unsigned int v = VM86_ARG(vret);
|
|
|
|
if (v == RETURN_TO_32_INT)
|
|
return 1;
|
|
|
|
pushw(context.vm.regs.eflags);
|
|
pushw(context.vm.regs.cs);
|
|
pushw(context.vm.regs.eip);
|
|
|
|
context.vm.regs.cs = get_int_seg(v);
|
|
context.vm.regs.eip = get_int_off(v);
|
|
context.vm.regs.eflags &= ~(VIF_MASK | TF_MASK);
|
|
|
|
continue;
|
|
}
|
|
|
|
if (VM86_TYPE(vret) != VM86_UNKNOWN)
|
|
break;
|
|
|
|
if (!emulate())
|
|
break;
|
|
}
|
|
|
|
#ifdef ORIGINAL_LRMI_CODE_THAT_GOT_IFDEFED_OUT
|
|
debug_info(vret);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
|
|
int
|
|
LRMI_call(struct LRMI_regs *r)
|
|
{
|
|
unsigned int vret;
|
|
|
|
memset(&context.vm.regs, 0, sizeof(context.vm.regs));
|
|
|
|
set_regs(r);
|
|
|
|
context.vm.regs.cs = r->cs;
|
|
context.vm.regs.eip = r->ip;
|
|
|
|
if (r->ss == 0 && r->sp == 0)
|
|
{
|
|
context.vm.regs.ss = context.stack_seg;
|
|
context.vm.regs.esp = context.stack_off;
|
|
}
|
|
else
|
|
{
|
|
context.vm.regs.ss = r->ss;
|
|
context.vm.regs.esp = r->sp;
|
|
}
|
|
|
|
pushw(context.ret_seg);
|
|
pushw(context.ret_off);
|
|
|
|
vret = run_vm86();
|
|
|
|
get_regs(r);
|
|
|
|
return vret;
|
|
}
|
|
|
|
|
|
int
|
|
LRMI_int(int i, struct LRMI_regs *r)
|
|
{
|
|
unsigned int vret;
|
|
unsigned int seg, off;
|
|
|
|
seg = get_int_seg(i);
|
|
off = get_int_off(i);
|
|
|
|
/*
|
|
If the interrupt is in regular memory, it's probably
|
|
still pointing at a dos TSR (which is now gone).
|
|
*/
|
|
if (seg < 0xa000 || (seg << 4) + off >= 0x100000)
|
|
{
|
|
#ifdef ORIGINAL_LRMI_CODE_THAT_GOT_IFDEFED_OUT
|
|
fprintf(stderr, "Int 0x%x is not in rom (%04x:%04x)\n", i, seg, off);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
memset(&context.vm.regs, 0, sizeof(context.vm.regs));
|
|
|
|
set_regs(r);
|
|
|
|
context.vm.regs.cs = seg;
|
|
context.vm.regs.eip = off;
|
|
|
|
if (r->ss == 0 && r->sp == 0)
|
|
{
|
|
context.vm.regs.ss = context.stack_seg;
|
|
context.vm.regs.esp = context.stack_off;
|
|
}
|
|
else
|
|
{
|
|
context.vm.regs.ss = r->ss;
|
|
context.vm.regs.esp = r->sp;
|
|
}
|
|
|
|
pushw(DEFAULT_VM86_FLAGS);
|
|
pushw(context.ret_seg);
|
|
pushw(context.ret_off);
|
|
|
|
vret = run_vm86();
|
|
|
|
get_regs(r);
|
|
|
|
return vret;
|
|
}
|
|
|