mirror of
https://github.com/mpv-player/mpv
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e71619c1df
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@13902 b3059339-0415-0410-9bf9-f77b7e298cf2
976 lines
22 KiB
C
976 lines
22 KiB
C
/*
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Driver for VIA CLE266 Unichrome - Version 0.1.0
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Copyright (C) 2004 by Timothy Lee
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Based on Cyberblade/i driver by Alastair M. Robison.
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Thanks to Gilles Frattini for bugfixes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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Changes:
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2004-03-10
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Initial version
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2004-10-09
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Added Doxygen documentation (Benjamin Zores <ben@geexbox.org>)
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2004-11-08
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Added h/w revision detection (Timothy Lee <timothy.lee@siriushk.com>)
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To Do:
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*/
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#include <errno.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <inttypes.h>
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#include <unistd.h>
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#include "../vidix.h"
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#include "../fourcc.h"
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#include "../../libdha/libdha.h"
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#include "../../libdha/pci_ids.h"
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#include "../../libdha/pci_names.h"
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#include "../../config.h"
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#include "unichrome_regs.h"
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/**
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* @brief Information on PCI device.
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*/
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pciinfo_t pci_info;
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/**
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* @brief Unichrome driver colorkey settings.
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*/
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static vidix_grkey_t uc_grkey;
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static int frames[VID_PLAY_MAXFRAMES];
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uint8_t *vio;
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uint8_t *uc_mem;
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uint8_t mclk_save[3];
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uint8_t hwrev;
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#define VIA_OUT(hwregs, reg, val) *(volatile uint32_t *)((hwregs) + (reg)) = (val)
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#define VIA_IN(hwregs, reg) *(volatile uint32_t *)((hwregs) + (reg))
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#define VGA_OUT8(hwregs, reg, val) *(volatile uint8_t *)((hwregs) + (reg) + 0x8000) = (val)
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#define VGA_IN8(hwregs, reg) *(volatile uint8_t *)((hwregs) + (reg) + 0x8000)
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#define VIDEO_OUT(hwregs, reg, val) VIA_OUT((hwregs)+0x200, reg, val)
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#define VIDEO_IN(hwregs, reg) VIA_IN((hwregs)+0x200, reg)
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#define outb(val,reg) OUTPORT8(reg,val)
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#define inb(reg) INPORT8(reg)
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#define ALIGN_TO(v, n) (((v) + (n-1)) & ~(n-1))
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#define UC_MAP_V1_FIFO_CONTROL(depth, pre_thr, thr) \
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(((depth)-1) | ((thr) << 8) | ((pre_thr) << 24))
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#define FRAMEBUFFER_START 0x600000
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#define FRAMEBUFFER_SIZE 0x200000
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#ifdef DEBUG_LOGFILE
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FILE *logfile = 0;
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#define LOGWRITE(x) {if(logfile) fprintf(logfile,x);}
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#else
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#define LOGWRITE(x)
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#endif
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/**
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* @brief Unichrome driver vidix capabilities.
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*/
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static vidix_capability_t uc_cap = {
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"VIA CLE266 Unichrome driver",
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"Timothy Lee <timothy@siriushk.com>",
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TYPE_OUTPUT,
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{0, 0, 0, 0},
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4096,
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4096,
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4,
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4,
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-1,
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FLAG_UPSCALER | FLAG_DOWNSCALER,
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VENDOR_VIA2,
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-1,
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{0, 0, 0, 0}
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};
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/**
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* @brief list of card IDs compliant with the Unichrome driver .
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*/
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static unsigned short uc_card_ids[] = {
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DEVICE_VIA2_VT8623_CLE266_AGP
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};
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/**
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* @brief Check age of driver.
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*
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* @return vidix version number.
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*/
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unsigned int
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vixGetVersion (void)
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{
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return (VIDIX_VERSION);
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}
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/**
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* @brief Find chip index in Unichrome compliant devices list.
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*
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* @param chip_id PCI device ID.
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*
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* @returns index position in uc_card_ids if successful.
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* -1 if chip_id is not a compliant chipset ID.
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*/
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static int
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find_chip (unsigned chip_id)
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{
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unsigned i;
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for (i = 0; i < sizeof (uc_card_ids) / sizeof (unsigned short); i++)
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{
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if (chip_id == uc_card_ids[i])
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return i;
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}
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return -1;
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}
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/**
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* @brief Map hardware settings for vertical scaling.
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*
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* @param sh source height.
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* @param dh destination height.
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* @param zoom will hold vertical setting of zoom register.
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* @param mini will hold vertical setting of mini register.
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*
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* @returns 1 if successful.
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* 0 if the zooming factor is too large or small.
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*
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* @note Derived from VIA's V4L driver.
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* See ddover.c, DDOVER_HQVCalcZoomHeight()
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*/
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int
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uc_ovl_map_vzoom (int sh, int dh, uint32_t * zoom, uint32_t * mini)
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{
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uint32_t sh1, tmp, d;
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int zoom_ok = 1;
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if (sh == dh) /* No zoom */
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{
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/* Do nothing */
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}
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else if (sh < dh) /* Zoom in */
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{
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tmp = (sh * 0x0400) / dh;
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zoom_ok = !(tmp > 0x3ff);
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*zoom |= (tmp & 0x3ff) | V1_Y_ZOOM_ENABLE;
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*mini |= V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY;
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}
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else /* sw > dh - Zoom out */
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{
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/* Find a suitable divider (1 << d) = {2, 4, 8 or 16} */
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sh1 = sh;
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for (d = 1; d < 5; d++)
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{
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sh1 >>= 1;
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if (sh1 <= dh)
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break;
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}
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if (d == 5) /* too small */
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{
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d = 4;
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zoom_ok = 0;
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}
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*mini |= ((d << 1) - 1) << 16; /* <= {1,3,5,7} << 16 */
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/* Add scaling */
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if (sh1 < dh)
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{
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tmp = (sh1 * 0x400) / dh;
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*zoom |= ((tmp & 0x3ff) | V1_Y_ZOOM_ENABLE);
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*mini |= V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY;
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}
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}
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return zoom_ok;
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}
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/**
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* @brief Map hardware settings for horizontal scaling.
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*
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* @param sw source width.
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* @param dw destination width.
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* @param zoom will hold horizontal setting of zoom register.
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* @param mini will hold horizontal setting of mini register.
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* @param falign will hold fetch aligment.
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* @param dcount will hold display count.
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*
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* @returns 1 if successful.
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* 0 if the zooming factor is too large or small.
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*
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* @note Derived from VIA's V4L driver.
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* See ddover.c, DDOVER_HQVCalcZoomWidth() and DDOver_GetDisplayCount()
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*/
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int
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uc_ovl_map_hzoom (int sw, int dw, uint32_t * zoom, uint32_t * mini,
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int *falign, int *dcount)
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{
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uint32_t tmp, sw1, d;
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int md; /* Minify-divider */
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int zoom_ok = 1;
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md = 1;
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*falign = 0;
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if (sw == dw) /* no zoom */
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{
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/* Do nothing */
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}
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else if (sw < dw) /* zoom in */
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{
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tmp = (sw * 0x0800) / dw;
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zoom_ok = !(tmp > 0x7ff);
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*zoom |= ((tmp & 0x7ff) << 16) | V1_X_ZOOM_ENABLE;
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*mini |= V1_X_INTERPOLY;
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}
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else /* sw > dw - Zoom out */
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{
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/* Find a suitable divider (1 << d) = {2, 4, 8 or 16} */
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sw1 = sw;
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for (d = 1; d < 5; d++)
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{
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sw1 >>= 1;
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if (sw1 <= dw)
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break;
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}
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if (d == 5) /* too small */
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{
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d = 4;
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zoom_ok = 0;
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}
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md = 1 << d; /* <= {2,4,8,16} */
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*falign = ((md << 1) - 1) & 0xf; /* <= {3,7,15,15} */
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*mini |= V1_X_INTERPOLY;
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*mini |= ((d << 1) - 1) << 24; /* <= {1,3,5,7} << 24 */
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/* Add scaling */
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if (sw1 < dw)
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{
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/* CLE bug */
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/* tmp = sw1*0x0800 / dw; */
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tmp = (sw1 - 2) * 0x0800 / dw;
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*zoom |= ((tmp & 0x7ff) << 16) | V1_X_ZOOM_ENABLE;
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}
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}
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*dcount = sw - md;
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return zoom_ok;
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}
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/**
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* @brief qword fetch register setting.
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*
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* @param format overlay pixel format.
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* @param sw source width.
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*
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* @return qword fetch register setting
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*
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* @note Derived from VIA's V4L driver. See ddover.c, DDOver_GetFetch()
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* @note Only call after uc_ovl_map_hzoom()
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*/
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uint32_t
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uc_ovl_map_qwfetch (uint32_t format, int sw)
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{
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uint32_t fetch = 0;
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switch (format)
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{
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case IMGFMT_YV12:
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case IMGFMT_I420:
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fetch = ALIGN_TO (sw, 32) >> 4;
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break;
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case IMGFMT_UYVY:
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case IMGFMT_YVYU:
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case IMGFMT_YUY2:
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fetch = (ALIGN_TO (sw << 1, 16) >> 4) + 1;
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break;
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case IMGFMT_BGR15:
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case IMGFMT_BGR16:
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fetch = (ALIGN_TO (sw << 1, 16) >> 4) + 1;
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break;
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case IMGFMT_BGR32:
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fetch = (ALIGN_TO (sw << 2, 16) >> 4) + 1;
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break;
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default:
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printf ("[unichrome] Unexpected pixelformat!");
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break;
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}
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if (fetch < 4)
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fetch = 4;
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return fetch;
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}
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/**
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* @brief Map pixel format.
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*
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* @param format pixel format.
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*
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* @return the mapped pixel format.
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*
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* @note Derived from VIA's V4L driver. See ddover.c, DDOver_GetV1Format()
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*/
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uint32_t
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uc_ovl_map_format (uint32_t format)
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{
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switch (format)
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{
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case IMGFMT_UYVY:
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case IMGFMT_YVYU:
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case IMGFMT_YUY2:
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return V1_COLORSPACE_SIGN | V1_YUV422;
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case IMGFMT_IYUV:
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return V1_COLORSPACE_SIGN | V1_YCbCr420 | V1_SWAP_SW;
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case IMGFMT_YV12:
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case IMGFMT_I420:
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return V1_COLORSPACE_SIGN | V1_YCbCr420;
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case IMGFMT_BGR15:
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return V1_RGB15;
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case IMGFMT_BGR16:
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return V1_RGB16;
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case IMGFMT_BGR32:
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return V1_RGB32;
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default:
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printf ("[unichrome] Unexpected pixelformat!");
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return V1_YUV422;
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}
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}
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/**
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* @brief Calculate V1 control and fifo-control register values.
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*
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* @param format pixel format.
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* @param sw source width.
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* @param hwrev CLE266 hardware revision.
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* @param extfifo_on set this 1 if the extended FIFO is enabled.
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* @param control will hold value for V1_CONTROL.
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* @param fifo will hold value for V1_FIFO_CONTROL.
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*/
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void
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uc_ovl_map_v1_control (uint32_t format, int sw,
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int hwrev, int extfifo_on,
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uint32_t * control, uint32_t * fifo)
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{
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*control = V1_BOB_ENABLE | uc_ovl_map_format (format);
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if (hwrev == 0x10)
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{
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*control |= V1_EXPIRE_NUM_F;
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}
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else
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{
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if (extfifo_on)
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{
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*control |= V1_EXPIRE_NUM_A | V1_FIFO_EXTENDED;
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}
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else
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{
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*control |= V1_EXPIRE_NUM;
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}
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}
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if ((format == IMGFMT_YV12) || (format == IMGFMT_I420))
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{
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/* Minified video will be skewed without this workaround. */
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if (sw <= 80) /* Fetch count <= 5 */
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{
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*fifo = UC_MAP_V1_FIFO_CONTROL (16, 0, 0);
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}
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else
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{
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if (hwrev == 0x10)
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*fifo = UC_MAP_V1_FIFO_CONTROL (64, 56, 56);
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else
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*fifo = UC_MAP_V1_FIFO_CONTROL (16, 12, 8);
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}
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}
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else
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{
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if (hwrev == 0x10)
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{
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*fifo = UC_MAP_V1_FIFO_CONTROL (64, 56, 56); /* Default rev 0x10 */
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}
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else
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{
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if (extfifo_on)
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*fifo = UC_MAP_V1_FIFO_CONTROL (48, 40, 40);
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else
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*fifo = UC_MAP_V1_FIFO_CONTROL (32, 29, 16); /* Default */
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}
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}
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}
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/**
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* @brief Setup extended FIFO.
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*
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* @param extfifo_on pointer determining if extended fifo is enable or not.
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* @param dst_w destination width.
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*/
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void
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uc_ovl_setup_fifo (int *extfifo_on, int dst_w)
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{
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if (dst_w <= 1024) /* Disable extended FIFO */
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{
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outb (0x16, 0x3c4);
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outb (mclk_save[0], 0x3c5);
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outb (0x17, 0x3c4);
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outb (mclk_save[1], 0x3c5);
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outb (0x18, 0x3c4);
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outb (mclk_save[2], 0x3c5);
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*extfifo_on = 0;
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}
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else /* Enable extended FIFO */
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{
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outb (0x17, 0x3c4);
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outb (0x2f, 0x3c5);
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outb (0x16, 0x3c4);
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outb ((mclk_save[0] & 0xf0) | 0x14, 0x3c5);
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outb (0x18, 0x3c4);
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outb (0x56, 0x3c5);
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*extfifo_on = 1;
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}
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}
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void
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uc_ovl_vcmd_wait (volatile uint8_t * vio)
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{
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while ((VIDEO_IN (vio, V_COMPOSE_MODE)
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& (V1_COMMAND_FIRE | V3_COMMAND_FIRE)));
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}
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/**
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* @brief Probe hardware to find some useable chipset.
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*
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* @param verbose specifies verbose level.
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* @param force specifies force mode : driver should ignore
|
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* device_id (danger but useful for new devices)
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*
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* @returns 0 if it can handle something in PC.
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* a negative error code otherwise.
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*/
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int
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vixProbe (int verbose, int force)
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{
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pciinfo_t lst[MAX_PCI_DEVICES];
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unsigned i, num_pci;
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int err;
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err = pci_scan (lst, &num_pci);
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if (err)
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{
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printf ("[unichrome] Error occurred during pci scan: %s\n",
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strerror (err));
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return err;
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}
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else
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{
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err = ENXIO;
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for (i = 0; i < num_pci; i++)
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{
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if (lst[i].vendor == VENDOR_VIA2)
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{
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int idx;
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const char *dname;
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idx = find_chip (lst[i].device);
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if (idx == -1)
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continue;
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dname = pci_device_name (VENDOR_VIA2, lst[i].device);
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dname = dname ? dname : "Unknown chip";
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printf ("[unichrome] Found chip: %s\n", dname);
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if ((lst[i].command & PCI_COMMAND_IO) == 0)
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{
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printf ("[unichrome] Device is disabled, ignoring\n");
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continue;
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}
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uc_cap.device_id = lst[i].device;
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err = 0;
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memcpy (&pci_info, &lst[i], sizeof (pciinfo_t));
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break;
|
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}
|
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}
|
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}
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|
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if (err && verbose)
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printf ("[unichrome] Can't find chip\n");
|
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return err;
|
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}
|
|
|
|
/**
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|
* @brief Initializes driver.
|
|
*
|
|
* @returns 0 if ok.
|
|
* a negative error code otherwise.
|
|
*/
|
|
int
|
|
vixInit (void)
|
|
{
|
|
long tmp;
|
|
uc_mem = map_phys_mem (pci_info.base0, 0x800000);
|
|
enable_app_io ();
|
|
|
|
outb (0x2f, 0x3c4);
|
|
tmp = inb (0x3c5) << 0x18;
|
|
vio = map_phys_mem (tmp, 0x1000);
|
|
|
|
outb (0x16, 0x3c4);
|
|
mclk_save[0] = inb (0x3c5);
|
|
outb (0x17, 0x3c4);
|
|
mclk_save[1] = inb (0x3c5);
|
|
outb (0x18, 0x3c4);
|
|
mclk_save[2] = inb (0x3c5);
|
|
|
|
uc_grkey.ckey.blue = 0x00;
|
|
uc_grkey.ckey.green = 0x00;
|
|
uc_grkey.ckey.red = 0x00;
|
|
|
|
/* Detect whether we have a CLE266Ax or CLE266Cx */
|
|
outb (0x4f, 0x3d4);
|
|
tmp = inb (0x3d5);
|
|
outb (0x4f, 0x3d4);
|
|
outb (0x55, 0x3d5);
|
|
outb (0x4f, 0x3d4);
|
|
if (0x55 == inb (0x3d5))
|
|
{
|
|
/* Only CLE266Cx supports CR4F */
|
|
hwrev = 0x11;
|
|
}
|
|
else
|
|
{
|
|
/* Otherwise assume to be a CLE266Ax */
|
|
hwrev = 0x00;
|
|
}
|
|
outb (0x4f, 0x3d4);
|
|
outb (tmp, 0x3d5);
|
|
|
|
#ifdef DEBUG_LOGFILE
|
|
logfile = fopen ("/tmp/uc_vidix.log", "w");
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* @brief Destroys driver.
|
|
*/
|
|
void
|
|
vixDestroy (void)
|
|
{
|
|
#ifdef DEBUG_LOGFILE
|
|
if (logfile)
|
|
fclose (logfile);
|
|
#endif
|
|
outb (0x16, 0x3c4);
|
|
outb (mclk_save[0], 0x3c5);
|
|
outb (0x17, 0x3c4);
|
|
outb (mclk_save[1], 0x3c5);
|
|
outb (0x18, 0x3c4);
|
|
outb (mclk_save[2], 0x3c5);
|
|
|
|
disable_app_io ();
|
|
unmap_phys_mem (uc_mem, 0x800000);
|
|
unmap_phys_mem (vio, 0x1000);
|
|
}
|
|
|
|
/**
|
|
* @brief Get chipset's hardware capabilities.
|
|
*
|
|
* @param to Pointer to the vidix_capability_t structure to be filled.
|
|
*
|
|
* @returns 0.
|
|
*/
|
|
int
|
|
vixGetCapability (vidix_capability_t * to)
|
|
{
|
|
memcpy (to, &uc_cap, sizeof (vidix_capability_t));
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* @brief Report if the video FourCC is supported by hardware.
|
|
*
|
|
* @param fourcc input image format.
|
|
*
|
|
* @returns 1 if the fourcc is supported.
|
|
* 0 otherwise.
|
|
*/
|
|
static int
|
|
is_supported_fourcc (uint32_t fourcc)
|
|
{
|
|
switch (fourcc)
|
|
{
|
|
case IMGFMT_YV12:
|
|
case IMGFMT_I420:
|
|
case IMGFMT_UYVY:
|
|
case IMGFMT_YVYU:
|
|
case IMGFMT_YUY2:
|
|
case IMGFMT_BGR15:
|
|
case IMGFMT_BGR16:
|
|
case IMGFMT_BGR32:
|
|
return 1;
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Try to configure video memory for given fourcc.
|
|
*
|
|
* @param to Pointer to the vidix_fourcc_t structure to be filled.
|
|
*
|
|
* @returns 0 if ok.
|
|
* errno otherwise.
|
|
*/
|
|
int
|
|
vixQueryFourcc (vidix_fourcc_t * to)
|
|
{
|
|
if (is_supported_fourcc (to->fourcc))
|
|
{
|
|
to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP |
|
|
VID_DEPTH_4BPP | VID_DEPTH_8BPP |
|
|
VID_DEPTH_12BPP | VID_DEPTH_15BPP |
|
|
VID_DEPTH_16BPP | VID_DEPTH_24BPP | VID_DEPTH_32BPP;
|
|
to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY;
|
|
return 0;
|
|
}
|
|
else
|
|
to->depth = to->flags = 0;
|
|
return ENOSYS;
|
|
}
|
|
|
|
/**
|
|
* @brief Get the GrKeys
|
|
*
|
|
* @param grkey Pointer to the vidix_grkey_t structure to be filled by driver.
|
|
*
|
|
* @return 0.
|
|
*/
|
|
int
|
|
vixGetGrKeys (vidix_grkey_t * grkey)
|
|
{
|
|
memcpy (grkey, &uc_grkey, sizeof (vidix_grkey_t));
|
|
return (0);
|
|
}
|
|
|
|
/**
|
|
* @brief Set the GrKeys
|
|
*
|
|
* @param grkey Colorkey to be set.
|
|
*
|
|
* @return 0.
|
|
*/
|
|
int
|
|
vixSetGrKeys (const vidix_grkey_t * grkey)
|
|
{
|
|
unsigned long dwCompose = VIDEO_IN (vio, V_COMPOSE_MODE) & ~0x0f;
|
|
memcpy (&uc_grkey, grkey, sizeof (vidix_grkey_t));
|
|
if (uc_grkey.ckey.op != CKEY_FALSE)
|
|
{
|
|
/* Set colorkey (how do I detect BPP in hardware ??) */
|
|
unsigned long ckey;
|
|
if (1) /* Assume 16-bit graphics */
|
|
{
|
|
ckey = (grkey->ckey.blue & 0x1f)
|
|
| ((grkey->ckey.green & 0x3f) << 5)
|
|
| ((grkey->ckey.red & 0x1f) << 11);
|
|
}
|
|
else
|
|
{
|
|
ckey = (grkey->ckey.blue)
|
|
| (grkey->ckey.green << 8) | (grkey->ckey.red << 16);
|
|
}
|
|
VIDEO_OUT (vio, V_COLOR_KEY, ckey);
|
|
dwCompose |= SELECT_VIDEO_IF_COLOR_KEY;
|
|
}
|
|
|
|
/* Execute the changes */
|
|
VIDEO_OUT (vio, V_COMPOSE_MODE, dwCompose | V1_COMMAND_FIRE);
|
|
return (0);
|
|
}
|
|
|
|
/**
|
|
* @brief Unichrome driver equalizer capabilities.
|
|
*/
|
|
vidix_video_eq_t equal = {
|
|
VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | VEQ_CAP_HUE,
|
|
300, 100, 0, 0, 0, 0, 0, 0
|
|
};
|
|
|
|
|
|
/**
|
|
* @brief Get the equalizer capabilities.
|
|
*
|
|
* @param eq Pointer to the vidix_video_eq_t structure to be filled by driver.
|
|
*
|
|
* @return 0.
|
|
*/
|
|
int
|
|
vixPlaybackGetEq (vidix_video_eq_t * eq)
|
|
{
|
|
memcpy (eq, &equal, sizeof (vidix_video_eq_t));
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* @brief Set the equalizer capabilities for color correction
|
|
*
|
|
* @param eq equalizer capabilities to be set.
|
|
*
|
|
* @return 0.
|
|
*/
|
|
int
|
|
vixPlaybackSetEq (const vidix_video_eq_t * eq)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* @brief Y, U, V offsets.
|
|
*/
|
|
static int YOffs, UOffs, VOffs;
|
|
|
|
/**
|
|
* @brief Configure driver for playback. Driver should prepare BES.
|
|
*
|
|
* @param info configuration description for playback.
|
|
*
|
|
* @returns 0 in case of success.
|
|
* -1 otherwise.
|
|
*/
|
|
int
|
|
vixConfigPlayback (vidix_playback_t * info)
|
|
{
|
|
int src_w, drw_w;
|
|
int src_h, drw_h;
|
|
long base0, pitch;
|
|
int uv_size, swap_uv;
|
|
unsigned int i;
|
|
int extfifo_on;
|
|
|
|
/* Overlay register settings */
|
|
uint32_t win_start, win_end;
|
|
uint32_t zoom, mini;
|
|
uint32_t dcount, falign, qwfetch;
|
|
uint32_t y_start, u_start, v_start;
|
|
uint32_t v_ctrl, fifo_ctrl;
|
|
|
|
if (!is_supported_fourcc (info->fourcc))
|
|
return -1;
|
|
|
|
src_w = info->src.w;
|
|
src_h = info->src.h;
|
|
|
|
drw_w = info->dest.w;
|
|
drw_h = info->dest.h;
|
|
|
|
/* Setup FIFO */
|
|
uc_ovl_setup_fifo (&extfifo_on, src_w);
|
|
|
|
/* Get image format, FIFO size, etc. */
|
|
uc_ovl_map_v1_control (info->fourcc, src_w, hwrev, extfifo_on,
|
|
&v_ctrl, &fifo_ctrl);
|
|
|
|
/* Setup layer window */
|
|
win_start = (info->dest.x << 16) | info->dest.y;
|
|
win_end = ((info->dest.x + drw_w - 1) << 16) | (info->dest.y + drw_h - 1);
|
|
|
|
/* Get scaling and data-fetch parameters */
|
|
zoom = 0;
|
|
mini = 0;
|
|
uc_ovl_map_vzoom (src_h, drw_h, &zoom, &mini);
|
|
uc_ovl_map_hzoom (src_w, drw_w, &zoom, &mini, &falign, &dcount);
|
|
qwfetch = uc_ovl_map_qwfetch (info->fourcc, src_w);
|
|
|
|
/* Calculate buffer sizes */
|
|
swap_uv = 0;
|
|
switch (info->fourcc)
|
|
{
|
|
case IMGFMT_YV12:
|
|
swap_uv = 1;
|
|
case IMGFMT_I420:
|
|
case IMGFMT_UYVY:
|
|
case IMGFMT_YVYU:
|
|
pitch = ALIGN_TO (src_w, 32);
|
|
uv_size = (pitch >> 1) * (src_h >> 1);
|
|
break;
|
|
|
|
case IMGFMT_YUY2:
|
|
case IMGFMT_BGR15:
|
|
case IMGFMT_BGR16:
|
|
pitch = ALIGN_TO (src_w << 1, 32);
|
|
uv_size = 0;
|
|
break;
|
|
|
|
case IMGFMT_BGR32:
|
|
pitch = ALIGN_TO (src_w << 2, 32);
|
|
uv_size = 0;
|
|
break;
|
|
}
|
|
if ((src_w > 4096) || (src_h > 4096) ||
|
|
(src_w < 32) || (src_h < 1) || (pitch > 0x1fff))
|
|
{
|
|
printf ("[unichrome] Layer size out of bounds\n");
|
|
}
|
|
|
|
/* Calculate offsets */
|
|
info->offset.y = 0;
|
|
info->offset.v = info->offset.y + pitch * src_h;
|
|
info->offset.u = info->offset.v + uv_size;
|
|
info->frame_size = info->offset.u + uv_size;
|
|
YOffs = info->offset.y;
|
|
UOffs = (swap_uv ? info->offset.v : info->offset.u);
|
|
VOffs = (swap_uv ? info->offset.u : info->offset.v);
|
|
|
|
/* Assume we have 2 MB to play with */
|
|
info->num_frames = FRAMEBUFFER_SIZE / info->frame_size;
|
|
if (info->num_frames > VID_PLAY_MAXFRAMES)
|
|
info->num_frames = VID_PLAY_MAXFRAMES;
|
|
|
|
/* Start at 6 MB. Let's hope it's not in use. */
|
|
base0 = FRAMEBUFFER_START;
|
|
info->dga_addr = uc_mem + base0;
|
|
|
|
info->dest.pitch.y = 32;
|
|
info->dest.pitch.u = 32;
|
|
info->dest.pitch.v = 32;
|
|
|
|
for (i = 0; i < info->num_frames; i++)
|
|
{
|
|
info->offsets[i] = info->frame_size * i;
|
|
frames[i] = base0 + info->offsets[i];
|
|
}
|
|
|
|
/* Write to the hardware */
|
|
uc_ovl_vcmd_wait (vio);
|
|
|
|
/* Configure diy_pitchlay parameters now */
|
|
if (v_ctrl & V1_COLORSPACE_SIGN)
|
|
{
|
|
if (hwrev >= 0x10)
|
|
{
|
|
VIDEO_OUT (vio, V1_ColorSpaceReg_2, ColorSpaceValue_2_3123C0);
|
|
VIDEO_OUT (vio, V1_ColorSpaceReg_1, ColorSpaceValue_1_3123C0);
|
|
}
|
|
else
|
|
{
|
|
VIDEO_OUT (vio, V1_ColorSpaceReg_2, ColorSpaceValue_2);
|
|
VIDEO_OUT (vio, V1_ColorSpaceReg_1, ColorSpaceValue_1);
|
|
}
|
|
}
|
|
|
|
VIDEO_OUT (vio, V1_CONTROL, v_ctrl);
|
|
VIDEO_OUT (vio, V_FIFO_CONTROL, fifo_ctrl);
|
|
|
|
VIDEO_OUT (vio, V1_WIN_START_Y, win_start);
|
|
VIDEO_OUT (vio, V1_WIN_END_Y, win_end);
|
|
|
|
VIDEO_OUT (vio, V1_SOURCE_HEIGHT, (src_h << 16) | dcount);
|
|
|
|
VIDEO_OUT (vio, V12_QWORD_PER_LINE, qwfetch << 20);
|
|
VIDEO_OUT (vio, V1_STRIDE, pitch | ((pitch >> 1) << 16));
|
|
|
|
VIDEO_OUT (vio, V1_MINI_CONTROL, mini);
|
|
VIDEO_OUT (vio, V1_ZOOM_CONTROL, zoom);
|
|
|
|
/* Configure buffer address and execute the changes now! */
|
|
vixPlaybackFrameSelect (0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* @brief Set playback on : driver should activate BES on this call.
|
|
*
|
|
* @return 0.
|
|
*/
|
|
int
|
|
vixPlaybackOn (void)
|
|
{
|
|
LOGWRITE ("Enable overlay\n");
|
|
|
|
/* Turn on overlay */
|
|
VIDEO_OUT (vio, V1_CONTROL, VIDEO_IN (vio, V1_CONTROL) | V1_ENABLE);
|
|
|
|
/* Execute the changes */
|
|
VIDEO_OUT (vio, V_COMPOSE_MODE,
|
|
VIDEO_IN (vio, V_COMPOSE_MODE) | V1_COMMAND_FIRE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* @brief Set playback off : driver should deactivate BES on this call.
|
|
*
|
|
* @return 0.
|
|
*/
|
|
int
|
|
vixPlaybackOff (void)
|
|
{
|
|
LOGWRITE ("Disable overlay\n");
|
|
|
|
uc_ovl_vcmd_wait (vio);
|
|
|
|
/* Restore FIFO */
|
|
VIDEO_OUT (vio, V_FIFO_CONTROL, UC_MAP_V1_FIFO_CONTROL (16, 12, 8));
|
|
|
|
/* Turn off overlay */
|
|
VIDEO_OUT (vio, V1_CONTROL, VIDEO_IN (vio, V1_CONTROL) & ~V1_ENABLE);
|
|
|
|
/* Execute the changes */
|
|
VIDEO_OUT (vio, V_COMPOSE_MODE,
|
|
VIDEO_IN (vio, V_COMPOSE_MODE) | V1_COMMAND_FIRE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* @brief Driver should prepare and activate corresponded frame.
|
|
*
|
|
* @param frame the frame index.
|
|
*
|
|
* @return 0.
|
|
*
|
|
* @note This function is used only for double and triple buffering
|
|
* and never used for single buffering playback.
|
|
*/
|
|
int
|
|
vixPlaybackFrameSelect (unsigned int frame)
|
|
{
|
|
LOGWRITE ("Frame select\n");
|
|
|
|
uc_ovl_vcmd_wait (vio);
|
|
|
|
/* Configure buffer address */
|
|
VIDEO_OUT (vio, V1_STARTADDR_Y0, frames[frame] + YOffs);
|
|
VIDEO_OUT (vio, V1_STARTADDR_CB0, frames[frame] + UOffs);
|
|
VIDEO_OUT (vio, V1_STARTADDR_CR0, frames[frame] + VOffs);
|
|
|
|
/* Execute the changes */
|
|
VIDEO_OUT (vio, V_COMPOSE_MODE,
|
|
VIDEO_IN (vio, V_COMPOSE_MODE) | V1_COMMAND_FIRE);
|
|
|
|
return 0;
|
|
}
|