mirror of
https://github.com/mpv-player/mpv
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9b7f5e81c6
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@22868 b3059339-0415-0410-9bf9-f77b7e298cf2
137 lines
3.9 KiB
C
137 lines
3.9 KiB
C
/*
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* Copyright 1992-2000 by Alan Hourihane, Wigan, England.
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that
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* copyright notice and this permission notice appear in supporting
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* documentation, and that the name of Alan Hourihane not be used in
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* advertising or publicity pertaining to distribution of the software without
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* specific, written prior permission. Alan Hourihane makes no representations
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* about the suitability of this software for any purpose. It is provided
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* "as is" without express or implied warranty.
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*
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* ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*
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* Author: Alan Hourihane, alanh@fairlite.demon.co.uk
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*/
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/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_regs.h,v 1.22 2002/01/11 13:06:30 alanh Exp $ */
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#define DEBUG 1
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#define NTSC 14.31818
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#define PAL 17.73448
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/* General Registers */
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#define SPR 0x1F /* Software Programming Register (videoram) */
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/* 3C4 */
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#define RevisionID 0x09
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#define ConfPort1 0x0C
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#define ConfPort2 0x0C
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#define NewMode2 0x0D
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#define OldMode2 0x00 /* Should be 0x0D - dealt with in trident_dac.c */
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#define OldMode1 0x0E
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#define NewMode1 0x0E
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#define Protection 0x11
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#define MCLKLow 0x16
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#define MCLKHigh 0x17
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#define ClockLow 0x18
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#define ClockHigh 0x19
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#define SSetup 0x20
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#define SKey 0x37
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#define SPKey 0x57
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/* 3x4 */
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#define Offset 0x13
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#define Underline 0x14
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#define CRTCMode 0x17
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#define CRTCModuleTest 0x1E
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#define FIFOControl 0x20
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#define LinearAddReg 0x21
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#define DRAMTiming 0x23
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#define New32 0x23
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#define RAMDACTiming 0x25
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#define CRTHiOrd 0x27
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#define AddColReg 0x29
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#define InterfaceSel 0x2A
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#define HorizOverflow 0x2B
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#define GETest 0x2D
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#define Performance 0x2F
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#define GraphEngReg 0x36
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#define I2C 0x37
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#define PixelBusReg 0x38
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#define PCIReg 0x39
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#define DRAMControl 0x3A
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#define MiscContReg 0x3C
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#define CursorXLow 0x40
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#define CursorXHigh 0x41
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#define CursorYLow 0x42
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#define CursorYHigh 0x43
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#define CursorLocLow 0x44
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#define CursorLocHigh 0x45
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#define CursorXOffset 0x46
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#define CursorYOffset 0x47
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#define CursorFG1 0x48
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#define CursorFG2 0x49
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#define CursorFG3 0x4A
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#define CursorFG4 0x4B
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#define CursorBG1 0x4C
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#define CursorBG2 0x4D
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#define CursorBG3 0x4E
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#define CursorBG4 0x4F
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#define CursorControl 0x50
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#define PCIRetry 0x55
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#define PreEndControl 0x56
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#define PreEndFetch 0x57
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#define PCIMaster 0x60
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#define Enhancement0 0x62
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#define NewEDO 0x64
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/* --- Additions by AMR for Vidix support --- */
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#define VideoWin1_HScale 0x80
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#define VideoWin1_VScale 0x82
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#define VideoWin1_Start 0x86
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#define VideoWin1_Stop 0x8a
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#define Video_Flags 0x8e
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#define VideoWin1_Y_BPR 0x90
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#define VideoWin1_Y_Offset 0x92
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#define Video_LineBufferThreshold 0x95
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#define Video_LineBufferLevel 0x96
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#define Video_Flags2 0x97
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/* --- */
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#define TVinterface 0xC0
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#define TVMode 0xC1
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#define ClockControl 0xCF
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/* 3CE */
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#define MiscExtFunc 0x0F
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#define MiscIntContReg 0x2F
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#define CyberControl 0x30
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#define CyberEnhance 0x31
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#define FPConfig 0x33
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#define VertStretch 0x52
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#define HorStretch 0x53
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#define BiosMode 0x5c
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#define BiosNewMode1 0x5a
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#define BiosNewMode2 0x5c
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#define BiosReg 0x5d
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/* --- IO Macros by AMR --- */
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#define CRINB(reg) (OUTPORT8(0x3d4,reg), INPORT8(0x3d5))
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#define SRINB(reg) (OUTPORT8(0x3c4,reg), INPORT8(0x3c5))
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#define CROUTB(reg,val) (OUTPORT8(0x3d4,reg), OUTPORT8(0x3d5,val))
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#define SROUTB(reg,val) (OUTPORT8(0x3c4,reg), OUTPORT8(0x3c5,val))
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/* --- */
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