mirror of
https://github.com/mpv-player/mpv
synced 2024-12-21 06:14:32 +00:00
0e8fba9ec8
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@26035 b3059339-0415-0410-9bf9-f77b7e298cf2
375 lines
10 KiB
C
375 lines
10 KiB
C
/*
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* Copyright (C) Colin Cross Apr 2000
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* changed by zsteva Aug/Sep 2001, see vo_3dfx.c
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*
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* This file is part of MPlayer.
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*
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* MPlayer is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* MPlayer is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with MPlayer; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#ifndef MPLAYER_3DFX_H
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#define MPLAYER_3DFX_H
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#define VOODOO_IO_REG_OFFSET ((unsigned long int)0x0000000)
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#define VOODOO_YUV_REG_OFFSET ((unsigned long int)0x0080100)
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#define VOODOO_AGP_REG_OFFSET ((unsigned long int)0x0080000)
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#define VOODOO_2D_REG_OFFSET ((unsigned long int)0x0100000)
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#define VOODOO_YUV_PLANE_OFFSET ((unsigned long int)0x0C00000)
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#define VOODOO_BLT_FORMAT_YUYV (8<<16)
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#define VOODOO_BLT_FORMAT_UYVY (9<<16)
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#define VOODOO_BLT_FORMAT_16 (3<<16)
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#define VOODOO_BLT_FORMAT_24 (4<<16)
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#define VOODOO_BLT_FORMAT_32 (5<<16)
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#define VOODOO_YUV_STRIDE (1024>>2)
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struct voodoo_yuv_fb_t {
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uint32_t Y[0x0040000];
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uint32_t U[0x0040000];
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uint32_t V[0x0040000];
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};
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struct voodoo_yuv_reg_t {
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uint32_t yuvBaseAddr;
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uint32_t yuvStride;
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};
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struct voodoo_2d_reg_t {
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uint32_t status;
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uint32_t intCtrl;
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uint32_t clip0Min;
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uint32_t clip0Max;
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uint32_t dstBaseAddr;
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uint32_t dstFormat;
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uint32_t srcColorkeyMin;
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uint32_t srcColorkeyMax;
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uint32_t dstColorkeyMin;
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uint32_t dstColorkeyMax;
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signed long bresError0;
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signed long bresError1;
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uint32_t rop;
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uint32_t srcBaseAddr;
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uint32_t commandExtra;
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uint32_t lineStipple;
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uint32_t lineStyle;
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uint32_t pattern0Alias;
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uint32_t pattern1Alias;;
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uint32_t clip1Min;
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uint32_t clip1Max;
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uint32_t srcFormat;
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uint32_t srcSize;
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uint32_t srcXY;
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uint32_t colorBack;
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uint32_t colorFore;
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uint32_t dstSize;
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uint32_t dstXY;
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uint32_t command;
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uint32_t RESERVED1;
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uint32_t RESERVED2;
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uint32_t RESERVED3;
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uint8_t launchArea[128];
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};
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struct voodoo_io_reg_t {
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uint32_t status;
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uint32_t pciInit0;
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uint32_t sipMonitor;
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uint32_t lfbMemoryConfig;
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uint32_t miscInit0;
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uint32_t miscInit1;
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uint32_t dramInit0;
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uint32_t dramInit1;
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uint32_t agpInit;
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uint32_t tmuGbeInit;
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uint32_t vgaInit0;
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uint32_t vgaInit1;
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uint32_t dramCommand;
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uint32_t dramData;
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uint32_t RESERVED1;
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uint32_t RESERVED2;
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uint32_t pllCtrl0;
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uint32_t pllCtrl1;
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uint32_t pllCtrl2;
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uint32_t dacMode;
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uint32_t dacAddr;
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uint32_t dacData;
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uint32_t rgbMaxDelta;
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uint32_t vidProcCfg;
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uint32_t hwCurPatAddr;
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uint32_t hwCurLoc;
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uint32_t hwCurC0;
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uint32_t hwCurC1;
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uint32_t vidInFormat;
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uint32_t vidInStatus;
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uint32_t vidSerialParallelPort;
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uint32_t vidInXDecimDeltas;
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uint32_t vidInDecimInitErrs;
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uint32_t vidInYDecimDeltas;
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uint32_t vidPixelBufThold;
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uint32_t vidChromaMin;
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uint32_t vidChromaMax;
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uint32_t vidCurrentLine;
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uint32_t vidScreenSize;
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uint32_t vidOverlayStartCoords;
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uint32_t vidOverlayEndScreenCoord;
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uint32_t vidOverlayDudx;
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uint32_t vidOverlayDudxOffsetSrcWidth;
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uint32_t vidOverlayDvdy;
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uint32_t vga_registers_not_mem_mapped[12];
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uint32_t vidOverlayDvdyOffset;
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uint32_t vidDesktopStartAddr;
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uint32_t vidDesktopOverlayStride;
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uint32_t vidInAddr0;
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uint32_t vidInAddr1;
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uint32_t vidInAddr2;
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uint32_t vidInStride;
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uint32_t vidCurrOverlayStartAddr;
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};
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struct pioData_t {
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short port;
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short size;
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int device;
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void *value;
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};
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typedef struct pioData_t pioData;
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typedef struct voodoo_2d_reg_t voodoo_2d_reg;
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typedef struct voodoo_io_reg_t voodoo_io_reg;
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typedef struct voodoo_yuv_reg_t voodoo_yuv_reg;
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typedef struct voodoo_yuv_fb_t voodoo_yuv_fb;
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/* from linux/driver/video/tdfxfb.c, definition for 3dfx registers.
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*
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* author: Hannu Mallat <hmallat@cc.hut.fi>
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*/
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#ifndef PCI_DEVICE_ID_3DFX_VOODOO5
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#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009
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#endif
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/* membase0 register offsets */
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#define STATUS 0x00
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#define PCIINIT0 0x04
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#define SIPMONITOR 0x08
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#define LFBMEMORYCONFIG 0x0c
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#define MISCINIT0 0x10
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#define MISCINIT1 0x14
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#define DRAMINIT0 0x18
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#define DRAMINIT1 0x1c
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#define AGPINIT 0x20
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#define TMUGBEINIT 0x24
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#define VGAINIT0 0x28
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#define VGAINIT1 0x2c
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#define DRAMCOMMAND 0x30
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#define DRAMDATA 0x34
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/* reserved 0x38 */
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/* reserved 0x3c */
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#define PLLCTRL0 0x40
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#define PLLCTRL1 0x44
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#define PLLCTRL2 0x48
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#define DACMODE 0x4c
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#define DACADDR 0x50
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#define DACDATA 0x54
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#define RGBMAXDELTA 0x58
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#define VIDPROCCFG 0x5c
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#define HWCURPATADDR 0x60
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#define HWCURLOC 0x64
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#define HWCURC0 0x68
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#define HWCURC1 0x6c
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#define VIDINFORMAT 0x70
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#define VIDINSTATUS 0x74
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#define VIDSERPARPORT 0x78
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#define VIDINXDELTA 0x7c
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#define VIDININITERR 0x80
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#define VIDINYDELTA 0x84
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#define VIDPIXBUFTHOLD 0x88
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#define VIDCHRMIN 0x8c
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#define VIDCHRMAX 0x90
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#define VIDCURLIN 0x94
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#define VIDSCREENSIZE 0x98
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#define VIDOVRSTARTCRD 0x9c
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#define VIDOVRENDCRD 0xa0
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#define VIDOVRDUDX 0xa4
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#define VIDOVRDUDXOFF 0xa8
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#define VIDOVRDVDY 0xac
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/* ... */
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#define VIDOVRDVDYOFF 0xe0
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#define VIDDESKSTART 0xe4
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#define VIDDESKSTRIDE 0xe8
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#define VIDINADDR0 0xec
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#define VIDINADDR1 0xf0
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#define VIDINADDR2 0xf4
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#define VIDINSTRIDE 0xf8
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#define VIDCUROVRSTART 0xfc
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#define INTCTRL (0x00100000 + 0x04)
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#define CLIP0MIN (0x00100000 + 0x08)
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#define CLIP0MAX (0x00100000 + 0x0c)
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#define DSTBASE (0x00100000 + 0x10)
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#define DSTFORMAT (0x00100000 + 0x14)
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#define SRCCOLORKEYMIN (0x00100000 + 0x18)
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#define SRCCOLORKEYMAX (0x00100000 + 0x1c)
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#define DSTCOLORKEYMIN (0x00100000 + 0x20)
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#define DSTCOLORKEYMAX (0x00100000 + 0x24)
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#define ROP123 (0x00100000 + 0x30)
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#define SRCBASE (0x00100000 + 0x34)
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#define COMMANDEXTRA_2D (0x00100000 + 0x38)
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#define CLIP1MIN (0x00100000 + 0x4c)
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#define CLIP1MAX (0x00100000 + 0x50)
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#define SRCFORMAT (0x00100000 + 0x54)
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#define SRCSIZE (0x00100000 + 0x58)
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#define SRCXY (0x00100000 + 0x5c)
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#define COLORBACK (0x00100000 + 0x60)
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#define COLORFORE (0x00100000 + 0x64)
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#define DSTSIZE (0x00100000 + 0x68)
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#define DSTXY (0x00100000 + 0x6c)
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#define COMMAND_2D (0x00100000 + 0x70)
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#define LAUNCH_2D (0x00100000 + 0x80)
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#define COMMAND_3D (0x00200000 + 0x120)
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#define SWAPBUFCMD (0x00200000 + 0x128)
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#define SWAPPENDING (0x00200000 + 0x24C)
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#define LEFTOVBUF (0x00200000 + 0x250)
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#define RIGHTOVBUF (0x00200000 + 0x254)
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#define FBISWAPBUFHIST (0x00200000 + 0x258)
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/* register bitfields (not all, only as needed) */
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#define BIT(x) (1UL << (x))
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/* COMMAND_2D reg. values */
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#define ROP_COPY 0xcc // src
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#define ROP_INVERT 0x55 // NOT dst
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#define ROP_XOR 0x66 // src XOR dst
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#define ROP_OR (0xee) /* src | dst */
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#define AUTOINC_DSTX BIT(10)
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#define AUTOINC_DSTY BIT(11)
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#define COMMAND_2D_S2S_BITBLT 0x01 // screen to screen
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#define COMMAND_2D_S2S_STRECH_BLT 0x02 // BLT + Strech
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#define COMMAND_2D_H2S_BITBLT 0x03 // host to screen
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#define COMMAND_2D_FILLRECT 0x05
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#define COMMAND_2D_DO_IMMED BIT(8) // Do it immediatly
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#define COMMAND_3D_NOP 0x00
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#define STATUS_RETRACE BIT(6)
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#define STATUS_BUSY BIT(9)
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#define MISCINIT1_CLUT_INV BIT(0)
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#define MISCINIT1_2DBLOCK_DIS BIT(15)
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#define DRAMINIT0_SGRAM_NUM BIT(26)
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#define DRAMINIT0_SGRAM_TYPE BIT(27)
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#define DRAMINIT1_MEM_SDRAM BIT(30)
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#define VGAINIT0_VGA_DISABLE BIT(0)
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#define VGAINIT0_EXT_TIMING BIT(1)
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#define VGAINIT0_8BIT_DAC BIT(2)
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#define VGAINIT0_EXT_ENABLE BIT(6)
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#define VGAINIT0_WAKEUP_3C3 BIT(8)
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#define VGAINIT0_LEGACY_DISABLE BIT(9)
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#define VGAINIT0_ALT_READBACK BIT(10)
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#define VGAINIT0_FAST_BLINK BIT(11)
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#define VGAINIT0_EXTSHIFTOUT BIT(12)
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#define VGAINIT0_DECODE_3C6 BIT(13)
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#define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22)
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#define VGAINIT1_MASK 0x1fffff
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#define VIDCFG_VIDPROC_ENABLE BIT(0)
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#define VIDCFG_CURS_X11 BIT(1)
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#define VIDCFG_HALF_MODE BIT(4)
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#define VIDCFG_DESK_ENABLE BIT(7)
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#define VIDCFG_CLUT_BYPASS BIT(10)
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#define VIDCFG_2X BIT(26)
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#define VIDCFG_HWCURSOR_ENABLE BIT(27)
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#define VIDCFG_PIXFMT_SHIFT 18
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#define DACMODE_2X BIT(0)
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/* AGP registers */
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#define AGPREQSIZE (0x0080000 + 0x00)
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#define AGPHOSTADDRESSLOW (0x0080000 + 0x04)
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#define AGPHOSTADDRESSHIGH (0x0080000 + 0x08)
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#define AGPGRAPHICSADDRESS (0x0080000 + 0x0C)
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#define AGPGRAPHICSSTRIDE (0x0080000 + 0x10)
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#define AGPMOVECMD (0x0080000 + 0x14)
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/* FIFO registers */
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#define CMDBASEADDR0 (0x0080000 + 0x20)
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#define CMDBASESIZE0 (0x0080000 + 0x24)
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#define CMDBUMP0 (0x0080000 + 0x28)
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#define CMDRDPTRL0 (0x0080000 + 0x2C)
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#define CMDRDPTRH0 (0x0080000 + 0x30)
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#define CMDAMIN0 (0x0080000 + 0x34)
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#define CMDAMAX0 (0x0080000 + 0x38)
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#define CMDFIFODEPTH0 (0x0080000 + 0x44)
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#define CMDHOLECNT0 (0x0080000 + 0x48)
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/* YUV reisters */
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#define YUVBASEADDRESS (0x0080000 + 0x100)
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#define YUVSTRIDE (0x0080000 + 0x104)
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/* VGA rubbish, need to change this for multihead support */
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#define MISC_W 0x3c2
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#define MISC_R 0x3cc
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#define SEQ_I 0x3c4
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#define SEQ_D 0x3c5
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#define CRT_I 0x3d4
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#define CRT_D 0x3d5
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#define ATT_IW 0x3c0
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#define RAMDAC_R 0x3c7
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#define RAMDAC_W 0x3c8
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#define RAMDAC_D 0x3c9
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#define IS1_R 0x3da
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#define GRA_I 0x3ce
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#define GRA_D 0x3cf
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#ifndef FB_ACCEL_3DFX_BANSHEE
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#define FB_ACCEL_3DFX_BANSHEE 31
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#endif
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#define TDFXF_HSYNC_ACT_HIGH 0x01
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#define TDFXF_HSYNC_ACT_LOW 0x02
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#define TDFXF_VSYNC_ACT_HIGH 0x04
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#define TDFXF_VSYNC_ACT_LOW 0x08
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#define TDFXF_LINE_DOUBLE 0x10
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#define TDFXF_VIDEO_ENABLE 0x20
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#define TDFXF_HSYNC_MASK 0x03
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#define TDFXF_VSYNC_MASK 0x0c
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#define XYREG(x,y) (((((unsigned long)y) & 0x1FFF) << 16) | (((unsigned long)x) & 0x1FFF))
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//#define TDFXFB_DEBUG
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#ifdef TDFXFB_DEBUG
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#define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b)
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#else
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#define DPRINTK(a,b...)
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#endif
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/* ------------------------------------------------------------------------- */
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#endif /* MPLAYER_3DFX_H */
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