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https://github.com/mpv-player/mpv
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More flags; sync with Linux kernel.
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@29111 b3059339-0415-0410-9bf9-f77b7e298cf2
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parent
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commit
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11
cpuinfo.c
11
cpuinfo.c
@ -186,6 +186,8 @@ main(void)
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char *desc;
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} cap2[] = {
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CPUID_FEATURE_DEF(0, "pni", "SSE3 Extensions"),
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CPUID_FEATURE_DEF(1, "pclmulqdq", "Carryless Multiplication"),
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CPUID_FEATURE_DEF(2, "dtes64", "64-bit Debug Store"),
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CPUID_FEATURE_DEF(3, "monitor", "MONITOR/MWAIT"),
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CPUID_FEATURE_DEF(4, "ds_cpl", "CPL Qualified Debug Store"),
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CPUID_FEATURE_DEF(5, "vmx", "Virtual Machine Extensions"),
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@ -194,13 +196,20 @@ main(void)
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CPUID_FEATURE_DEF(8, "tm2", "Thermal Monitor 2"),
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CPUID_FEATURE_DEF(9, "ssse3", "Supplemental SSE3"),
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CPUID_FEATURE_DEF(10, "cid", "L1 Context ID"),
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CPUID_FEATURE_DEF(12, "fma", "Fused Multiply Add"),
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CPUID_FEATURE_DEF(13, "cx16", "CMPXCHG16B Available"),
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CPUID_FEATURE_DEF(14, "xtpr", "xTPR Disable"),
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CPUID_FEATURE_DEF(15, "pdcm", "Perf/Debug Capability MSR"),
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CPUID_FEATURE_DEF(18, "dca", "Direct Cache Access"),
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CPUID_FEATURE_DEF(19, "sse4_1", "SSE4.1 Extensions"),
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CPUID_FEATURE_DEF(20, "sse4_2", "SSE4.2 Extensions"),
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CPUID_FEATURE_DEF(21, "x2apic", "x2APIC Feature"),
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CPUID_FEATURE_DEF(22, "movbe", "MOVBE Instruction"),
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CPUID_FEATURE_DEF(23, "popcnt", "Pop Count Instruction"),
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CPUID_FEATURE_DEF(25, "aes", "AES Instruction"),
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CPUID_FEATURE_DEF(26, "xsave", "XSAVE/XRSTOR Extensions"),
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CPUID_FEATURE_DEF(27, "osxsave", "XSAVE/XRSTOR Enabled in the OS"),
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CPUID_FEATURE_DEF(28, "avx", "Advanced Vector Extension"),
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{ -1 }
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};
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static struct {
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@ -227,7 +236,7 @@ main(void)
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CPUID_FEATURE_DEF(1, "cmp_legacy", "Chip Multi-Core"),
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CPUID_FEATURE_DEF(2, "svm", "Secure Virtual Machine"),
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CPUID_FEATURE_DEF(3, "extapic", "Extended APIC Space"),
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CPUID_FEATURE_DEF(4, "cr8legacy", "CR8 Available in Legacy Mode"),
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CPUID_FEATURE_DEF(4, "cr8_legacy", "CR8 Available in Legacy Mode"),
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CPUID_FEATURE_DEF(5, "abm", "Advanced Bit Manipulation"),
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CPUID_FEATURE_DEF(6, "sse4a", "SSE4A Extensions"),
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CPUID_FEATURE_DEF(7, "misalignsse", "Misaligned SSE Mode"),
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