Remove compile time/runtime CPU detection, and drop some platforms

mplayer had three ways of enabling CPU specific assembler routines:
a) Enable them at compile time; crash if the CPU can't handle it.
b) Enable them at compile time, but let the configure script detect
   your CPU. Your binary will only crash if you try to run it on a
   different system that has less features than yours.
   This was the default, I think.
c) Runtime detection.

The implementation of b) and c) suck. a) is not really feasible (it
sucks for users). Remove all code related to this, and use libav's CPU
detection instead. Now the configure script will always enable CPU
specific features, and disable them at runtime if libav reports them
not as available.

One implication is that now the compiler is always expected to handle
SSE (etc.) inline assembly at runtime, unless it's explicitly disabled.

Only checks for x86 CPU specific features are kept, the rest is either
unused or barely used.

Get rid of all the dump -mpcu, -march etc. flags. Trust the compiler
to select decent settings.

Get rid of support for the following operating systems:
- BSD/OS (some ancient BSD fork)
- QNX (don't care)
- BeOS (dead, Haiku support is still welcome)
- AIX (don't care)
- HP-UX (don't care)
- OS/2 (dead, actual support has been removed a while ago)

Remove the configure code for detecting the endianness. Instead, use
the standard header <endian.h>, which can be used if _GNU_SOURCE or
_BSD_SOURCE is defined. (Maybe these changes should have been in a
separate commit.)

Since this is a quite violent code removal orgy, and I'm testing only
on x86 32 bit Linux, expect regressions.
This commit is contained in:
wm4 2012-07-29 17:20:57 +02:00
parent a4bab723b3
commit 74df1d8e05
22 changed files with 127 additions and 1616 deletions

1082
configure vendored

File diff suppressed because it is too large Load Diff

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@ -16,497 +16,41 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <libavutil/cpu.h>
#include "config.h"
#include "cpudetect.h"
#include "mp_msg.h"
CpuCaps gCpuCaps;
#include <stdlib.h>
static void dump_flag(const char *name, bool val)
{
mp_msg(MSGT_CPUDETECT, MSGL_V, "CPU: %s: %s\n", name,
val ? "enabled" : "disabled");
}
void GetCpuCaps(CpuCaps *c)
{
memset(c, 0, sizeof(*c));
int flags = av_get_cpu_flags();
#if ARCH_X86
#include <stdio.h>
#include <string.h>
#if defined (__NetBSD__) || defined(__OpenBSD__)
#include <sys/param.h>
#include <sys/sysctl.h>
#include <machine/cpu.h>
#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__APPLE__)
#include <sys/types.h>
#include <sys/sysctl.h>
#elif defined(__linux__)
#include <signal.h>
#elif defined(__MINGW32__) || defined(__CYGWIN__)
#include <windows.h>
#elif defined(__AMIGAOS4__)
#include <proto/exec.h>
c->isX86 = 1;
c->hasMMX = flags & AV_CPU_FLAG_MMX;
c->hasMMX2 = flags & AV_CPU_FLAG_MMX2;
c->hasSSE = flags & AV_CPU_FLAG_SSE;
c->hasSSE2 = (flags & AV_CPU_FLAG_SSE2) && !(flags & AV_CPU_FLAG_SSE2SLOW);
c->hasSSE3 = (flags & AV_CPU_FLAG_SSE3) && !(flags & AV_CPU_FLAG_SSE3SLOW);
c->hasSSSE3 = flags & AV_CPU_FLAG_SSSE3;
#endif
/* Thanks to the FreeBSD project for some of this cpuid code, and
* help understanding how to use it. Thanks to the Mesa
* team for SSE support detection and more cpu detect code.
*/
#if CONFIG_RUNTIME_CPUDETECT
/* I believe this code works. However, it has only been used on a PII and PIII */
#if defined(__linux__) && defined(_POSIX_SOURCE) && !ARCH_X86_64
static void sigill_handler_sse( int signal, struct sigcontext sc )
{
mp_msg(MSGT_CPUDETECT,MSGL_V, "SIGILL, " );
/* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
* instructions are 3 bytes long. We must increment the instruction
* pointer manually to avoid repeated execution of the offending
* instruction.
*
* If the SIGILL is caused by a divide-by-zero when unmasked
* exceptions aren't supported, the SIMD FPU status and control
* word will be restored at the end of the test, so we don't need
* to worry about doing it here. Besides, we may not be able to...
*/
sc.eip += 3;
gCpuCaps.hasSSE=0;
dump_flag("MMX", c->hasMMX);
dump_flag("MMX2", c->hasMMX2);
dump_flag("SSE", c->hasSSE);
dump_flag("SSE2", c->hasSSE2);
dump_flag("SSE3", c->hasSSE3);
dump_flag("SSSE3", c->hasSSSE3);
}
#endif /* __linux__ && _POSIX_SOURCE */
#if (defined(__MINGW32__) || defined(__CYGWIN__)) && !ARCH_X86_64
LONG CALLBACK win32_sig_handler_sse(EXCEPTION_POINTERS* ep)
{
if(ep->ExceptionRecord->ExceptionCode==EXCEPTION_ILLEGAL_INSTRUCTION){
mp_msg(MSGT_CPUDETECT,MSGL_V, "SIGILL, " );
ep->ContextRecord->Eip +=3;
gCpuCaps.hasSSE=0;
return EXCEPTION_CONTINUE_EXECUTION;
}
return EXCEPTION_CONTINUE_SEARCH;
}
#endif /* defined(__MINGW32__) || defined(__CYGWIN__) */
/* If we're running on a processor that can do SSE, let's see if we
* are allowed to or not. This will catch 2.4.0 or later kernels that
* haven't been configured for a Pentium III but are running on one,
* and RedHat patched 2.2 kernels that have broken exception handling
* support for user space apps that do SSE.
*/
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
#define SSE_SYSCTL_NAME "hw.instruction_sse"
#elif defined(__APPLE__)
#define SSE_SYSCTL_NAME "hw.optional.sse"
#endif
static void check_os_katmai_support( void )
{
#if ARCH_X86_64
gCpuCaps.hasSSE=1;
gCpuCaps.hasSSE2=1;
#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__APPLE__)
int has_sse=0, ret;
size_t len=sizeof(has_sse);
ret = sysctlbyname(SSE_SYSCTL_NAME, &has_sse, &len, NULL, 0);
if (ret || !has_sse)
gCpuCaps.hasSSE=0;
#elif defined(__NetBSD__) || defined (__OpenBSD__)
#if __NetBSD_Version__ >= 105250000 || (defined __OpenBSD__)
int has_sse, has_sse2, ret, mib[2];
size_t varlen;
mib[0] = CTL_MACHDEP;
mib[1] = CPU_SSE;
varlen = sizeof(has_sse);
mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
ret = sysctl(mib, 2, &has_sse, &varlen, NULL, 0);
gCpuCaps.hasSSE = ret >= 0 && has_sse;
mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
mib[1] = CPU_SSE2;
varlen = sizeof(has_sse2);
mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE2... " );
ret = sysctl(mib, 2, &has_sse2, &varlen, NULL, 0);
gCpuCaps.hasSSE2 = ret >= 0 && has_sse2;
mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE2 ? "yes.\n" : "no!\n" );
#else
gCpuCaps.hasSSE = 0;
mp_msg(MSGT_CPUDETECT,MSGL_WARN, "No OS support for SSE, disabling to be safe.\n" );
#endif
#elif defined(__MINGW32__) || defined(__CYGWIN__)
LPTOP_LEVEL_EXCEPTION_FILTER exc_fil;
if ( gCpuCaps.hasSSE ) {
mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
exc_fil = SetUnhandledExceptionFilter(win32_sig_handler_sse);
__asm__ volatile ("xorps %xmm0, %xmm0");
SetUnhandledExceptionFilter(exc_fil);
mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
}
#elif defined(__linux__)
#if defined(_POSIX_SOURCE)
struct sigaction saved_sigill;
/* Save the original signal handlers.
*/
sigaction( SIGILL, NULL, &saved_sigill );
signal( SIGILL, (void (*)(int))sigill_handler_sse );
/* Emulate test for OSFXSR in CR4. The OS will set this bit if it
* supports the extended FPU save and restore required for SSE. If
* we execute an SSE instruction on a PIII and get a SIGILL, the OS
* doesn't support Streaming SIMD Exceptions, even if the processor
* does.
*/
if ( gCpuCaps.hasSSE ) {
mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
// __asm__ volatile ("xorps %%xmm0, %%xmm0");
__asm__ volatile ("xorps %xmm0, %xmm0");
mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
}
/* Restore the original signal handlers.
*/
sigaction( SIGILL, &saved_sigill, NULL );
/* If we've gotten to here and the XMM CPUID bit is still set, we're
* safe to go ahead and hook out the SSE code throughout Mesa.
*/
mp_msg(MSGT_CPUDETECT,MSGL_V, "Tests of OS support for SSE %s\n", gCpuCaps.hasSSE ? "passed." : "failed!" );
#else
/* We can't use POSIX signal handling to test the availability of
* SSE, so we disable it by default.
*/
mp_msg(MSGT_CPUDETECT,MSGL_WARN, "Cannot test OS support for SSE, disabling to be safe.\n" );
gCpuCaps.hasSSE=0;
#endif /* _POSIX_SOURCE */
#else
/* Do nothing on other platforms for now.
*/
mp_msg(MSGT_CPUDETECT,MSGL_WARN, "Cannot test OS support for SSE, leaving disabled.\n" );
gCpuCaps.hasSSE=0;
#endif /* __linux__ */
}
#endif
// return TRUE if cpuid supported
static int has_cpuid(void)
{
// code from libavcodec:
#if ARCH_X86_64
return 1;
#else
long a, c;
__asm__ volatile (
/* See if CPUID instruction is supported ... */
/* ... Get copies of EFLAGS into eax and ecx */
"pushfl\n\t"
"pop %0\n\t"
"mov %0, %1\n\t"
/* ... Toggle the ID bit in one copy and store */
/* to the EFLAGS reg */
"xor $0x200000, %0\n\t"
"push %0\n\t"
"popfl\n\t"
/* ... Get the (hopefully modified) EFLAGS */
"pushfl\n\t"
"pop %0\n\t"
: "=a" (a), "=c" (c)
:
: "cc"
);
return a != c;
#endif
}
void
do_cpuid(unsigned int ax, unsigned int *p)
{
// code from libavcodec:
__asm__ volatile
("mov %%"REG_b", %%"REG_S"\n\t"
"cpuid\n\t"
"xchg %%"REG_b", %%"REG_S
: "=a" (p[0]), "=S" (p[1]),
"=c" (p[2]), "=d" (p[3])
: "0" (ax));
}
void GetCpuCaps( CpuCaps *caps)
{
unsigned int regs[4];
unsigned int regs2[4];
memset(caps, 0, sizeof(*caps));
caps->isX86=1;
caps->cl_size=32; /* default */
if (!has_cpuid()) {
mp_msg(MSGT_CPUDETECT,MSGL_WARN,"CPUID not supported!??? (maybe an old 486?)\n");
return;
}
do_cpuid(0x00000000, regs); // get _max_ cpuid level and vendor name
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU vendor name: %.4s%.4s%.4s max cpuid level: %d\n",
(char*) (regs+1),(char*) (regs+3),(char*) (regs+2), regs[0]);
if (regs[0]>=0x00000001)
{
char *tmpstr, *ptmpstr;
unsigned cl_size;
do_cpuid(0x00000001, regs2);
caps->cpuType=(regs2[0] >> 8)&0xf;
caps->cpuModel=(regs2[0] >> 4)&0xf;
// see AMD64 Architecture Programmer's Manual, Volume 3: General-purpose and
// System Instructions, Table 3-2: Effective family computation, page 120.
if(caps->cpuType==0xf){
// use extended family (P4, IA64, K8)
caps->cpuType=0xf+((regs2[0]>>20)&255);
}
if(caps->cpuType==0xf || caps->cpuType==6)
caps->cpuModel |= ((regs2[0]>>16)&0xf) << 4;
caps->cpuStepping=regs2[0] & 0xf;
// general feature flags:
caps->hasTSC = (regs2[3] & (1 << 8 )) >> 8; // 0x0000010
caps->hasMMX = (regs2[3] & (1 << 23 )) >> 23; // 0x0800000
caps->hasSSE = (regs2[3] & (1 << 25 )) >> 25; // 0x2000000
caps->hasSSE2 = (regs2[3] & (1 << 26 )) >> 26; // 0x4000000
caps->hasSSE3 = (regs2[2] & 1); // 0x0000001
caps->hasSSSE3 = (regs2[2] & (1 << 9 )) >> 9; // 0x0000200
caps->hasMMX2 = caps->hasSSE; // SSE cpus supports mmxext too
cl_size = ((regs2[1] >> 8) & 0xFF)*8;
if(cl_size) caps->cl_size = cl_size;
ptmpstr=tmpstr=GetCpuFriendlyName(regs, regs2);
while(*ptmpstr == ' ') // strip leading spaces
ptmpstr++;
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: %s ", ptmpstr);
free(tmpstr);
mp_msg(MSGT_CPUDETECT,MSGL_V,"(Family: %d, Model: %d, Stepping: %d)\n",
caps->cpuType, caps->cpuModel, caps->cpuStepping);
}
do_cpuid(0x80000000, regs);
if (regs[0]>=0x80000001) {
mp_msg(MSGT_CPUDETECT,MSGL_V,"extended cpuid-level: %d\n",regs[0]&0x7FFFFFFF);
do_cpuid(0x80000001, regs2);
caps->hasMMX |= (regs2[3] & (1 << 23 )) >> 23; // 0x0800000
caps->hasMMX2 |= (regs2[3] & (1 << 22 )) >> 22; // 0x400000
caps->has3DNow = (regs2[3] & (1 << 31 )) >> 31; //0x80000000
caps->has3DNowExt = (regs2[3] & (1 << 30 )) >> 30;
caps->hasSSE4a = (regs2[2] & (1 << 6 )) >> 6; // 0x0000040
}
if(regs[0]>=0x80000006)
{
do_cpuid(0x80000006, regs2);
mp_msg(MSGT_CPUDETECT,MSGL_V,"extended cache-info: %d\n",regs2[2]&0x7FFFFFFF);
caps->cl_size = regs2[2] & 0xFF;
}
mp_msg(MSGT_CPUDETECT,MSGL_V,"Detected cache-line size is %u bytes\n",caps->cl_size);
#if 0
mp_msg(MSGT_CPUDETECT,MSGL_INFO,"cpudetect: MMX=%d MMX2=%d SSE=%d SSE2=%d 3DNow=%d 3DNowExt=%d\n",
gCpuCaps.hasMMX,
gCpuCaps.hasMMX2,
gCpuCaps.hasSSE,
gCpuCaps.hasSSE2,
gCpuCaps.has3DNow,
gCpuCaps.has3DNowExt);
#endif
#if CONFIG_RUNTIME_CPUDETECT
/* FIXME: Does SSE2 need more OS support, too? */
if (caps->hasSSE)
check_os_katmai_support();
if (!caps->hasSSE)
caps->hasSSE2 = 0;
// caps->has3DNow=1;
// caps->hasMMX2 = 0;
// caps->hasMMX = 0;
#else
#if !HAVE_MMX
if(caps->hasMMX) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"MMX supported but disabled\n");
caps->hasMMX=0;
#endif
#if !HAVE_MMX2
if(caps->hasMMX2) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"MMX2 supported but disabled\n");
caps->hasMMX2=0;
#endif
#if !HAVE_SSE
if(caps->hasSSE) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"SSE supported but disabled\n");
caps->hasSSE=0;
#endif
#if !HAVE_SSE2
if(caps->hasSSE2) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"SSE2 supported but disabled\n");
caps->hasSSE2=0;
#endif
#if !HAVE_AMD3DNOW
if(caps->has3DNow) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"3DNow supported but disabled\n");
caps->has3DNow=0;
#endif
#if !HAVE_AMD3DNOWEXT
if(caps->has3DNowExt) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"3DNowExt supported but disabled\n");
caps->has3DNowExt=0;
#endif
#endif // CONFIG_RUNTIME_CPUDETECT
}
char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]){
char vendor[13];
char *retname;
int i;
if (NULL==(retname=malloc(256))) {
mp_msg(MSGT_CPUDETECT,MSGL_FATAL,"Error: GetCpuFriendlyName() not enough memory\n");
exit(1);
}
retname[0] = '\0';
sprintf(vendor,"%.4s%.4s%.4s",(char*)(regs+1),(char*)(regs+3),(char*)(regs+2));
do_cpuid(0x80000000,regs);
if (regs[0] >= 0x80000004)
{
// CPU has built-in namestring
for (i = 0x80000002; i <= 0x80000004; i++)
{
do_cpuid(i, regs);
strncat(retname, (char*)regs, 16);
}
}
return retname;
}
#else /* ARCH_X86 */
#ifdef __APPLE__
#include <sys/sysctl.h>
#elif defined(__AMIGAOS4__)
/* nothing */
#else
#include <signal.h>
#include <setjmp.h>
static sigjmp_buf jmpbuf;
static volatile sig_atomic_t canjump = 0;
static void sigill_handler (int sig)
{
if (!canjump) {
signal (sig, SIG_DFL);
raise (sig);
}
canjump = 0;
siglongjmp (jmpbuf, 1);
}
#endif /* __APPLE__ */
void GetCpuCaps( CpuCaps *caps)
{
caps->cpuType=0;
caps->cpuModel=0;
caps->cpuStepping=0;
caps->hasMMX=0;
caps->hasMMX2=0;
caps->has3DNow=0;
caps->has3DNowExt=0;
caps->hasSSE=0;
caps->hasSSE2=0;
caps->hasSSE3=0;
caps->hasSSSE3=0;
caps->hasSSE4a=0;
caps->isX86=0;
caps->hasAltiVec = 0;
#if HAVE_ALTIVEC
#ifdef __APPLE__
/*
rip-off from ffmpeg altivec detection code.
this code also appears on Apple's AltiVec pages.
*/
{
int sels[2] = {CTL_HW, HW_VECTORUNIT};
int has_vu = 0;
size_t len = sizeof(has_vu);
int err;
err = sysctl(sels, 2, &has_vu, &len, NULL, 0);
if (err == 0)
if (has_vu != 0)
caps->hasAltiVec = 1;
}
#elif defined(__AMIGAOS4__)
ULONG result = 0;
GetCPUInfoTags(GCIT_VectorUnit, &result, TAG_DONE);
if (result == VECTORTYPE_ALTIVEC)
caps->hasAltiVec = 1;
#else
/* no Darwin, do it the brute-force way */
/* this is borrowed from the libmpeg2 library */
{
signal (SIGILL, sigill_handler);
if (sigsetjmp (jmpbuf, 1)) {
signal (SIGILL, SIG_DFL);
} else {
canjump = 1;
__asm__ volatile ("mtspr 256, %0\n\t"
"vand %%v0, %%v0, %%v0"
:
: "r" (-1));
signal (SIGILL, SIG_DFL);
caps->hasAltiVec = 1;
}
}
#endif /* __APPLE__ */
mp_msg(MSGT_CPUDETECT,MSGL_V,"AltiVec %sfound\n", (caps->hasAltiVec ? "" : "not "));
#endif /* HAVE_ALTIVEC */
if (ARCH_IA64)
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: Intel Itanium\n");
if (ARCH_SPARC)
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: Sun Sparc\n");
if (ARCH_ARM)
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: ARM\n");
if (ARCH_PPC)
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: PowerPC\n");
if (ARCH_ALPHA)
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: Digital Alpha\n");
if (ARCH_MIPS)
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: MIPS\n");
if (ARCH_PA_RISC)
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: Hewlett-Packard PA-RISC\n");
if (ARCH_S390)
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: IBM S/390\n");
if (ARCH_S390X)
mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: IBM S/390X\n");
if (ARCH_VAX)
mp_msg(MSGT_CPUDETECT,MSGL_V, "CPU: Digital VAX\n" );
if (ARCH_XTENSA)
mp_msg(MSGT_CPUDETECT,MSGL_V, "CPU: Tensilica Xtensa\n" );
}
#endif /* !ARCH_X86 */

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@ -19,6 +19,7 @@
#ifndef MPLAYER_CPUDETECT_H
#define MPLAYER_CPUDETECT_H
#include <stdbool.h>
#include "config.h"
#define CPUTYPE_I386 3
@ -30,21 +31,16 @@
typedef struct cpucaps_s {
int cpuType;
int cpuModel;
int cpuStepping;
int hasMMX;
int hasMMX2;
int has3DNow;
int has3DNowExt;
int hasSSE;
int hasSSE2;
int hasSSE3;
int hasSSSE3;
int hasSSE4a;
int isX86;
unsigned cl_size; /* size of cache line */
int hasAltiVec;
int hasTSC;
bool isX86;
bool hasMMX;
bool hasMMX2;
bool has3DNow;
bool has3DNowExt;
bool hasSSE;
bool hasSSE2;
bool hasSSE3;
bool hasSSSE3;
} CpuCaps;
extern CpuCaps gCpuCaps;

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@ -26,6 +26,7 @@
#include <inttypes.h>
#include <limits.h>
#include <math.h>
#include <endian.h>
#include "config.h"
#include "af.h"
@ -334,7 +335,7 @@ af_info_t af_info_format = {
};
static inline uint32_t load24bit(void* data, int pos) {
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
return (((uint32_t)((uint8_t*)data)[3*pos])<<24) |
(((uint32_t)((uint8_t*)data)[3*pos+1])<<16) |
(((uint32_t)((uint8_t*)data)[3*pos+2])<<8);
@ -346,7 +347,7 @@ static inline uint32_t load24bit(void* data, int pos) {
}
static inline void store24bit(void* data, int pos, uint32_t expanded_value) {
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
((uint8_t*)data)[3*pos]=expanded_value>>24;
((uint8_t*)data)[3*pos+1]=expanded_value>>16;
((uint8_t*)data)[3*pos+2]=expanded_value>>8;

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@ -23,6 +23,7 @@
#ifndef MPLAYER_AF_FORMAT_H
#define MPLAYER_AF_FORMAT_H
#include <endian.h>
#include "config.h"
// Endianness
@ -30,7 +31,7 @@
#define AF_FORMAT_LE (1<<0) // Little Endian
#define AF_FORMAT_END_MASK (1<<0)
#if HAVE_BIGENDIAN // Native endian of cpu
#if BYTE_ORDER == BIG_ENDIAN
#define AF_FORMAT_NE AF_FORMAT_BE
#else
#define AF_FORMAT_NE AF_FORMAT_LE
@ -86,7 +87,7 @@
#define AF_FORMAT_AC3_LE (AF_FORMAT_AC3|AF_FORMAT_16BIT|AF_FORMAT_LE)
#define AF_FORMAT_AC3_BE (AF_FORMAT_AC3|AF_FORMAT_16BIT|AF_FORMAT_BE)
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
#define AF_FORMAT_U16_NE AF_FORMAT_U16_BE
#define AF_FORMAT_S16_NE AF_FORMAT_S16_BE
#define AF_FORMAT_U24_NE AF_FORMAT_U24_BE

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@ -44,6 +44,7 @@
#include <inttypes.h>
#include <sys/types.h>
#include <unistd.h>
#include <endian.h>
#include "config.h"
#include "mp_msg.h"
@ -820,7 +821,7 @@ static int OpenSPDIF(void)
/* FIXME: If output stream is not native byte-order, we need change endian somewhere. */
/* Although there's no such case reported. */
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
if (!(ao->stream_format.mFormatFlags & kAudioFormatFlagIsBigEndian))
#else
/* tell mplayer that we need a byteswap on AC3 streams, */

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@ -29,6 +29,7 @@
#include <fcntl.h>
#include <errno.h>
#include <string.h>
#include <endian.h>
#include "config.h"
#include "mp_msg.h"
@ -320,7 +321,7 @@ ac3_retry:
ao_data.format=format;
oss_format=format2oss(format);
if (oss_format == -1) {
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
oss_format=AFMT_S16_BE;
#else
oss_format=AFMT_S16_LE;

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@ -20,11 +20,13 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#define _GNU_SOURCE
#define _XOPEN_SOURCE 600
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <endian.h>
#include <libavutil/intreadwrite.h>
#include <libavutil/common.h>
@ -551,7 +553,7 @@ static int decode_audio_dts(unsigned char *indata_ptr, int len, unsigned char *b
buf16[3] = fsize << 3;
if (!convert_16bits) {
#if HAVE_BIGENDIAN
#ifdef BIG_ENDIAN
/* BE stream */
if (indata_ptr[0] == 0x1f || indata_ptr[0] == 0x7f)
#else

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@ -16,6 +16,7 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#define _GNU_SOURCE
#define _XOPEN_SOURCE 600
#include <stdio.h>
#include <stdlib.h>
@ -191,9 +192,6 @@ static int init(sh_audio_t *sh_audio)
if(gCpuCaps.has3DNow) a52_accel|=MM_ACCEL_X86_3DNOW;
#ifdef MM_ACCEL_X86_3DNOWEXT
if(gCpuCaps.has3DNowExt) a52_accel|=MM_ACCEL_X86_3DNOWEXT;
#endif
#ifdef MM_ACCEL_PPC_ALTIVEC
if(gCpuCaps.hasAltiVec) a52_accel|=MM_ACCEL_PPC_ALTIVEC;
#endif
a52_state=a52_init (a52_accel);
if (a52_state == NULL) {

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@ -19,6 +19,7 @@
#ifndef MPLAYER_IMG_FORMAT_H
#define MPLAYER_IMG_FORMAT_H
#include <endian.h>
#include "config.h"
/* RGB/BGR Formats */
@ -51,7 +52,7 @@
#define IMGFMT_GBRP (('G'<<24)|('B'<<16)|('R'<<8)|24)
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
#define IMGFMT_ABGR IMGFMT_RGB32
#define IMGFMT_BGRA (IMGFMT_RGB32|64)
#define IMGFMT_ARGB IMGFMT_BGR32
@ -139,7 +140,7 @@
#define IMGFMT_420P10_BE 0x34323052
#define IMGFMT_420P9_LE 0x53303234
#define IMGFMT_420P9_BE 0x34323053
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
#define IMGFMT_444P16 IMGFMT_444P16_BE
#define IMGFMT_444P10 IMGFMT_444P10_BE
#define IMGFMT_444P9 IMGFMT_444P9_BE

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@ -21,6 +21,7 @@
#include <assert.h>
#include <time.h>
#include <stdbool.h>
#include <endian.h>
#include <libavutil/common.h>
#include <libavutil/opt.h>
@ -773,7 +774,7 @@ static struct mp_image *decode(struct sh_video *sh, struct demux_packet *packet,
mpi->stride[2] *= 2;
}
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
// FIXME: this might cause problems for buffers with FF_BUFFER_HINTS_PRESERVE
if (mpi->bpp == 8)
swap_palette(mpi->planes[1]);

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@ -20,6 +20,7 @@
#include <stdlib.h>
#include <string.h>
#include <assert.h>
#include <endian.h>
#include "config.h"
#if HAVE_MALLOC_H
@ -254,7 +255,7 @@ void vf_mpi_clear(mp_image_t *mpi, int x0, int y0, int w, int h)
unsigned int *p = (unsigned int *) dst;
int size = (mpi->bpp >> 3) * w / 4;
int i;
#if HAVE_BIGENDIAN
#ifdef BIG_ENDIAN
#define CLEAR_PACKEDYUV_PATTERN 0x00800080
#define CLEAR_PACKEDYUV_PATTERN_SWAPPED 0x80008000
#else

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@ -20,6 +20,7 @@
#include <stdlib.h>
#include <string.h>
#include <inttypes.h>
#include <endian.h>
#include "config.h"
#include "mp_msg.h"
@ -405,7 +406,7 @@ static void start_slice(struct vf_instance *vf, mp_image_t *mpi){
static void scale(struct SwsContext *sws1, struct SwsContext *sws2, uint8_t *src[MP_MAX_PLANES], int src_stride[MP_MAX_PLANES],
int y, int h, uint8_t *dst[MP_MAX_PLANES], int dst_stride[MP_MAX_PLANES], int interlaced){
const uint8_t *src2[MP_MAX_PLANES]={src[0], src[1], src[2], src[3]};
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
uint32_t pal2[256];
if (src[1] && !src[2]){
int i;
@ -661,8 +662,7 @@ int get_sws_cpuflags(void){
return
(gCpuCaps.hasMMX ? SWS_CPU_CAPS_MMX : 0)
| (gCpuCaps.hasMMX2 ? SWS_CPU_CAPS_MMX2 : 0)
| (gCpuCaps.has3DNow ? SWS_CPU_CAPS_3DNOW : 0)
| (gCpuCaps.hasAltiVec ? SWS_CPU_CAPS_ALTIVEC : 0);
| (gCpuCaps.has3DNow ? SWS_CPU_CAPS_3DNOW : 0);
}
void sws_getFlagsAndFilterFromCmdLine(int *flags, SwsFilter **srcFilterParam, SwsFilter **dstFilterParam)

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@ -19,7 +19,7 @@
#ifndef MPLAYER_ASF_H
#define MPLAYER_ASF_H
//#include "config.h" /* for HAVE_BIGENDIAN */
#include <endian.h>
#include <inttypes.h>
#include "libavutil/common.h"
#include "mpbswap.h"
@ -105,7 +105,7 @@ typedef struct __attribute__((packed)) {
} ASF_stream_chunck_t;
// Definition of the stream type
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
#define ASF_STREAMING_CLEAR 0x2443 // $C
#define ASF_STREAMING_DATA 0x2444 // $D
#define ASF_STREAMING_END_TRANS 0x2445 // $E
@ -140,7 +140,7 @@ typedef struct {
* Some macros to swap little endian structures read from an ASF file
* into machine endian format
*/
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
#define le2me_ASF_obj_header_t(h) { \
(h)->size = le2me_64((h)->size); \
}

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@ -21,7 +21,8 @@
#include <sys/types.h>
#include <stdint.h>
#include "config.h" /* get correct definition of HAVE_BIGENDIAN */
#include <endian.h>
#include "config.h"
#include "libavutil/common.h"
#include "mpbswap.h"
@ -229,7 +230,7 @@ typedef enum {
* Some macros to swap little endian structures read from an AVI file
* into machine endian format
*/
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
#define le2me_MainAVIHeader(h) { \
(h)->dwMicroSecPerFrame = le2me_32((h)->dwMicroSecPerFrame); \
(h)->dwMaxBytesPerSec = le2me_32((h)->dwMaxBytesPerSec); \

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@ -19,6 +19,7 @@
#ifndef MPLAYER_MS_HDR_H
#define MPLAYER_MS_HDR_H
#include <endian.h>
#include "config.h"
#ifndef _WAVEFORMATEX_
@ -81,7 +82,7 @@ typedef struct {
#endif
#ifndef le2me_BITMAPINFOHEADER
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
#define le2me_BITMAPINFOHEADER(h) { \
(h)->biSize = le2me_32((h)->biSize); \
(h)->biWidth = le2me_32((h)->biWidth); \

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@ -27,6 +27,7 @@
#include "osd.h"
#include "mp_msg.h"
#include <inttypes.h>
#include <endian.h>
#include "cpudetect.h"
#if ARCH_X86
@ -35,6 +36,8 @@ static const unsigned long long mask24lh __attribute__((aligned(8))) = 0xFFFF00
static const unsigned long long mask24hl __attribute__((aligned(8))) = 0x0000FFFFFFFFFFFFULL;
#endif
#define CONFIG_RUNTIME_CPUDETECT 1
//Note: we have C, X86-nommx, MMX, MMX2, 3DNOW version therse no 3DNOW+MMX2 one
//Plain C versions
#if !HAVE_MMX || CONFIG_RUNTIME_CPUDETECT

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@ -320,7 +320,7 @@ static inline void RENAME(vo_draw_alpha_rgb24)(int w,int h, unsigned char* src,
static inline void RENAME(vo_draw_alpha_rgb32)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
int y;
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
dstbase++;
#endif
#if HAVE_MMX

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@ -19,6 +19,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <endian.h>
#include "config.h"
#include "video_out.h"
@ -261,7 +262,7 @@ static void freeMyXImage(void)
ImageData = NULL;
}
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
#define BO_NATIVE MSBFirst
#define BO_NONNATIVE LSBFirst
#else
@ -431,7 +432,7 @@ static int config(uint32_t width, uint32_t height, uint32_t d_width,
// we can easily "emulate" them.
if (out_format & 64 && (IMGFMT_IS_RGB(out_format) || IMGFMT_IS_BGR(out_format))) {
out_format &= ~64;
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
out_offset = 1;
#else
out_offset = -1;

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@ -133,6 +133,19 @@ static void (*longcount)(long long*)=longcount_stub;
static pthread_mutex_t memmut = PTHREAD_MUTEX_INITIALIZER;
static void do_cpuid(unsigned int ax, unsigned int *p)
{
// code from libavcodec:
__asm__ volatile
("mov %%"REG_b", %%"REG_S"\n\t"
"cpuid\n\t"
"xchg %%"REG_b", %%"REG_S
: "=a" (p[0]), "=S" (p[1]),
"=c" (p[2]), "=d" (p[3])
: "0" (ax));
}
static unsigned int localcount_stub(void)
{
unsigned int regs[4];
@ -1000,7 +1013,6 @@ static void WINAPI expGetSystemInfo(SYSTEM_INFO* si)
/* mplayer's way to detect PF's */
{
#include "cpudetect.h"
if (gCpuCaps.hasMMX)
PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
@ -1011,22 +1023,8 @@ static void WINAPI expGetSystemInfo(SYSTEM_INFO* si)
if (gCpuCaps.has3DNow)
PF[PF_AMD3D_INSTRUCTIONS_AVAILABLE] = TRUE;
if (gCpuCaps.cpuType == 4)
{
cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
cachedsi.wProcessorLevel = 4;
}
else if (gCpuCaps.cpuType >= 5)
{
cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
cachedsi.wProcessorLevel = 5;
}
else
{
cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
cachedsi.wProcessorLevel = 3;
}
cachedsi.wProcessorRevision = gCpuCaps.cpuStepping;
cachedsi.dwNumberOfProcessors = 1; /* hardcoded */
}

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@ -3822,35 +3822,6 @@ static void print_version(void)
/* Test for CPU capabilities (and corresponding OS support) for optimizing */
GetCpuCaps(&gCpuCaps);
#if ARCH_X86
mp_msg(MSGT_CPLAYER, MSGL_V,
"CPUflags: MMX: %d MMX2: %d 3DNow: %d 3DNowExt: %d SSE: %d SSE2: %d SSSE3: %d\n",
gCpuCaps.hasMMX, gCpuCaps.hasMMX2,
gCpuCaps.has3DNow, gCpuCaps.has3DNowExt,
gCpuCaps.hasSSE, gCpuCaps.hasSSE2, gCpuCaps.hasSSSE3);
#if CONFIG_RUNTIME_CPUDETECT
mp_tmsg(MSGT_CPLAYER, MSGL_V, "Compiled with runtime CPU detection.\n");
#else
mp_tmsg(MSGT_CPLAYER, MSGL_V, "Compiled for x86 CPU with extensions:");
if (HAVE_MMX)
mp_msg(MSGT_CPLAYER, MSGL_V, " MMX");
if (HAVE_MMX2)
mp_msg(MSGT_CPLAYER, MSGL_V, " MMX2");
if (HAVE_AMD3DNOW)
mp_msg(MSGT_CPLAYER, MSGL_V, " 3DNow");
if (HAVE_AMD3DNOWEXT)
mp_msg(MSGT_CPLAYER, MSGL_V, " 3DNowExt");
if (HAVE_SSE)
mp_msg(MSGT_CPLAYER, MSGL_V, " SSE");
if (HAVE_SSE2)
mp_msg(MSGT_CPLAYER, MSGL_V, " SSE2");
if (HAVE_SSSE3)
mp_msg(MSGT_CPLAYER, MSGL_V, " SSSE3");
if (HAVE_CMOV)
mp_msg(MSGT_CPLAYER, MSGL_V, " CMOV");
mp_msg(MSGT_CPLAYER, MSGL_V, "\n");
#endif /* CONFIG_RUNTIME_CPUDETECT */
#endif /* ARCH_X86 */
print_libav_versions();
}

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@ -24,6 +24,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <stdbool.h>
#include <endian.h>
#include "talloc.h"
@ -177,7 +178,7 @@ static int fill_buffer(stream_t *s, char *buffer, int max_len)
if (!buf)
return 0;
#if HAVE_BIGENDIAN
#if BYTE_ORDER == BIG_ENDIAN
for (i = 0; i < CDIO_CD_FRAMESIZE_RAW / 2; i++)
buf[i] = le2me_16(buf[i]);
#endif