mirror of
https://github.com/mpv-player/mpv
synced 2025-01-11 09:29:29 +00:00
10-20% faster fastmemcpy :) on my p3 at least but the algo is mostly from "amd athlon processor x86 code optimization guide" so it should be faster for amd chips too, but i fear it might be slower for mem->vram copies (someone should check that, i cant) ... there are 2 #defines to finetune it (BLOCK_SIZE & CONFUSION_FACTOR)
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@3078 b3059339-0415-0410-9bf9-f77b7e298cf2
This commit is contained in:
michael
parent
2a6e9d9eda
commit
6c6cc954f5
122
libvo/aclib.c
122
libvo/aclib.c
@ -1,13 +1,19 @@
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#include "../config.h"
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#ifdef USE_FASTMEMCPY
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/*
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/*
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aclib - advanced C library ;)
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This file contains functions which improve and expand standard C-library
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*/
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#include <stddef.h>
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#define BLOCK_SIZE 4096
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#define CONFUSION_FACTOR 0
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//Feel free to fine-tune the above 2, it might be possible to get some speedup with them :)
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//#define STATISTICS
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#ifndef HAVE_SSE2
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/*
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P3 processor has only one SSE decoder so can execute only 1 sse insn per
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@ -103,7 +109,7 @@ __asm__ __volatile__(\
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#ifdef HAVE_SSE
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#define MMREG_SIZE 16
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#else
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#define MMREG_SIZE 8
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#define MMREG_SIZE 64 //8
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#endif
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/* Small defines (for readability only) ;) */
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@ -132,7 +138,20 @@ void * fast_memcpy(void * to, const void * from, size_t len)
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{
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void *retval;
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size_t i;
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retval = to;
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retval = to;
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#ifdef STATISTICS
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{
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static int freq[33];
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static int t=0;
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int i;
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for(i=0; len>(1<<i); i++);
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freq[i]++;
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t++;
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if(1024*1024*1024 % t == 0)
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for(i=0; i<32; i++)
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printf("freq < %8d %4d\n", 1<<i, freq[i]);
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}
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#endif
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#ifndef HAVE_MMX1
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/* PREFETCH has effect even for MOVSB instruction ;) */
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__asm__ __volatile__ (
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@ -184,7 +203,7 @@ void * fast_memcpy(void * to, const void * from, size_t len)
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((const unsigned char *)from)+=64;
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((unsigned char *)to)+=64;
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}
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else
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else
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/*
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Only if SRC is aligned on 16-byte boundary.
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It allows to use movaps instead of movups, which required data
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@ -207,6 +226,96 @@ void * fast_memcpy(void * to, const void * from, size_t len)
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((unsigned char *)to)+=64;
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}
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#else
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// Align destination at BLOCK_SIZE boundary
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for(; ((int)to & (BLOCK_SIZE-1)) && i>0; i--)
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{
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__asm__ __volatile__ (
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#ifndef HAVE_MMX1
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PREFETCH" 320(%0)\n"
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#endif
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"movq (%0), %%mm0\n"
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"movq 8(%0), %%mm1\n"
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"movq 16(%0), %%mm2\n"
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"movq 24(%0), %%mm3\n"
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"movq 32(%0), %%mm4\n"
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"movq 40(%0), %%mm5\n"
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"movq 48(%0), %%mm6\n"
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"movq 56(%0), %%mm7\n"
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MOVNTQ" %%mm0, (%1)\n"
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MOVNTQ" %%mm1, 8(%1)\n"
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MOVNTQ" %%mm2, 16(%1)\n"
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MOVNTQ" %%mm3, 24(%1)\n"
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MOVNTQ" %%mm4, 32(%1)\n"
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MOVNTQ" %%mm5, 40(%1)\n"
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MOVNTQ" %%mm6, 48(%1)\n"
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MOVNTQ" %%mm7, 56(%1)\n"
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:: "r" (from), "r" (to) : "memory");
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((const unsigned char *)from)+=64;
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((unsigned char *)to)+=64;
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}
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// printf(" %d %d\n", (int)from&1023, (int)to&1023);
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// Pure Assembly cuz gcc is a bit unpredictable ;)
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if(i>=BLOCK_SIZE/64)
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asm volatile(
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"xorl %%eax, %%eax \n\t"
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".balign 16 \n\t"
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"1: \n\t"
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"movl (%0, %%eax), %%ebx \n\t"
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"movl 32(%0, %%eax), %%ebx \n\t"
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"movl 64(%0, %%eax), %%ebx \n\t"
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"movl 96(%0, %%eax), %%ebx \n\t"
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"addl $128, %%eax \n\t"
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"cmpl %3, %%eax \n\t"
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" jb 1b \n\t"
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"xorl %%eax, %%eax \n\t"
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".balign 16 \n\t"
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"2: \n\t"
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"movq (%0, %%eax), %%mm0\n"
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"movq 8(%0, %%eax), %%mm1\n"
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"movq 16(%0, %%eax), %%mm2\n"
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"movq 24(%0, %%eax), %%mm3\n"
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"movq 32(%0, %%eax), %%mm4\n"
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"movq 40(%0, %%eax), %%mm5\n"
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"movq 48(%0, %%eax), %%mm6\n"
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"movq 56(%0, %%eax), %%mm7\n"
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MOVNTQ" %%mm0, (%1, %%eax)\n"
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MOVNTQ" %%mm1, 8(%1, %%eax)\n"
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MOVNTQ" %%mm2, 16(%1, %%eax)\n"
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MOVNTQ" %%mm3, 24(%1, %%eax)\n"
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MOVNTQ" %%mm4, 32(%1, %%eax)\n"
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MOVNTQ" %%mm5, 40(%1, %%eax)\n"
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MOVNTQ" %%mm6, 48(%1, %%eax)\n"
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MOVNTQ" %%mm7, 56(%1, %%eax)\n"
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"addl $64, %%eax \n\t"
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"cmpl %3, %%eax \n\t"
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"jb 2b \n\t"
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#if CONFUSION_FACTOR > 0
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// a few percent speedup on out of order executing CPUs
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"movl %5, %%eax \n\t"
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"2: \n\t"
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"movl (%0), %%ebx \n\t"
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"movl (%0), %%ebx \n\t"
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"movl (%0), %%ebx \n\t"
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"movl (%0), %%ebx \n\t"
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"decl %%eax \n\t"
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" jnz 2b \n\t"
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#endif
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"xorl %%eax, %%eax \n\t"
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"addl %3, %0 \n\t"
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"addl %3, %1 \n\t"
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"subl %4, %2 \n\t"
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"cmpl %4, %2 \n\t"
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" jae 1b \n\t"
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: "+r" (from), "+r" (to), "+r" (i)
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: "r" (BLOCK_SIZE), "i" (BLOCK_SIZE/64), "i" (CONFUSION_FACTOR)
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: "%eax", "%ebx"
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);
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for(; i>0; i--)
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{
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__asm__ __volatile__ (
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@ -233,16 +342,17 @@ void * fast_memcpy(void * to, const void * from, size_t len)
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((const unsigned char *)from)+=64;
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((unsigned char *)to)+=64;
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}
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#endif /* Have SSE */
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#ifdef HAVE_MMX2
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/* since movntq is weakly-ordered, a "sfence"
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* is needed to become ordered again. */
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__asm__ __volatile__ ("sfence":::"memory");
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#endif
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#ifndef HAVE_SSE
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#ifndef HAVE_SSE
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/* enables to use FPU */
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__asm__ __volatile__ (EMMS:::"memory");
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#endif
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#endif
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}
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/*
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* Now do the tail of the block
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@ -1,13 +1,19 @@
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#include "../config.h"
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#ifdef USE_FASTMEMCPY
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/*
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/*
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aclib - advanced C library ;)
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This file contains functions which improve and expand standard C-library
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*/
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#include <stddef.h>
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#define BLOCK_SIZE 4096
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#define CONFUSION_FACTOR 0
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//Feel free to fine-tune the above 2, it might be possible to get some speedup with them :)
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//#define STATISTICS
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#ifndef HAVE_SSE2
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/*
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P3 processor has only one SSE decoder so can execute only 1 sse insn per
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@ -103,7 +109,7 @@ __asm__ __volatile__(\
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#ifdef HAVE_SSE
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#define MMREG_SIZE 16
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#else
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#define MMREG_SIZE 8
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#define MMREG_SIZE 64 //8
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#endif
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/* Small defines (for readability only) ;) */
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@ -132,7 +138,20 @@ void * fast_memcpy(void * to, const void * from, size_t len)
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{
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void *retval;
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size_t i;
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retval = to;
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retval = to;
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#ifdef STATISTICS
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{
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static int freq[33];
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static int t=0;
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int i;
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for(i=0; len>(1<<i); i++);
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freq[i]++;
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t++;
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if(1024*1024*1024 % t == 0)
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for(i=0; i<32; i++)
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printf("freq < %8d %4d\n", 1<<i, freq[i]);
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}
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#endif
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#ifndef HAVE_MMX1
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/* PREFETCH has effect even for MOVSB instruction ;) */
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__asm__ __volatile__ (
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@ -184,7 +203,7 @@ void * fast_memcpy(void * to, const void * from, size_t len)
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((const unsigned char *)from)+=64;
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((unsigned char *)to)+=64;
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}
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else
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else
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/*
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Only if SRC is aligned on 16-byte boundary.
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It allows to use movaps instead of movups, which required data
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@ -207,6 +226,96 @@ void * fast_memcpy(void * to, const void * from, size_t len)
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((unsigned char *)to)+=64;
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}
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#else
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// Align destination at BLOCK_SIZE boundary
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for(; ((int)to & (BLOCK_SIZE-1)) && i>0; i--)
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{
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__asm__ __volatile__ (
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#ifndef HAVE_MMX1
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PREFETCH" 320(%0)\n"
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#endif
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"movq (%0), %%mm0\n"
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"movq 8(%0), %%mm1\n"
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"movq 16(%0), %%mm2\n"
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"movq 24(%0), %%mm3\n"
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"movq 32(%0), %%mm4\n"
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"movq 40(%0), %%mm5\n"
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"movq 48(%0), %%mm6\n"
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"movq 56(%0), %%mm7\n"
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MOVNTQ" %%mm0, (%1)\n"
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MOVNTQ" %%mm1, 8(%1)\n"
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MOVNTQ" %%mm2, 16(%1)\n"
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MOVNTQ" %%mm3, 24(%1)\n"
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MOVNTQ" %%mm4, 32(%1)\n"
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MOVNTQ" %%mm5, 40(%1)\n"
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MOVNTQ" %%mm6, 48(%1)\n"
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MOVNTQ" %%mm7, 56(%1)\n"
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:: "r" (from), "r" (to) : "memory");
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((const unsigned char *)from)+=64;
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((unsigned char *)to)+=64;
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}
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// printf(" %d %d\n", (int)from&1023, (int)to&1023);
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// Pure Assembly cuz gcc is a bit unpredictable ;)
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if(i>=BLOCK_SIZE/64)
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asm volatile(
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"xorl %%eax, %%eax \n\t"
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".balign 16 \n\t"
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"1: \n\t"
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"movl (%0, %%eax), %%ebx \n\t"
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"movl 32(%0, %%eax), %%ebx \n\t"
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"movl 64(%0, %%eax), %%ebx \n\t"
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"movl 96(%0, %%eax), %%ebx \n\t"
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"addl $128, %%eax \n\t"
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"cmpl %3, %%eax \n\t"
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" jb 1b \n\t"
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"xorl %%eax, %%eax \n\t"
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".balign 16 \n\t"
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"2: \n\t"
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"movq (%0, %%eax), %%mm0\n"
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"movq 8(%0, %%eax), %%mm1\n"
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"movq 16(%0, %%eax), %%mm2\n"
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"movq 24(%0, %%eax), %%mm3\n"
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"movq 32(%0, %%eax), %%mm4\n"
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"movq 40(%0, %%eax), %%mm5\n"
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"movq 48(%0, %%eax), %%mm6\n"
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"movq 56(%0, %%eax), %%mm7\n"
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MOVNTQ" %%mm0, (%1, %%eax)\n"
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MOVNTQ" %%mm1, 8(%1, %%eax)\n"
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MOVNTQ" %%mm2, 16(%1, %%eax)\n"
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MOVNTQ" %%mm3, 24(%1, %%eax)\n"
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MOVNTQ" %%mm4, 32(%1, %%eax)\n"
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MOVNTQ" %%mm5, 40(%1, %%eax)\n"
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MOVNTQ" %%mm6, 48(%1, %%eax)\n"
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MOVNTQ" %%mm7, 56(%1, %%eax)\n"
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"addl $64, %%eax \n\t"
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"cmpl %3, %%eax \n\t"
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"jb 2b \n\t"
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#if CONFUSION_FACTOR > 0
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// a few percent speedup on out of order executing CPUs
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"movl %5, %%eax \n\t"
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"2: \n\t"
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"movl (%0), %%ebx \n\t"
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"movl (%0), %%ebx \n\t"
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"movl (%0), %%ebx \n\t"
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"movl (%0), %%ebx \n\t"
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"decl %%eax \n\t"
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" jnz 2b \n\t"
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#endif
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"xorl %%eax, %%eax \n\t"
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"addl %3, %0 \n\t"
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"addl %3, %1 \n\t"
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"subl %4, %2 \n\t"
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"cmpl %4, %2 \n\t"
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" jae 1b \n\t"
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: "+r" (from), "+r" (to), "+r" (i)
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: "r" (BLOCK_SIZE), "i" (BLOCK_SIZE/64), "i" (CONFUSION_FACTOR)
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: "%eax", "%ebx"
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);
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for(; i>0; i--)
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{
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__asm__ __volatile__ (
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@ -233,16 +342,17 @@ void * fast_memcpy(void * to, const void * from, size_t len)
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((const unsigned char *)from)+=64;
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((unsigned char *)to)+=64;
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}
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#endif /* Have SSE */
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#ifdef HAVE_MMX2
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/* since movntq is weakly-ordered, a "sfence"
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* is needed to become ordered again. */
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__asm__ __volatile__ ("sfence":::"memory");
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#endif
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#ifndef HAVE_SSE
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#ifndef HAVE_SSE
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/* enables to use FPU */
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__asm__ __volatile__ (EMMS:::"memory");
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#endif
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#endif
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}
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/*
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* Now do the tail of the block
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||||
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