mirror of https://github.com/mpv-player/mpv
i think, it's better [playback->offsets and offset implemented/corrected]
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@4239 b3059339-0415-0410-9bf9-f77b7e298cf2
This commit is contained in:
alex
parent
edba49f1b8
commit
340fa0a216
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@ -601,409 +601,6 @@ if(!restore){
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#endif
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}
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#if 0
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static int mga_vid_set_config(mga_vid_config_t *config)
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{
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int x, y, sw, sh, dw, dh;
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int besleft, bestop, ifactor, ofsleft, ofstop, baseadrofs, weight, weights;
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int frame_size=config->frame_size;
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#ifdef CRTC2
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#define right_margin 0
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#define left_margin 18
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#define hsync_len 46
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#define lower_margin 10
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#define vsync_len 4
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#define upper_margin 39
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unsigned int hdispend = (config->src_width + 31) & ~31;
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unsigned int hsyncstart = hdispend + (right_margin & ~7);
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unsigned int hsyncend = hsyncstart + (hsync_len & ~7);
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unsigned int htotal = hsyncend + (left_margin & ~7);
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unsigned int vdispend = config->src_height;
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unsigned int vsyncstart = vdispend + lower_margin;
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unsigned int vsyncend = vsyncstart + vsync_len;
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unsigned int vtotal = vsyncend + upper_margin;
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#endif
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x = config->dest.x;
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y = config->dest.y;
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sw = config->src.width;
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sh = config->src.height;
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dw = config->dest.width;
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dh = config->dest.height;
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printf("[mga] Setting up a %dx%d+%d+%d video window (src %dx%d) format %X\n",
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dw, dh, x, y, sw, sh, config->fourcc);
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if((sw < 4) || (sh < 4) || (dw < 4) || (dh < 4))
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{
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printf("[mga] Invalid src/dest dimenstions\n");
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return(EINVAL);
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}
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//FIXME check that window is valid and inside desktop
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//FIXME figure out a better way to allocate memory on card
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//allocate 2 megs
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//mga_src_base = mga_mem_base + (MGA_VIDMEM_SIZE-2) * 0x100000;
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//mga_src_base = (MGA_VIDMEM_SIZE-3) * 0x100000;
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//Setup the BES registers for a three plane 4:2:0 video source
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regs.besglobctl = 0;
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switch(config->fourcc){
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case IMGFMT_YV12:
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case IMGFMT_I420:
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case IMGFMT_IYUV:
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regs.besctl = 1 // BES enabled
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+ (0<<6) // even start polarity
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+ (1<<10) // x filtering enabled
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+ (1<<11) // y filtering enabled
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+ (1<<16) // chroma upsampling
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+ (1<<17) // 4:2:0 mode
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+ (1<<18); // dither enabled
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#if 0
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if(is_g400)
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{
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//zoom disabled, zoom filter disabled, 420 3 plane format, proc amp
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//disabled, rgb mode disabled
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regs.besglobctl = (1<<5);
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}
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else
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{
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//zoom disabled, zoom filter disabled, Cb samples in 0246, Cr
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//in 1357, BES register update on besvcnt
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regs.besglobctl = 0;
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}
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#endif
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break;
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case IMGFMT_YUY2:
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regs.besctl = 1 // BES enabled
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+ (0<<6) // even start polarity
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+ (1<<10) // x filtering enabled
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+ (1<<11) // y filtering enabled
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+ (1<<16) // chroma upsampling
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+ (0<<17) // 4:2:2 mode
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+ (1<<18); // dither enabled
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regs.besglobctl = 0; // YUY2 format selected
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break;
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case IMGFMT_UYVY:
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regs.besctl = 1 // BES enabled
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+ (0<<6) // even start polarity
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+ (1<<10) // x filtering enabled
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+ (1<<11) // y filtering enabled
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+ (1<<16) // chroma upsampling
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+ (0<<17) // 4:2:2 mode
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+ (1<<18); // dither enabled
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regs.besglobctl = 1<<6; // UYVY format selected
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break;
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default:
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printf("[mga] Unsupported pixel format: %x\n",config->fourcc);
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return(ENOTSUP);
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}
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//Disable contrast and brightness control
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regs.besglobctl |= (1<<5) + (1<<7);
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regs.beslumactl = (0x7f << 16) + (0x80<<0);
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regs.beslumactl = 0x80<<0;
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//Setup destination window boundaries
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besleft = x > 0 ? x : 0;
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bestop = y > 0 ? y : 0;
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regs.beshcoord = (besleft<<16) + (x + dw-1);
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regs.besvcoord = (bestop<<16) + (y + dh-1);
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//Setup source dimensions
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regs.beshsrclst = (sw - 1) << 16;
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regs.bespitch = (sw + 31) & ~31 ;
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//Setup horizontal scaling
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ifactor = ((sw-1)<<14)/(dw-1);
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ofsleft = besleft - x;
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regs.beshiscal = ifactor<<2;
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regs.beshsrcst = (ofsleft*ifactor)<<2;
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regs.beshsrcend = regs.beshsrcst + (((dw - ofsleft - 1) * ifactor) << 2);
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//Setup vertical scaling
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ifactor = ((sh-1)<<14)/(dh-1);
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ofstop = bestop - y;
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regs.besviscal = ifactor<<2;
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baseadrofs = ((ofstop*regs.besviscal)>>16)*regs.bespitch;
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//frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2;
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regs.besa1org = (uint32_t) mga_src_base + baseadrofs;
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regs.besa2org = (uint32_t) mga_src_base + baseadrofs + 1*frame_size;
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regs.besb1org = (uint32_t) mga_src_base + baseadrofs + 2*frame_size;
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regs.besb2org = (uint32_t) mga_src_base + baseadrofs + 3*frame_size;
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if(config->format==MGA_VID_FORMAT_YV12
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||config->format==MGA_VID_FORMAT_IYUV
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||config->format==MGA_VID_FORMAT_I420
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){
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// planar YUV frames:
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if (is_g400)
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baseadrofs = (((ofstop*regs.besviscal)/4)>>16)*regs.bespitch;
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else
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baseadrofs = (((ofstop*regs.besviscal)/2)>>16)*regs.bespitch;
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if(config->format==MGA_VID_FORMAT_YV12){
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regs.besa1corg = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ;
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regs.besa2corg = (uint32_t) mga_src_base + baseadrofs + 1*frame_size + regs.bespitch * sh;
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regs.besb1corg = (uint32_t) mga_src_base + baseadrofs + 2*frame_size + regs.bespitch * sh;
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regs.besb2corg = (uint32_t) mga_src_base + baseadrofs + 3*frame_size + regs.bespitch * sh;
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regs.besa1c3org = regs.besa1corg + ((regs.bespitch * sh) / 4);
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regs.besa2c3org = regs.besa2corg + ((regs.bespitch * sh) / 4);
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regs.besb1c3org = regs.besb1corg + ((regs.bespitch * sh) / 4);
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regs.besb2c3org = regs.besb2corg + ((regs.bespitch * sh) / 4);
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} else {
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regs.besa1c3org = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ;
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regs.besa2c3org = (uint32_t) mga_src_base + baseadrofs + 1*frame_size + regs.bespitch * sh;
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regs.besb1c3org = (uint32_t) mga_src_base + baseadrofs + 2*frame_size + regs.bespitch * sh;
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regs.besb2c3org = (uint32_t) mga_src_base + baseadrofs + 3*frame_size + regs.bespitch * sh;
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regs.besa1corg = regs.besa1c3org + ((regs.bespitch * sh) / 4);
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regs.besa2corg = regs.besa2c3org + ((regs.bespitch * sh) / 4);
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regs.besb1corg = regs.besb1c3org + ((regs.bespitch * sh) / 4);
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regs.besb2corg = regs.besb2c3org + ((regs.bespitch * sh) / 4);
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}
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}
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weight = ofstop * (regs.besviscal >> 2);
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weights = weight < 0 ? 1 : 0;
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regs.besv2wght = regs.besv1wght = (weights << 16) + ((weight & 0x3FFF) << 2);
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regs.besv2srclst = regs.besv1srclst = sh - 1 - (((ofstop * regs.besviscal) >> 16) & 0x03FF);
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#ifdef CRTC2
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// pridat hlavni registry - tj. casovani ...
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switch(config->format){
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case MGA_VID_FORMAT_YV12:
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case MGA_VID_FORMAT_I420:
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case MGA_VID_FORMAT_IYUV:
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cregs.c2ctl = 1 // CRTC2 enabled
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+ (1<<1) // external clock
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+ (0<<2) // external clock
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+ (1<<3) // pixel clock enable - not needed ???
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+ (0<<4) // high prioryty req
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+ (1<<5) // high prioryty req
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+ (0<<6) // high prioryty req
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+ (1<<8) // high prioryty req max
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+ (0<<9) // high prioryty req max
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+ (0<<10) // high prioryty req max
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+ (0<<20) // CRTC1 to DAC
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+ (1<<21) // 420 mode
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+ (1<<22) // 420 mode
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+ (1<<23) // 420 mode
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+ (0<<24) // single chroma line for 420 mode - need to be corrected
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+ (0<<25) /*/ interlace mode - need to be corrected*/
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+ (0<<26) // field legth polariry
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+ (0<<27) // field identification polariry
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+ (1<<28) // VIDRST detection mode
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+ (0<<29) // VIDRST detection mode
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+ (1<<30) // Horizontal counter preload
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+ (1<<31) // Vertical counter preload
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;
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cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode
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+ (1<<1) // Y filter enable
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+ (1<<2) // CbCr filter enable
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+ (0<<3) // subpicture enable (disabled)
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+ (0<<4) // NTSC enable (disabled - PAL)
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+ (0<<5) // C2 static subpicture enable (disabled)
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+ (0<<6) // C2 subpicture offset division (disabled)
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+ (0<<7) // 422 subformat selection !
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/* + (0<<8) // 15 bpp high alpha
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+ (0<<9) // 15 bpp high alpha
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+ (0<<10) // 15 bpp high alpha
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+ (0<<11) // 15 bpp high alpha
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+ (0<<12) // 15 bpp high alpha
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+ (0<<13) // 15 bpp high alpha
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+ (0<<14) // 15 bpp high alpha
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+ (0<<15) // 15 bpp high alpha
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+ (0<<16) // 15 bpp low alpha
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+ (0<<17) // 15 bpp low alpha
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+ (0<<18) // 15 bpp low alpha
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+ (0<<19) // 15 bpp low alpha
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+ (0<<20) // 15 bpp low alpha
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+ (0<<21) // 15 bpp low alpha
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+ (0<<22) // 15 bpp low alpha
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+ (0<<23) // 15 bpp low alpha
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+ (0<<24) // static subpicture key
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+ (0<<25) // static subpicture key
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+ (0<<26) // static subpicture key
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+ (0<<27) // static subpicture key
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+ (0<<28) // static subpicture key
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*/ ;
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break;
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case MGA_VID_FORMAT_YUY2:
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cregs.c2ctl = 1 // CRTC2 enabled
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+ (1<<1) // external clock
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+ (0<<2) // external clock
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+ (1<<3) // pixel clock enable - not needed ???
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+ (0<<4) // high prioryty req - acc to spec
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+ (1<<5) // high prioryty req
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+ (0<<6) // high prioryty req
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// 7 reserved
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+ (1<<8) // high prioryty req max
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+ (0<<9) // high prioryty req max
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+ (0<<10) // high prioryty req max
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// 11-19 reserved
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+ (0<<20) // CRTC1 to DAC
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+ (1<<21) // 422 mode
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+ (0<<22) // 422 mode
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+ (1<<23) // 422 mode
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+ (0<<24) // single chroma line for 420 mode - need to be corrected
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+ (0<<25) /*/ interlace mode - need to be corrected*/
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+ (0<<26) // field legth polariry
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+ (0<<27) // field identification polariry
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+ (1<<28) // VIDRST detection mode
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+ (0<<29) // VIDRST detection mode
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+ (1<<30) // Horizontal counter preload
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+ (1<<31) // Vertical counter preload
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;
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cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode
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+ (1<<1) // Y filter enable
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+ (1<<2) // CbCr filter enable
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+ (0<<3) // subpicture enable (disabled)
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+ (0<<4) // NTSC enable (disabled - PAL)
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+ (0<<5) // C2 static subpicture enable (disabled)
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+ (0<<6) // C2 subpicture offset division (disabled)
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+ (0<<7) // 422 subformat selection !
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/* + (0<<8) // 15 bpp high alpha
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+ (0<<9) // 15 bpp high alpha
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+ (0<<10) // 15 bpp high alpha
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+ (0<<11) // 15 bpp high alpha
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+ (0<<12) // 15 bpp high alpha
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+ (0<<13) // 15 bpp high alpha
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+ (0<<14) // 15 bpp high alpha
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+ (0<<15) // 15 bpp high alpha
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+ (0<<16) // 15 bpp low alpha
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+ (0<<17) // 15 bpp low alpha
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+ (0<<18) // 15 bpp low alpha
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+ (0<<19) // 15 bpp low alpha
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+ (0<<20) // 15 bpp low alpha
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+ (0<<21) // 15 bpp low alpha
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+ (0<<22) // 15 bpp low alpha
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+ (0<<23) // 15 bpp low alpha
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+ (0<<24) // static subpicture key
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+ (0<<25) // static subpicture key
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+ (0<<26) // static subpicture key
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+ (0<<27) // static subpicture key
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+ (0<<28) // static subpicture key
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*/ ;
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break;
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case MGA_VID_FORMAT_UYVY:
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cregs.c2ctl = 1 // CRTC2 enabled
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+ (1<<1) // external clock
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+ (0<<2) // external clock
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+ (1<<3) // pixel clock enable - not needed ???
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+ (0<<4) // high prioryty req
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+ (1<<5) // high prioryty req
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+ (0<<6) // high prioryty req
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+ (1<<8) // high prioryty req max
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+ (0<<9) // high prioryty req max
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+ (0<<10) // high prioryty req max
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+ (0<<20) // CRTC1 to DAC
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+ (1<<21) // 422 mode
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+ (0<<22) // 422 mode
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+ (1<<23) // 422 mode
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+ (1<<24) // single chroma line for 420 mode - need to be corrected
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+ (1<<25) /*/ interlace mode - need to be corrected*/
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+ (0<<26) // field legth polariry
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+ (0<<27) // field identification polariry
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+ (1<<28) // VIDRST detection mode
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+ (0<<29) // VIDRST detection mode
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+ (1<<30) // Horizontal counter preload
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+ (1<<31) // Vertical counter preload
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;
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cregs.c2datactl = 0 // enable dither - propably not needed, we are already in YUV mode
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+ (1<<1) // Y filter enable
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+ (1<<2) // CbCr filter enable
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+ (0<<3) // subpicture enable (disabled)
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+ (0<<4) // NTSC enable (disabled - PAL)
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+ (0<<5) // C2 static subpicture enable (disabled)
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+ (0<<6) // C2 subpicture offset division (disabled)
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+ (1<<7) // 422 subformat selection !
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/* + (0<<8) // 15 bpp high alpha
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+ (0<<9) // 15 bpp high alpha
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+ (0<<10) // 15 bpp high alpha
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+ (0<<11) // 15 bpp high alpha
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+ (0<<12) // 15 bpp high alpha
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+ (0<<13) // 15 bpp high alpha
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+ (0<<14) // 15 bpp high alpha
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+ (0<<15) // 15 bpp high alpha
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+ (0<<16) // 15 bpp low alpha
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+ (0<<17) // 15 bpp low alpha
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+ (0<<18) // 15 bpp low alpha
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+ (0<<19) // 15 bpp low alpha
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+ (0<<20) // 15 bpp low alpha
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+ (0<<21) // 15 bpp low alpha
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+ (0<<22) // 15 bpp low alpha
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+ (0<<23) // 15 bpp low alpha
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+ (0<<24) // static subpicture key
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+ (0<<25) // static subpicture key
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+ (0<<26) // static subpicture key
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+ (0<<27) // static subpicture key
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+ (0<<28) // static subpicture key
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*/ ;
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break;
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default:
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printf("[mga] Unsupported pixel format: 0x%X\n",config->format);
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return -1;
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}
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cregs.c2hparam=((hdispend - 8) << 16) | (htotal - 8);
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cregs.c2hsync=((hsyncend - 8) << 16) | (hsyncstart - 8);
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cregs.c2misc=0 // CRTCV2 656 togg f0
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+(0<<1) // CRTCV2 656 togg f0
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+(0<<2) // CRTCV2 656 togg f0
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+(0<<4) // CRTCV2 656 togg f1
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+(0<<5) // CRTCV2 656 togg f1
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+(0<<6) // CRTCV2 656 togg f1
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+(0<<8) // Hsync active high
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+(0<<9) // Vsync active high
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// 16-27 c2vlinecomp - nevim co tam dat
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;
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cregs.c2offset=(regs.bespitch << 1);
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cregs.c2pl2startadd0=regs.besa1corg;
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// cregs.c2pl2startadd1=regs.besa2corg;
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cregs.c2pl3startadd0=regs.besa1c3org;
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// cregs.c2pl3startadd1=regs.besa2c3org;
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cregs.c2preload=(vsyncstart << 16) | (hsyncstart); // from
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cregs.c2spicstartadd0=0; // not used
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// cregs.c2spicstartadd1=0; // not used
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cregs.c2startadd0=regs.besa1org;
|
||||
// cregs.c2startadd1=regs.besa2org;
|
||||
|
||||
cregs.c2subpiclut=0; //not used
|
||||
|
||||
cregs.c2vparam=((vdispend - 1) << 16) | (vtotal - 1);
|
||||
cregs.c2vsync=((vsyncend - 1) << 16) | (vsyncstart - 1);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
mga_vid_write_regs(0);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef MGA_ALLOW_IRQ
|
||||
|
||||
static void enable_irq(){
|
||||
|
|
@ -1155,6 +752,8 @@ int vixConfigPlayback(vidix_playback_t *config)
|
|||
config->num_frames = 2;
|
||||
// return(EINVAL);
|
||||
}
|
||||
|
||||
config->num_frames = 2; /* let it be for now */
|
||||
|
||||
x = config->dest.x;
|
||||
y = config->dest.y;
|
||||
|
|
@ -1199,6 +798,9 @@ int vixConfigPlayback(vidix_playback_t *config)
|
|||
|
||||
frame_size = config->frame_size;
|
||||
|
||||
config->offsets[0] = 0;
|
||||
config->offsets[1] = config->frame_size; /* ?? */
|
||||
|
||||
config->offset.y=0;
|
||||
config->offset.v=((sw + 31) & ~31) * sh;
|
||||
config->offset.u=config->offset.v+((sw + 31) & ~31) * sh /4;
|
||||
|
|
@ -1213,6 +815,10 @@ int vixConfigPlayback(vidix_playback_t *config)
|
|||
printf("[mga] YUV buffer base: %p\n", mga_src_base);
|
||||
|
||||
config->dga_addr = mga_mem_base + mga_src_base;
|
||||
|
||||
// config->offset.y = config->dga_addr;
|
||||
// config->offset.u = config->offset.y+config->frame_size;
|
||||
// config->offset.v = config->offset.u+2*config->frame_size;
|
||||
|
||||
if (is_g400)
|
||||
mga_config.card_type = MGA_G400;
|
||||
|
|
@ -1730,7 +1336,7 @@ int vixInit(void)
|
|||
/* from linux/pci.h */
|
||||
#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
|
||||
|
||||
pciconfig_read(pci_info.bus, PCI_DEVFN(pci_info.card, pci_info.func),
|
||||
pci_config_read(pci_info.bus, PCI_DEVFN(pci_info.card, pci_info.func),
|
||||
0x40, 4, &card_option);
|
||||
// pci_read_config_dword(dev, 0x40, &card_option);
|
||||
printf("[mga] OPTION word: 0x%08X mem: 0x%02X %s\n", card_option,
|
||||
|
|
|
|||
Loading…
Reference in New Issue