mirror of https://github.com/mpv-player/mpv
EPIA (CyberBlade/i1) driver by Alastair M. Robinson
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@8506 b3059339-0415-0410-9bf9-f77b7e298cf2
This commit is contained in:
alex
parent
cd0e55cbad
commit
289882d306
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@ -4,6 +4,11 @@ include ../../config.mak
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BINDIR = $(LIBDIR)/mplayer/vidix
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CYBERBLADE_VID=cyberblade_vid.so
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CYBERBLADE_SRCS=cyberblade_vid.c
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CYBERBLADE_OBJS=cyberblade_vid.o
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CYBERBLADE_LIBS=-L../../libdha -ldha -lm
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CYBERBLADE_CFLAGS=$(OPTFLAGS) -fPIC -I. -I..
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RADEON_VID=radeon_vid.so
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RADEON_SRCS=radeon_vid.c
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@ -21,7 +26,7 @@ PM3_VID=pm3_vid.so
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PM3_SRCS=pm3_vid.c
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PM3_OBJS=pm3_vid.o
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PM3_LIBS=-L../../libdha -ldha
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PM3_CFLAGS=$(OPTFLAGS) -fPIC -I. -I..
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PM3_CFLAGS=$(OPTFLAGS) -fPIC -I. -I..
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MACH64_VID=mach64_vid.so
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MACH64_SRCS=mach64_vid.c
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@ -33,7 +38,7 @@ MGA_VID=mga_vid.so
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MGA_SRCS=mga_vid.c
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MGA_OBJS=mga_vid.o
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MGA_LIBS=-L../../libdha -ldha -lm
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MGA_CFLAGS=$(OPTFLAGS) -fPIC -I. -I..
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MGA_CFLAGS=$(OPTFLAGS) -fPIC -I. -I..
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MGA_CRTC2_VID=mga_crtc2_vid.so
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MGA_CRTC2_SRCS=mga_vid.c
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@ -41,13 +46,19 @@ MGA_CRTC2_OBJS=mga_crtc2_vid.o
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MGA_CRTC2_LIBS=-L../../libdha -ldha -lm
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MGA_CRTC2_CFLAGS=$(OPTFLAGS) -fPIC -I. -I.. -DCRTC2
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all: $(RADEON_VID) $(RAGE128_VID) $(MACH64_VID) $(NVIDIA_VID) $(GENFB_VID) $(MGA_VID) $(MGA_CRTC2_VID) $(PM3_VID)
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all: $(CYBERBLADE_VID) $(RADEON_VID) $(RAGE128_VID) $(MACH64_VID) $(NVIDIA_VID) $(GENFB_VID) $(MGA_VID) $(MGA_CRTC2_VID) $(PM3_VID)
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.SUFFIXES: .c .o
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# .PHONY: all clean
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$(CYBERBLADE_OBJS): $(CYBERBLADE_SRCS)
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$(CC) -c $(CYBERBLADE_CFLAGS) -o $@ $<
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$(CYBERBLADE_VID): $(CYBERBLADE_OBJS)
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$(LD) $(CYBERBLADE_LIBS) -shared -soname $(CYBERBLADE_VID) -o $(CYBERBLADE_VID) $(CYBERBLADE_OBJS)
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$(PM3_OBJS): $(PM3_SRCS)
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$(CC) -c $(PM3_CFLAGS) -o $@ $<
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@ -0,0 +1,146 @@
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/*
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* Copyright 1992-2000 by Alan Hourihane, Wigan, England.
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that
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* copyright notice and this permission notice appear in supporting
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* documentation, and that the name of Alan Hourihane not be used in
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* advertising or publicity pertaining to distribution of the software without
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* specific, written prior permission. Alan Hourihane makes no representations
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* about the suitability of this software for any purpose. It is provided
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* "as is" without express or implied warranty.
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*
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* ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*
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* Author: Alan Hourihane, alanh@fairlite.demon.co.uk
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*/
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/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_regs.h,v 1.22 2002/01/11 13:06:30 alanh Exp $ */
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#define DEBUG 1
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#define NTSC 14.31818
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#define PAL 17.73448
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/* General Registers */
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#define SPR 0x1F /* Software Programming Register (videoram) */
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/* 3C4 */
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#define RevisionID 0x09
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#define ConfPort1 0x0C
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#define ConfPort2 0x0C
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#define NewMode2 0x0D
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#define OldMode2 0x00 /* Should be 0x0D - dealt with in trident_dac.c */
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#define OldMode1 0x0E
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#define NewMode1 0x0E
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#define Protection 0x11
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#define MCLKLow 0x16
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#define MCLKHigh 0x17
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#define ClockLow 0x18
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#define ClockHigh 0x19
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#define SSetup 0x20
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#define SKey 0x37
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#define SPKey 0x57
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/* 3x4 */
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#define Offset 0x13
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#define Underline 0x14
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#define CRTCMode 0x17
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#define CRTCModuleTest 0x1E
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#define FIFOControl 0x20
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#define LinearAddReg 0x21
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#define DRAMTiming 0x23
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#define New32 0x23
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#define RAMDACTiming 0x25
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#define CRTHiOrd 0x27
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#define AddColReg 0x29
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#define InterfaceSel 0x2A
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#define HorizOverflow 0x2B
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#define GETest 0x2D
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#define Performance 0x2F
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#define GraphEngReg 0x36
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#define I2C 0x37
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#define PixelBusReg 0x38
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#define PCIReg 0x39
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#define DRAMControl 0x3A
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#define MiscContReg 0x3C
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#define CursorXLow 0x40
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#define CursorXHigh 0x41
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#define CursorYLow 0x42
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#define CursorYHigh 0x43
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#define CursorLocLow 0x44
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#define CursorLocHigh 0x45
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#define CursorXOffset 0x46
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#define CursorYOffset 0x47
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#define CursorFG1 0x48
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#define CursorFG2 0x49
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#define CursorFG3 0x4A
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#define CursorFG4 0x4B
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#define CursorBG1 0x4C
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#define CursorBG2 0x4D
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#define CursorBG3 0x4E
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#define CursorBG4 0x4F
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#define CursorControl 0x50
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#define PCIRetry 0x55
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#define PreEndControl 0x56
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#define PreEndFetch 0x57
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#define PCIMaster 0x60
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#define Enhancement0 0x62
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#define NewEDO 0x64
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/* --- Additions by AMR for Vidix support --- */
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#define VideoWin1_HScale 0x80
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#define VideoWin1_VScale 0x82
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#define VideoWin1_Start 0x86
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#define VideoWin1_Stop 0x8a
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#define Video_Flags 0x8e
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#define VideoWin1_Y_BPR 0x90
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#define VideoWin1_Y_Offset 0x92
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#define Video_LineBufferThreshold 0x95
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#define Video_LineBufferLevel 0x96
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#define Video_Flags2 0x97
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/* --- */
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#define TVinterface 0xC0
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#define TVMode 0xC1
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#define ClockControl 0xCF
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/* 3CE */
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#define MiscExtFunc 0x0F
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#define MiscIntContReg 0x2F
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#define CyberControl 0x30
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#define CyberEnhance 0x31
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#define FPConfig 0x33
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#define VertStretch 0x52
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#define HorStretch 0x53
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#define BiosMode 0x5c
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#define BiosNewMode1 0x5a
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#define BiosNewMode2 0x5c
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#define BiosReg 0x5d
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/* --- MMIO Macros by AMR --- */
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int HACKBUCKET12345678; /* Horrible hack to work around cache/speed issue */
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#define INB(addr) (HACKBUCKET12345678=*(cyberblade_reg_base+addr))
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#define INW(addr) (HACKBUCKET12345678=*(unsigned short *)(cyberblade_reg_base+addr))
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#define OUTB(addr,val) (*(cyberblade_reg_base+addr)=(val))
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#define OUTW(addr,val) (*(unsigned short *)(cyberblade_reg_base+addr)=(val))
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#define SRINB(reg) (OUTB(0x3c4,reg), INB(0x3c5))
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#define SROUTB(reg,val) (OUTW(0x3c4,(val)<<8|reg))
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#define CRINB(reg) \
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(OUTB(cyberblade_crtc+4,reg), INB(cyberblade_crtc+5))
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#define CROUTB(reg,val) \
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(OUTW(cyberblade_crtc+4,(val)<<8|reg))
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/* --- */
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@ -0,0 +1,597 @@
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/*
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Driver for CyberBlade/i1 - Version 0.1.1
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Copyright (C) 2002 by Alastair M. Robinson.
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Based on Permedia 3 driver by Måns Rullgård
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Thanks to Gilles Frattini for bugfixes
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Official homepage: http://www.blackfiveservices.co.uk/EPIAVidix.shtml
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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To Do:
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Implement Hue/Saturation controls
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Support / Test multiple frames
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Test colour-key code more extensively
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*/
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#include <errno.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <inttypes.h>
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#include <unistd.h>
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#include "../vidix.h"
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#include "../fourcc.h"
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#include "../../libdha/libdha.h"
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#include "../../libdha/pci_ids.h"
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#include "../../libdha/pci_names.h"
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#include "../../config.h"
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#include "cyberblade_regs.h"
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pciinfo_t pci_info;
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unsigned char *cyberblade_reg_base;
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unsigned char *cyberblade_mem;
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int cyberblade_crtc;
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char save_colourkey[6];
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/* Helper functions for reading registers.
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Implementing these as macros leads to problems
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which are either cache or timing related... */
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static int CRINW(int reg)
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{
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int result;
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result=CRINB(reg);
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result|=CRINB(reg+1)<<8;
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return(result);
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}
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static void CROUTW(int reg,int val)
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{
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CROUTB(reg,val&255);
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CROUTB(reg+1,(val>>8)&255);
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}
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static int SRINW(int reg)
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{
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int result;
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result=SRINB(reg);
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result|=SRINB(reg+1)<<8;
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return(result);
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}
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static void SROUTW(int reg,int val)
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{
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SROUTB(reg,val&255);
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SROUTB(reg+1,(val>>8)&255);
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}
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/* --- */
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static vidix_capability_t cyberblade_cap =
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{
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"Trident CyberBlade i1 driver",
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"Alastair M. Robinson <blackfive@fakenhamweb.co.uk>",
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TYPE_OUTPUT,
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{ 0, 0, 0, 0 },
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1024,
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1024,
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4,
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4,
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-1,
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FLAG_UPSCALER|FLAG_DOWNSCALER,
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VENDOR_TRIDENT,
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-1,
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{ 0, 0, 0, 0 }
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};
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unsigned int vixGetVersion(void)
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{
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return(VIDIX_VERSION);
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}
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static unsigned short cyberblade_card_ids[] =
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{
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DEVICE_TRIDENT_CYBERBLADE_I1
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};
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static int find_chip(unsigned chip_id)
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{
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unsigned i;
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for(i = 0;i < sizeof(cyberblade_card_ids)/sizeof(unsigned short);i++)
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{
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if(chip_id == cyberblade_card_ids[i]) return i;
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}
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return -1;
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}
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int vixProbe(int verbose, int force)
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{
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pciinfo_t lst[MAX_PCI_DEVICES];
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unsigned i,num_pci;
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int err;
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err = pci_scan(lst,&num_pci);
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if(err)
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{
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printf("[cyberblade] Error occured during pci scan: %s\n",strerror(err));
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return err;
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}
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else
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{
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err = ENXIO;
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for(i=0; i < num_pci; i++)
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{
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if(lst[i].vendor == VENDOR_TRIDENT)
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{
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int idx;
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const char *dname;
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idx = find_chip(lst[i].device);
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if(idx == -1)
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continue;
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dname = pci_device_name(VENDOR_TRIDENT, lst[i].device);
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dname = dname ? dname : "Unknown chip";
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printf("[cyberblade] Found chip: %s\n", dname);
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cyberblade_cap.device_id = lst[i].device;
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err = 0;
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memcpy(&pci_info, &lst[i], sizeof(pciinfo_t));
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break;
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}
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}
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}
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if(err && verbose) printf("[cyberblade] Can't find chip\n");
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return err;
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}
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int vixInit(void)
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{
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cyberblade_reg_base = map_phys_mem(pci_info.base1, 0x20000);
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cyberblade_mem = map_phys_mem(pci_info.base0, 0x800000);
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if(INB(0x3cc)&1)
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cyberblade_crtc=0x3d0;
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else
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cyberblade_crtc=0x3b0;
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printf("[cyberblade] Using IOBase: 0x%lx, FBBase: 0x%lx, CRTC at 0x%x\n",cyberblade_reg_base,cyberblade_mem,cyberblade_crtc);
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save_colourkey[0]=SRINB(0x50);
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save_colourkey[1]=SRINB(0x51);
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save_colourkey[2]=SRINB(0x52);
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save_colourkey[3]=SRINB(0x54);
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save_colourkey[4]=SRINB(0x55);
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save_colourkey[5]=SRINB(0x56);
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return 0;
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}
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void vixDestroy(void)
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{
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int protect;
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protect=SRINB(0x11);
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SROUTB(0x11, 0x92);
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CROUTB(0x8E, 0xc4); /* Disable overlay */
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SROUTB(0x50,save_colourkey[0]);
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SROUTB(0x51,save_colourkey[1]);
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SROUTB(0x52,save_colourkey[2]);
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SROUTB(0x54,save_colourkey[3]);
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SROUTB(0x55,save_colourkey[4]);
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SROUTB(0x56,save_colourkey[5]);
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SROUTB(0x11, protect);
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unmap_phys_mem(cyberblade_reg_base, 0x20000);
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unmap_phys_mem(cyberblade_mem, 0x800000);
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}
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int vixGetCapability(vidix_capability_t *to)
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{
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memcpy(to, &cyberblade_cap, sizeof(vidix_capability_t));
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return 0;
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}
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static int is_supported_fourcc(uint32_t fourcc)
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{
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switch(fourcc)
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{
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case IMGFMT_YUY2:
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case IMGFMT_YV12:
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case IMGFMT_YVU9:
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case IMGFMT_BGR16:
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return 1;
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default:
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return 0;
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}
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}
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int vixQueryFourcc(vidix_fourcc_t *to)
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{
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if(is_supported_fourcc(to->fourcc))
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{
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to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP |
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VID_DEPTH_4BPP | VID_DEPTH_8BPP |
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VID_DEPTH_12BPP| VID_DEPTH_15BPP|
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VID_DEPTH_16BPP| VID_DEPTH_24BPP|
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VID_DEPTH_32BPP;
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to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY;
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return 0;
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}
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else
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to->depth = to->flags = 0;
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return ENOSYS;
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}
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static int frames[VID_PLAY_MAXFRAMES];
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static vidix_grkey_t cyberblade_grkey;
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int vixGetGrKeys(vidix_grkey_t *grkey)
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{
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memcpy(grkey, &cyberblade_grkey, sizeof(vidix_grkey_t));
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return(0);
|
||||
}
|
||||
|
||||
int vixSetGrKeys(const vidix_grkey_t *grkey)
|
||||
{
|
||||
int pixfmt=CRINB(0x38);
|
||||
memcpy(&cyberblade_grkey, grkey, sizeof(vidix_grkey_t));
|
||||
|
||||
if(pixfmt&0x28) /* 32 or 24 bpp */
|
||||
{
|
||||
SROUTB(0x50, cyberblade_grkey.ckey.blue); /* Colour Key */
|
||||
SROUTB(0x51, cyberblade_grkey.ckey.green); /* Colour Key */
|
||||
SROUTB(0x52, cyberblade_grkey.ckey.red); /* Colour Key */
|
||||
SROUTB(0x54, 0xff); /* Colour Key Mask */
|
||||
SROUTB(0x55, 0xff); /* Colour Key Mask */
|
||||
SROUTB(0x56, 0xff); /* Colour Key Mask */
|
||||
}
|
||||
else
|
||||
{
|
||||
int tmp=((cyberblade_grkey.ckey.blue & 0xF8)>>3)
|
||||
| ((cyberblade_grkey.ckey.green & 0xfc)<<3)
|
||||
| ((cyberblade_grkey.ckey.red & 0xf8)<<8);
|
||||
SROUTB(0x50, tmp&0xff); /* Colour Key */
|
||||
SROUTB(0x51, (tmp>>8)&0xff); /* Colour Key */
|
||||
SROUTB(0x52, 0); /* Colour Key */
|
||||
SROUTB(0x54, 0xff); /* Colour Key Mask */
|
||||
SROUTB(0x55, 0xff); /* Colour Key Mask */
|
||||
SROUTB(0x56, 0x00); /* Colour Key Mask */
|
||||
}
|
||||
return(0);
|
||||
}
|
||||
|
||||
|
||||
vidix_video_eq_t equal =
|
||||
{
|
||||
VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | VEQ_CAP_HUE,
|
||||
300, 100, 0, 0, 0, 0, 0, 0
|
||||
};
|
||||
|
||||
int vixPlaybackGetEq( vidix_video_eq_t * eq)
|
||||
{
|
||||
memcpy(eq,&equal,sizeof(vidix_video_eq_t));
|
||||
return 0;
|
||||
}
|
||||
|
||||
int vixPlaybackSetEq( const vidix_video_eq_t * eq)
|
||||
{
|
||||
int br,sat,cr,protect;
|
||||
if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness;
|
||||
if(eq->cap & VEQ_CAP_CONTRAST) equal.contrast = eq->contrast;
|
||||
if(eq->cap & VEQ_CAP_SATURATION) equal.saturation = eq->saturation;
|
||||
if(eq->cap & VEQ_CAP_HUE) equal.hue = eq->hue;
|
||||
if(eq->cap & VEQ_CAP_RGB_INTENSITY)
|
||||
{
|
||||
equal.red_intensity = eq->red_intensity;
|
||||
equal.green_intensity = eq->green_intensity;
|
||||
equal.blue_intensity = eq->blue_intensity;
|
||||
}
|
||||
equal.flags = eq->flags;
|
||||
|
||||
cr = (equal.contrast) * 31 / 2000; cr+=16;
|
||||
if (cr < 0) cr = 0; if(cr > 7) cr = 7;
|
||||
cr=cr<<4 | cr;
|
||||
|
||||
br = (equal.brightness+1000) * 63 / 2000;
|
||||
if (br < 0) br = 0; if(br > 63) br = 63;
|
||||
if(br>32) br-=32; else br+=32;
|
||||
|
||||
sat = (equal.saturation + 1000) * 16 / 2000;
|
||||
if (sat < 0) sat = 0; if(sat > 31) sat = 31;
|
||||
|
||||
protect=SRINB(0x11);
|
||||
SROUTB(0x11, 0x92);
|
||||
|
||||
SROUTB(0xBC,cr);
|
||||
SROUTW(0xB0,(br<<10)|4);
|
||||
|
||||
SROUTB(0x11, protect);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int YOffs,UOffs,VOffs;
|
||||
|
||||
int vixConfigPlayback(vidix_playback_t *info)
|
||||
{
|
||||
int shrink, zoom;
|
||||
int src_w, drw_w;
|
||||
int src_h, drw_h;
|
||||
int hscale,vscale;
|
||||
long base0;
|
||||
int y_pitch, uv_pitch;
|
||||
int protect=0;
|
||||
int layout=0;
|
||||
unsigned int i;
|
||||
|
||||
if(!is_supported_fourcc(info->fourcc))
|
||||
return -1;
|
||||
|
||||
src_w = info->src.w;
|
||||
src_h = info->src.h;
|
||||
|
||||
drw_w = info->dest.w;
|
||||
drw_h = info->dest.h;
|
||||
|
||||
switch(info->fourcc)
|
||||
{
|
||||
case IMGFMT_YUY2:
|
||||
case IMGFMT_BGR16:
|
||||
y_pitch = (src_w*2 + 15) & ~15;
|
||||
uv_pitch = 0;
|
||||
YOffs=VOffs=UOffs=info->offset.y = info->offset.v = info->offset.u = 0;
|
||||
info->frame_size = y_pitch*src_h;
|
||||
layout=0x0; /* packed */
|
||||
break;
|
||||
case IMGFMT_YV12:
|
||||
y_pitch = (src_w+15) & ~15;
|
||||
uv_pitch = ((src_w/2)+7) & ~7;
|
||||
YOffs=info->offset.y = 0;
|
||||
VOffs=info->offset.v = y_pitch*src_h;
|
||||
UOffs=info->offset.u = info->offset.v+(uv_pitch)*(src_h/2);
|
||||
info->frame_size = y_pitch*src_h + 2*uv_pitch*(src_h/2);
|
||||
layout=0x1; /* planar, 4:1:1 */
|
||||
break;
|
||||
case IMGFMT_YVU9:
|
||||
y_pitch = (src_w+15) & ~15;
|
||||
uv_pitch = ((src_w/4)+3) & ~3;
|
||||
YOffs=info->offset.y = 0;
|
||||
VOffs=info->offset.v = y_pitch*src_h;
|
||||
UOffs=info->offset.u = info->offset.v+(uv_pitch)*(src_h/4);
|
||||
info->frame_size = y_pitch*src_h + 2*uv_pitch*(src_h/4);
|
||||
layout=0x51; /* planar, 16:1:1 */
|
||||
break;
|
||||
}
|
||||
|
||||
/* Assume we have 4 MB to play with */
|
||||
info->num_frames = 0x400000 / info->frame_size;
|
||||
if(info->num_frames > VID_PLAY_MAXFRAMES)
|
||||
info->num_frames = VID_PLAY_MAXFRAMES;
|
||||
|
||||
/* Start at 4 MB. Let's hope it's not in use. */
|
||||
base0 = 0x400000;
|
||||
info->dga_addr = cyberblade_mem + base0;
|
||||
|
||||
info->dest.pitch.y = 16;
|
||||
info->dest.pitch.u = 16;
|
||||
info->dest.pitch.v = 16;
|
||||
|
||||
for(i = 0; i < info->num_frames; i++)
|
||||
{
|
||||
info->offsets[i] = info->frame_size * i;
|
||||
frames[i] = base0+info->offsets[i];
|
||||
}
|
||||
|
||||
/* Unprotect hardware registers... */
|
||||
protect=SRINB(0x11);
|
||||
SROUTB(0x11, 0x92);
|
||||
|
||||
SROUTB(0x57, 0xc0); /* Playback key function */
|
||||
SROUTB(0x21, 0x34); /* Signature control */
|
||||
SROUTB(0x37, 0x30); /* Video key mode */
|
||||
|
||||
{
|
||||
int pixfmt=CRINB(0x38);
|
||||
if(pixfmt&0x28) /* 32 or 24 bpp */
|
||||
{
|
||||
SROUTB(0x50, cyberblade_grkey.ckey.blue); /* Colour Key */
|
||||
SROUTB(0x51, cyberblade_grkey.ckey.green); /* Colour Key */
|
||||
SROUTB(0x52, cyberblade_grkey.ckey.red); /* Colour Key */
|
||||
SROUTB(0x54, 0xff); /* Colour Key Mask */
|
||||
SROUTB(0x55, 0xff); /* Colour Key Mask */
|
||||
SROUTB(0x56, 0xff); /* Colour Key Mask */
|
||||
}
|
||||
else
|
||||
{
|
||||
int tmp=((cyberblade_grkey.ckey.blue & 0xf8)>>3)
|
||||
|((cyberblade_grkey.ckey.green & 0xfc)<<3)
|
||||
|((cyberblade_grkey.ckey.red & 0xf8)<<8);
|
||||
SROUTB(0x50, tmp&0xff); /* Colour Key */
|
||||
SROUTB(0x51, (tmp>>8)&0xff); /* Colour Key */
|
||||
SROUTB(0x52, 0x00); /* Colour Key */
|
||||
SROUTB(0x54, 0xff); /* Colour Key Mask */
|
||||
SROUTB(0x55, 0xff); /* Colour Key Mask */
|
||||
SROUTB(0x56, 0x00); /* Colour Key Mask */
|
||||
}
|
||||
}
|
||||
/* compute_scale_factor(&src_w, &drw_w, &shrink, &zoom); */
|
||||
{
|
||||
int HTotal,VTotal,HSync,VSync,Overflow;
|
||||
int tx1,ty1,tx2,ty2;
|
||||
|
||||
if(CRINB(0xd1)&0x80)
|
||||
{
|
||||
fprintf(stderr,"[cyberblade] Using TV-CRTC\n");
|
||||
HTotal=CRINB(0xe0);
|
||||
HSync=CRINB(0xe4);
|
||||
VTotal=CRINB(0xe6);
|
||||
VSync=CRINB(0xf0);
|
||||
Overflow=CRINB(0xe7);
|
||||
HTotal <<=3; HTotal-=16;
|
||||
HSync <<=3;
|
||||
VTotal |= (Overflow & 1) <<8;
|
||||
VTotal |= (Overflow & 0x20) <<4;
|
||||
VTotal +=5;
|
||||
VSync |= (Overflow & 4) <<6;
|
||||
VSync |= (Overflow & 0x80) <<2;
|
||||
}
|
||||
else
|
||||
{
|
||||
fprintf(stderr,"[cyberblade] Using Standard CRTC\n");
|
||||
HTotal=CRINB(0x00);
|
||||
HSync=CRINB(0x04);
|
||||
VTotal=CRINB(0x06);
|
||||
VSync=CRINB(0x10);
|
||||
Overflow=CRINB(0x07);
|
||||
HTotal <<=3;
|
||||
HSync <<=3;
|
||||
VTotal |= (Overflow & 1) <<8;
|
||||
VTotal |= (Overflow & 0x20) <<4;
|
||||
VSync |= (Overflow & 4) <<6;
|
||||
VSync |= (Overflow & 0x80) <<2;
|
||||
}
|
||||
|
||||
tx1=(HTotal-HSync)+15+info->dest.x;
|
||||
ty1=(VTotal-VSync)-8+info->dest.y;
|
||||
tx2=tx1+info->dest.w;
|
||||
ty2=ty1+info->dest.h;
|
||||
|
||||
CROUTW(0x86,tx1);
|
||||
CROUTW(0x88,ty1);
|
||||
CROUTW(0x8a,tx2);
|
||||
CROUTW(0x8c,ty2+3);
|
||||
}
|
||||
|
||||
if(src_w==drw_w)
|
||||
hscale=0;
|
||||
else if(src_w<drw_w)
|
||||
{
|
||||
hscale=((src_w<<10)/(drw_w-2)) & 0x1fff;
|
||||
}
|
||||
else
|
||||
{
|
||||
hscale=0x8000 | ((((src_w/drw_w)-1)&7)<<10) | (((drw_w<<10)/src_w) & 0x3ff);
|
||||
}
|
||||
|
||||
vscale=(src_h<<10)/(drw_h);
|
||||
if(drw_h<src_h)
|
||||
vscale=0x8000|((drw_h<<10)/(src_h));
|
||||
|
||||
/* Write scale factors to hardware */
|
||||
|
||||
CROUTW(0x80,hscale); /* Horizontal Scale */
|
||||
CROUTW(0x82,vscale); /* Vertical Scale */
|
||||
|
||||
/* Now set the start address and data layout */
|
||||
{
|
||||
int lb = (y_pitch+2) >> 2;
|
||||
CROUTB(0x95, ((lb & 0x100)>>1) | 0x08 ); /* Linebuffer level bit 8 & threshold */
|
||||
CROUTB(0x96, (lb & 0xFF)); /* Linebuffer level */
|
||||
|
||||
CROUTB(0x97, 0x00); /* VDE Flags */
|
||||
CROUTB(0xBA, 0x00); /* Chroma key */
|
||||
CROUTB(0xBB, 0x00); /* Chroma key */
|
||||
CROUTB(0xBC, 0xFF); /* Chroma key */
|
||||
CROUTB(0xBD, 0xFF); /* Chroma key */
|
||||
CROUTB(0xBE, 0x05); /* Capture control */
|
||||
|
||||
if(src_w > 384)
|
||||
layout|=4; /* 2x line buffers */
|
||||
SROUTB(0x97, layout);
|
||||
|
||||
CROUTW(0x90,y_pitch); /* Y Bytes per row */
|
||||
SROUTW(0x9A,uv_pitch); /* UV Bytes per row */
|
||||
|
||||
switch(info->fourcc)
|
||||
{
|
||||
case IMGFMT_BGR16:
|
||||
CROUTB(0x8F, 0x24); /* VDE Flags - Edge Recovery & CSC Bypass */
|
||||
CROUTB(0xBF, 0x02); /* Video format - RGB16 */
|
||||
SROUTB(0xBE, 0x0); /* HSCB disabled */
|
||||
break;
|
||||
default:
|
||||
CROUTB(0x8F, 0x20); /* VDE Flags - Edge Recovery */
|
||||
CROUTB(0xBF, 0x00); /* Video format - YUV */
|
||||
SROUTB(0xBE, 0x03); /* HSCB enabled */
|
||||
break;
|
||||
}
|
||||
|
||||
CROUTB(0x92, ((base0+info->offset.y) >> 3) &0xff); /* Lower 8 bits of start address */
|
||||
CROUTB(0x93, ((base0+info->offset.y) >> 11) &0xff); /* Mid 8 bits of start address */
|
||||
CROUTB(0x94, ((base0+info->offset.y) >> 19) &0xf); /* Upper 4 bits of start address */
|
||||
SROUTB(0x80, ((base0+info->offset.v) >> 3) &0xff); /* Lower 8 bits of start address */
|
||||
SROUTB(0x81, ((base0+info->offset.v) >> 11) &0xff); /* Mid 8 bits of start address */
|
||||
SROUTB(0x82, ((base0+info->offset.v) >> 19) &0xf); /* Upper 4 bits of start address */
|
||||
SROUTB(0x83, ((base0+info->offset.u) >> 3) &0xff); /* Lower 8 bits of start address */
|
||||
SROUTB(0x84, ((base0+info->offset.u) >> 11) &0xff); /* Mid 8 bits of start address */
|
||||
SROUTB(0x85, ((base0+info->offset.u) >> 19) &0xf); /* Upper 4 bits of start address */
|
||||
}
|
||||
|
||||
vixPlaybackSetEq(&equal);
|
||||
|
||||
/* Protect hardware registers again */
|
||||
SROUTB(0x11, protect);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int vixPlaybackOn(void)
|
||||
{
|
||||
/* Enable overlay */
|
||||
CROUTB(0x8E, 0xd4); /* VDE Flags*/
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int vixPlaybackOff(void)
|
||||
{
|
||||
/* Disable overlay */
|
||||
CROUTB(0x8E, 0xc4); /* VDE Flags*/
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int vixPlaybackFrameSelect(unsigned int frame)
|
||||
{
|
||||
int protect;
|
||||
protect=SRINB(0x11);
|
||||
SROUTB(0x11, 0x92);
|
||||
/* Set overlay address to that of selected frame */
|
||||
CROUTB(0x92, ((frames[frame]+YOffs) >> 3) &0xff); /* Lower 8 bits of start address */
|
||||
CROUTB(0x93, ((frames[frame]+YOffs) >> 11) &0xff); /* Mid 8 bits of start address */
|
||||
CROUTB(0x94, ((frames[frame]+YOffs) >> 19) &0xf); /* Upper 4 bits of start address */
|
||||
SROUTB(0x80, ((frames[frame]+VOffs) >> 3) &0xff); /* Lower 8 bits of start address */
|
||||
SROUTB(0x81, ((frames[frame]+VOffs) >> 11) &0xff); /* Mid 8 bits of start address */
|
||||
SROUTB(0x82, ((frames[frame]+VOffs) >> 19) &0xf); /* Upper 4 bits of start address */
|
||||
SROUTB(0x83, ((frames[frame]+UOffs) >> 3) &0xff); /* Lower 8 bits of start address */
|
||||
SROUTB(0x84, ((frames[frame]+UOffs) >> 11) &0xff); /* Mid 8 bits of start address */
|
||||
SROUTB(0x85, ((frames[frame]+UOffs) >> 19) &0xf); /* Upper 4 bits of start address */
|
||||
SROUTB(0x11, protect);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue