mirror of
https://github.com/mpv-player/mpv
synced 2025-03-05 13:47:39 +00:00
removed old code, that has been commented out for too long time
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@23072 b3059339-0415-0410-9bf9-f77b7e298cf2
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@ -380,9 +380,6 @@ static void mga_vid_write_regs(int restore)
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// restore it
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colkey_saved=0;
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// printf("[mga] Restoring colorkey (ON: %d %02X:%02X:%02X)\n",
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// colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]);
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// Set color key registers:
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writeb( XKEYOPMODE, mga_mmio_base + PALWTADD);
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writeb( colkey_on, mga_mmio_base + X_DATAREG);
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@ -429,10 +426,6 @@ static void mga_vid_write_regs(int restore)
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colkey_mask[2]=(unsigned char)readb(mga_mmio_base + X_DATAREG);
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writeb( XCOLMSK, mga_mmio_base + PALWTADD);
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colkey_mask[3]=(unsigned char)readb(mga_mmio_base + X_DATAREG);
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// printf("[mga] Saved colorkey (ON: %d %02X:%02X:%02X)\n",
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// colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]);
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}
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if(!restore){
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@ -557,45 +550,19 @@ if(!restore){
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readl(mga_mmio_base + BESSTATUS));
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}
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#ifdef CRTC2
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// printf("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL));
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// printf("c2misc:0x%08x\n",readl(mga_mmio_base + C2MISC));
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// printf("c2ctl:0x%08x c2datactl:0x%08x\n",cregs.c2ctl,cregs.c2datactl);
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// writel(cregs.c2ctl, mga_mmio_base + C2CTL);
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writel(((readl(mga_mmio_base + C2CTL) & ~0x03e00000) + (cregs.c2ctl & 0x03e00000)), mga_mmio_base + C2CTL);
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writel(((readl(mga_mmio_base + C2DATACTL) & ~0x000000ff) + (cregs.c2datactl & 0x000000ff)), mga_mmio_base + C2DATACTL);
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// ctrc2
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// disable CRTC2 acording to specs
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// writel(cregs.c2ctl & 0xfffffff0, mga_mmio_base + C2CTL);
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// je to treba ???
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// writeb((readb(mga_mmio_base + XMISCCTRL) & 0x19) | 0xa2, mga_mmio_base + XMISCCTRL); // MAFC - mfcsel & vdoutsel
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// writeb((readb(mga_mmio_base + XMISCCTRL) & 0x19) | 0x92, mga_mmio_base + XMISCCTRL);
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// writeb((readb(mga_mmio_base + XMISCCTRL) & ~0xe9) + 0xa2, mga_mmio_base + XMISCCTRL);
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// writel(cregs.c2datactl, mga_mmio_base + C2DATACTL);
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// writel(cregs.c2hparam, mga_mmio_base + C2HPARAM);
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// writel(cregs.c2hsync, mga_mmio_base + C2HSYNC);
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// writel(cregs.c2vparam, mga_mmio_base + C2VPARAM);
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// writel(cregs.c2vsync, mga_mmio_base + C2VSYNC);
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writel(cregs.c2misc, mga_mmio_base + C2MISC);
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if (mga_verbose > 1) printf("[mga] c2offset = %d\n",cregs.c2offset);
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writel(cregs.c2offset, mga_mmio_base + C2OFFSET);
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writel(cregs.c2startadd0, mga_mmio_base + C2STARTADD0);
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// writel(cregs.c2startadd1, mga_mmio_base + C2STARTADD1);
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writel(cregs.c2pl2startadd0, mga_mmio_base + C2PL2STARTADD0);
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// writel(cregs.c2pl2startadd1, mga_mmio_base + C2PL2STARTADD1);
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writel(cregs.c2pl3startadd0, mga_mmio_base + C2PL3STARTADD0);
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// writel(cregs.c2pl3startadd1, mga_mmio_base + C2PL3STARTADD1);
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writel(cregs.c2spicstartadd0, mga_mmio_base + C2SPICSTARTADD0);
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// writel(cregs.c2spicstartadd1, mga_mmio_base + C2SPICSTARTADD1);
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// writel(cregs.c2subpiclut, mga_mmio_base + C2SUBPICLUT);
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// writel(cregs.c2preload, mga_mmio_base + C2PRELOAD);
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// finaly enable everything
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// writel(cregs.c2ctl, mga_mmio_base + C2CTL);
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// printf("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL));
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// printf("c2misc:0x%08x\n", readl(mga_mmio_base + C2MISC));
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#endif
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}
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@ -604,7 +571,6 @@ static void enable_irq(){
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long int cc;
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cc = readl(mga_mmio_base + IEN);
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// printf("*** !!! IRQREG = %d\n", (int)(cc&0xff));
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writeb( 0x11, mga_mmio_base + CRTCX);
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@ -626,43 +592,14 @@ static void disable_irq()
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}
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void mga_handle_irq(int irq, void *dev_id/*, struct pt_regs *pregs*/) {
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// static int frame=0;
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// static int counter=0;
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long int cc;
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// if ( ! mga_enabled_flag ) return;
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// printf("vcount = %d\n",readl(mga_mmio_base + VCOUNT));
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//printf("mga_interrupt #%d\n", irq);
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if ( irq != -1 ) {
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cc = readl(mga_mmio_base + STATUS);
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if ( ! (cc & 0x10) ) return; /* vsyncpen */
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// debug_irqcnt++;
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}
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// if ( debug_irqignore ) {
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// debug_irqignore = 0;
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/*
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if ( mga_conf_deinterlace ) {
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if ( mga_first_field ) {
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// printf("mga_interrupt first field\n");
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if ( syncfb_interrupt() )
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mga_first_field = 0;
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} else {
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// printf("mga_interrupt second field\n");
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mga_select_buffer( mga_current_field | 2 );
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mga_first_field = 1;
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}
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} else {
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syncfb_interrupt();
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}
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*/
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// frame=(frame+1)&1;
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regs.besctl = (regs.besctl & ~0x07000000) + (mga_next_frame << 25);
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writel( regs.besctl, mga_mmio_base + BESCTL );
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@ -671,19 +608,12 @@ void mga_handle_irq(int irq, void *dev_id/*, struct pt_regs *pregs*/) {
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crtc2_frame_sel(mga_next_frame);
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#endif
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// } else {
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// debug_irqignore = 1;
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// }
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if ( irq != -1 ) {
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writeb( 0x11, mga_mmio_base + CRTCX);
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writeb( 0, mga_mmio_base + CRTCD );
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writeb( 0x10, mga_mmio_base + CRTCD );
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}
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// writel( regs.besglobctl, mga_mmio_base + BESGLOBCTL);
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return;
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}
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@ -740,8 +670,6 @@ static int mga_config_playback(vidix_playback_t *config)
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//FIXME check that window is valid and inside desktop
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// printf("[mga] vcount = %d\n", readl(mga_mmio_base + VCOUNT));
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sw+=sw&1;
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switch(config->fourcc)
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{
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@ -761,9 +689,6 @@ static int mga_config_playback(vidix_playback_t *config)
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}
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config->offsets[0] = 0;
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// config->offsets[1] = config->frame_size;
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// config->offsets[2] = 2*config->frame_size;
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// config->offsets[3] = 3*config->frame_size;
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for (i = 1; i < config->num_frames+1; i++)
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config->offsets[i] = i*config->frame_size;
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@ -778,11 +703,6 @@ static int mga_config_playback(vidix_playback_t *config)
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config->offset.u=config->offset.v+((sw + 31) & ~31) * sh /4;
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}
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//FIXME figure out a better way to allocate memory on card
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//allocate 2 megs
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//mga_src_base = mga_mem_base + (MGA_VIDMEM_SIZE-2) * 0x100000;
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//mga_src_base = (MGA_VIDMEM_SIZE-3) * 0x100000;
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mga_src_base = (mga_ram_size*0x100000-config->num_frames*config->frame_size);
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if (mga_src_base < 0)
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{
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@ -872,7 +792,6 @@ static int mga_config_playback(vidix_playback_t *config)
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regs.besviscal = ifactor<<2;
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baseadrofs = ((ofstop*regs.besviscal)>>16)*regs.bespitch;
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//frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2;
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regs.besa1org = (uint32_t) mga_src_base + baseadrofs;
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regs.besa2org = (uint32_t) mga_src_base + baseadrofs + 1*config->frame_size;
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regs.besb1org = (uint32_t) mga_src_base + baseadrofs + 2*config->frame_size;
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@ -1109,17 +1028,13 @@ switch(config->fourcc){
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cregs.c2offset=(regs.bespitch << 1);
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cregs.c2pl2startadd0=regs.besa1corg;
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// cregs.c2pl2startadd1=regs.besa2corg;
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cregs.c2pl3startadd0=regs.besa1c3org;
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// cregs.c2pl3startadd1=regs.besa2c3org;
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cregs.c2preload=(vsyncstart << 16) | (hsyncstart); // from
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cregs.c2spicstartadd0=0; // not used
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// cregs.c2spicstartadd1=0; // not used
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cregs.c2startadd0=regs.besa1org;
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// cregs.c2startadd1=regs.besa2org;
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cregs.c2subpiclut=0; //not used
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@ -1296,8 +1211,6 @@ static int mga_init(void)
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{
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switch((card_option>>10)&0x17)
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{
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// case 0x10:
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// case 0x13: mga_ram_size = 8; break;
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default: mga_ram_size = 8;
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}
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}
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@ -1360,7 +1273,6 @@ static void mga_destroy(void)
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vid_src_ready = 0;
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regs.besctl &= ~1;
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regs.besglobctl &= ~(1<<6); // UYVY format selected
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// mga_config.colkey_on=0; //!!!
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mga_vid_write_regs(1);
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mga_vid_in_use = 0;
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@ -1433,7 +1345,6 @@ static int mga_set_eq( const vidix_video_eq_t * eq)
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return(ENOTSUP);
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//regs.beslumactl = readl(mga_mmio_base + BESLUMACTL);
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// printf("LUMA = %08X \n",regs.beslumactl);
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if (eq->cap & VEQ_CAP_BRIGHTNESS) {
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regs.beslumactl &= 0xFFFF;
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regs.beslumactl |= (eq->brightness*255/2000)<<16;
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@ -1456,8 +1367,6 @@ static int mga_get_eq( vidix_video_eq_t * eq)
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return(ENOTSUP);
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}
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// regs.beslumactl = readl(mga_mmio_base + BESLUMACTL);
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eq->brightness = (signed short int)(regs.beslumactl >> 16) * 1000 / 128;
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eq->contrast = (signed short int)(regs.beslumactl & 0xFFFF) * 1000 / 128 - 1000;
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eq->cap = VEQ_CAP_BRIGHTNESS | VEQ_CAP_CONTRAST;
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