mpv/libvo/osd_template.c

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/*
* generic alpha renderers for all YUV modes and RGB depths
* Optimized by Nick and Michael.
*
* This file is part of MPlayer.
*
* MPlayer is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* MPlayer is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with MPlayer; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#undef PREFETCH
#undef EMMS
#undef PREFETCHW
#undef PAVGB
#if HAVE_MMX2
#define PREFETCH "prefetchnta"
#define PREFETCHW "prefetcht0"
#define PAVGB "pavgb"
#else
#define PREFETCH " # nop"
#define PREFETCHW " # nop"
#endif
#define EMMS "emms"
static inline void RENAME(vo_draw_alpha_yv12)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
int y;
#if HAVE_MMX
__asm__ volatile(
"pcmpeqb %%mm5, %%mm5\n\t" // F..F
"movq %%mm5, %%mm4\n\t"
"movq %%mm5, %%mm7\n\t"
"psllw $8, %%mm5\n\t" //FF00FF00FF00
"psrlw $8, %%mm4\n\t" //00FF00FF00FF
::);
#endif
for(y=0;y<h;y++){
register int x;
#if HAVE_MMX
__asm__ volatile(
PREFETCHW" %0\n\t"
PREFETCH" %1\n\t"
PREFETCH" %2\n\t"
::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
for(x=0;x<w;x+=8){
__asm__ volatile(
"movl %1, %%eax\n\t"
"orl 4%1, %%eax\n\t"
" jz 1f\n\t"
PREFETCHW" 32%0\n\t"
PREFETCH" 32%1\n\t"
PREFETCH" 32%2\n\t"
"movq %0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"pand %%mm4, %%mm0\n\t" //0Y0Y0Y0Y
"psrlw $8, %%mm1\n\t" //0Y0Y0Y0Y
"movq %1, %%mm2\n\t" //srca HGFEDCBA
"paddb %%mm7, %%mm2\n\t"
"movq %%mm2, %%mm3\n\t"
"pand %%mm4, %%mm2\n\t" //0G0E0C0A
"psrlw $8, %%mm3\n\t" //0H0F0D0B
"pmullw %%mm2, %%mm0\n\t"
"pmullw %%mm3, %%mm1\n\t"
"psrlw $8, %%mm0\n\t"
"pand %%mm5, %%mm1\n\t"
"por %%mm1, %%mm0\n\t"
"paddb %2, %%mm0\n\t"
"movq %%mm0, %0\n\t"
"1:\n\t"
:: "m" (dstbase[x]), "m" (srca[x]), "m" (src[x])
: "%eax");
}
#else
for(x=0;x<w;x++){
if(srca[x]) dstbase[x]=((dstbase[x]*srca[x])>>8)+src[x];
}
#endif
src+=srcstride;
srca+=srcstride;
dstbase+=dststride;
}
#if HAVE_MMX
__asm__ volatile(EMMS:::"memory");
#endif
return;
}
static inline void RENAME(vo_draw_alpha_yuy2)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
int y;
#if HAVE_MMX
__asm__ volatile(
"pxor %%mm7, %%mm7\n\t"
"pcmpeqb %%mm5, %%mm5\n\t" // F..F
"movq %%mm5, %%mm6\n\t"
"movq %%mm5, %%mm4\n\t"
"psllw $8, %%mm5\n\t" //FF00FF00FF00
"psrlw $8, %%mm4\n\t" //00FF00FF00FF
::);
#endif
for(y=0;y<h;y++){
register int x;
#if HAVE_MMX
__asm__ volatile(
PREFETCHW" %0\n\t"
PREFETCH" %1\n\t"
PREFETCH" %2\n\t"
::"m"(*dstbase),"m"(*srca),"m"(*src));
for(x=0;x<w;x+=4){
__asm__ volatile(
"movl %1, %%eax\n\t"
"orl %%eax, %%eax\n\t"
" jz 1f\n\t"
PREFETCHW" 32%0\n\t"
PREFETCH" 32%1\n\t"
PREFETCH" 32%2\n\t"
"movq %0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"pand %%mm4, %%mm0\n\t" //0Y0Y0Y0Y
"movd %%eax, %%mm2\n\t" //srca 0000DCBA
"paddb %%mm6, %%mm2\n\t"
"punpcklbw %%mm7, %%mm2\n\t" //srca 0D0C0B0A
"pmullw %%mm2, %%mm0\n\t"
"psrlw $8, %%mm0\n\t"
"pand %%mm5, %%mm1\n\t" //U0V0U0V0
"movd %2, %%mm2\n\t" //src 0000DCBA
"punpcklbw %%mm7, %%mm2\n\t" //srca 0D0C0B0A
"por %%mm1, %%mm0\n\t"
"paddb %%mm2, %%mm0\n\t"
"movq %%mm0, %0\n\t"
"1:\n\t"
:: "m" (dstbase[x*2]), "m" (srca[x]), "m" (src[x])
: "%eax");
}
#else
for(x=0;x<w;x++){
if(srca[x]) {
dstbase[2*x]=((dstbase[2*x]*srca[x])>>8)+src[x];
dstbase[2*x+1]=((((signed)dstbase[2*x+1]-128)*srca[x])>>8)+128;
}
}
#endif
src+=srcstride;
srca+=srcstride;
dstbase+=dststride;
}
#if HAVE_MMX
__asm__ volatile(EMMS:::"memory");
#endif
return;
}
static inline void RENAME(vo_draw_alpha_rgb24)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
int y;
#if HAVE_MMX
__asm__ volatile(
"pxor %%mm7, %%mm7\n\t"
"pcmpeqb %%mm6, %%mm6\n\t" // F..F
::);
#endif
for(y=0;y<h;y++){
register unsigned char *dst = dstbase;
register int x;
#if ARCH_X86 && (!ARCH_X86_64 || HAVE_MMX)
#if HAVE_MMX
__asm__ volatile(
PREFETCHW" %0\n\t"
PREFETCH" %1\n\t"
PREFETCH" %2\n\t"
::"m"(*dst),"m"(*srca),"m"(*src):"memory");
for(x=0;x<w;x+=2){
if(srca[x] || srca[x+1])
__asm__ volatile(
PREFETCHW" 32%0\n\t"
PREFETCH" 32%1\n\t"
PREFETCH" 32%2\n\t"
"movq %0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"movq %%mm0, %%mm5\n\t"
"punpcklbw %%mm7, %%mm0\n\t"
"punpckhbw %%mm7, %%mm1\n\t"
"movd %1, %%mm2\n\t" // srca ABCD0000
"paddb %%mm6, %%mm2\n\t"
"punpcklbw %%mm2, %%mm2\n\t" // srca AABBCCDD
"punpcklbw %%mm2, %%mm2\n\t" // srca AAAABBBB
"psrlq $8, %%mm2\n\t" // srca AAABBBB0
"movq %%mm2, %%mm3\n\t"
"punpcklbw %%mm7, %%mm2\n\t" // srca 0A0A0A0B
"punpckhbw %%mm7, %%mm3\n\t" // srca 0B0B0B00
"pmullw %%mm2, %%mm0\n\t"
"pmullw %%mm3, %%mm1\n\t"
"psrlw $8, %%mm0\n\t"
"psrlw $8, %%mm1\n\t"
"packuswb %%mm1, %%mm0\n\t"
"movd %2, %%mm2 \n\t" // src ABCD0000
"punpcklbw %%mm2, %%mm2\n\t" // src AABBCCDD
"punpcklbw %%mm2, %%mm2\n\t" // src AAAABBBB
"psrlq $8, %%mm2\n\t" // src AAABBBB0
"paddb %%mm2, %%mm0\n\t"
"pand %4, %%mm5\n\t"
"pand %3, %%mm0\n\t"
"por %%mm0, %%mm5\n\t"
"movq %%mm5, %0\n\t"
:: "m" (dst[0]), "m" (srca[x]), "m" (src[x]), "m"(mask24hl), "m"(mask24lh));
dst += 6;
}
#else /* HAVE_MMX */
for(x=0;x<w;x++){
if(srca[x]){
__asm__ volatile(
"movzbl (%0), %%ecx\n\t"
"movzbl 1(%0), %%eax\n\t"
"imull %1, %%ecx\n\t"
"imull %1, %%eax\n\t"
"addl %2, %%ecx\n\t"
"addl %2, %%eax\n\t"
"movb %%ch, (%0)\n\t"
"movb %%ah, 1(%0)\n\t"
"movzbl 2(%0), %%eax\n\t"
"imull %1, %%eax\n\t"
"addl %2, %%eax\n\t"
"movb %%ah, 2(%0)\n\t"
:
:"D" (dst),
"r" ((unsigned)srca[x]),
"r" (((unsigned)src[x])<<8)
:"%eax", "%ecx"
);
}
dst += 3;
}
#endif /* !HAVE_MMX */
#else /*non x86 arch or x86_64 with MMX disabled */
for(x=0;x<w;x++){
if(srca[x]){
dst[0]=((dst[0]*srca[x])>>8)+src[x];
dst[1]=((dst[1]*srca[x])>>8)+src[x];
dst[2]=((dst[2]*srca[x])>>8)+src[x];
}
dst+=3; // 24bpp
}
#endif /* arch_x86 */
src+=srcstride;
srca+=srcstride;
dstbase+=dststride;
}
#if HAVE_MMX
__asm__ volatile(EMMS:::"memory");
#endif
return;
}
static inline void RENAME(vo_draw_alpha_rgb32)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
int y;
Remove compile time/runtime CPU detection, and drop some platforms mplayer had three ways of enabling CPU specific assembler routines: a) Enable them at compile time; crash if the CPU can't handle it. b) Enable them at compile time, but let the configure script detect your CPU. Your binary will only crash if you try to run it on a different system that has less features than yours. This was the default, I think. c) Runtime detection. The implementation of b) and c) suck. a) is not really feasible (it sucks for users). Remove all code related to this, and use libav's CPU detection instead. Now the configure script will always enable CPU specific features, and disable them at runtime if libav reports them not as available. One implication is that now the compiler is always expected to handle SSE (etc.) inline assembly at runtime, unless it's explicitly disabled. Only checks for x86 CPU specific features are kept, the rest is either unused or barely used. Get rid of all the dump -mpcu, -march etc. flags. Trust the compiler to select decent settings. Get rid of support for the following operating systems: - BSD/OS (some ancient BSD fork) - QNX (don't care) - BeOS (dead, Haiku support is still welcome) - AIX (don't care) - HP-UX (don't care) - OS/2 (dead, actual support has been removed a while ago) Remove the configure code for detecting the endianness. Instead, use the standard header <endian.h>, which can be used if _GNU_SOURCE or _BSD_SOURCE is defined. (Maybe these changes should have been in a separate commit.) Since this is a quite violent code removal orgy, and I'm testing only on x86 32 bit Linux, expect regressions.
2012-07-29 15:20:57 +00:00
#if BYTE_ORDER == BIG_ENDIAN
dstbase++;
#endif
#if HAVE_MMX
__asm__ volatile(
"pxor %%mm7, %%mm7\n\t"
"pcmpeqb %%mm5, %%mm5\n\t" // F..F
"movq %%mm5, %%mm4\n\t"
"psllw $8, %%mm5\n\t" //FF00FF00FF00
"psrlw $8, %%mm4\n\t" //00FF00FF00FF
::);
#endif /* HAVE_MMX */
for(y=0;y<h;y++){
register int x;
#if ARCH_X86 && (!ARCH_X86_64 || HAVE_MMX)
#if HAVE_MMX
__asm__ volatile(
PREFETCHW" %0\n\t"
PREFETCH" %1\n\t"
PREFETCH" %2\n\t"
::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
for(x=0;x<w;x+=4){
__asm__ volatile(
"movl %1, %%eax\n\t"
"orl %%eax, %%eax\n\t"
" jz 1f\n\t"
PREFETCHW" 32%0\n\t"
PREFETCH" 32%1\n\t"
PREFETCH" 32%2\n\t"
"movq %0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"pand %%mm4, %%mm0\n\t" //0R0B0R0B
"psrlw $8, %%mm1\n\t" //0?0G0?0G
"movd %%eax, %%mm2\n\t" //srca 0000DCBA
"paddb %3, %%mm2\n\t"
"punpcklbw %%mm2, %%mm2\n\t" //srca DDCCBBAA
"movq %%mm2, %%mm3\n\t"
"punpcklbw %%mm7, %%mm2\n\t" //srca 0B0B0A0A
"pmullw %%mm2, %%mm0\n\t"
"pmullw %%mm2, %%mm1\n\t"
"psrlw $8, %%mm0\n\t"
"pand %%mm5, %%mm1\n\t"
"por %%mm1, %%mm0\n\t"
"movd %2, %%mm2 \n\t" //src 0000DCBA
"punpcklbw %%mm2, %%mm2\n\t" //src DDCCBBAA
"movq %%mm2, %%mm6\n\t"
"punpcklbw %%mm2, %%mm2\n\t" //src BBBBAAAA
"paddb %%mm2, %%mm0\n\t"
"movq %%mm0, %0\n\t"
"movq 8%0, %%mm0\n\t" // dstbase
"movq %%mm0, %%mm1\n\t"
"pand %%mm4, %%mm0\n\t" //0R0B0R0B
"psrlw $8, %%mm1\n\t" //0?0G0?0G
"punpckhbw %%mm7, %%mm3\n\t" //srca 0D0D0C0C
"pmullw %%mm3, %%mm0\n\t"
"pmullw %%mm3, %%mm1\n\t"
"psrlw $8, %%mm0\n\t"
"pand %%mm5, %%mm1\n\t"
"por %%mm1, %%mm0\n\t"
"punpckhbw %%mm6, %%mm6\n\t" //src DDDDCCCC
"paddb %%mm6, %%mm0\n\t"
"movq %%mm0, 8%0\n\t"
"1:\n\t"
:: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x]), "m" (bFF)
: "%eax");
}
#else /* HAVE_MMX */
for(x=0;x<w;x++){
if(srca[x]){
__asm__ volatile(
"movzbl (%0), %%ecx\n\t"
"movzbl 1(%0), %%eax\n\t"
"movzbl 2(%0), %%edx\n\t"
"imull %1, %%ecx\n\t"
"imull %1, %%eax\n\t"
"imull %1, %%edx\n\t"
"addl %2, %%ecx\n\t"
"addl %2, %%eax\n\t"
"addl %2, %%edx\n\t"
"movb %%ch, (%0)\n\t"
"movb %%ah, 1(%0)\n\t"
"movb %%dh, 2(%0)\n\t"
:
:"r" (&dstbase[4*x]),
"r" ((unsigned)srca[x]),
"r" (((unsigned)src[x])<<8)
:"%eax", "%ecx", "%edx"
);
}
}
#endif /* HAVE_MMX */
#else /*non x86 arch or x86_64 with MMX disabled */
for(x=0;x<w;x++){
if(srca[x]){
dstbase[4*x+0]=((dstbase[4*x+0]*srca[x])>>8)+src[x];
dstbase[4*x+1]=((dstbase[4*x+1]*srca[x])>>8)+src[x];
dstbase[4*x+2]=((dstbase[4*x+2]*srca[x])>>8)+src[x];
}
}
#endif /* arch_x86 */
src+=srcstride;
srca+=srcstride;
dstbase+=dststride;
}
#if HAVE_MMX
__asm__ volatile(EMMS:::"memory");
#endif
return;
}