2001-05-09 07:59:55 +00:00
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///
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/// Replacement of synth_1to1() with AMD's 3DNowEx(DSP)! SIMD operations support
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///
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/// This code based 'decode_3dnow.s' by Syuuhei Kashiyama
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/// <squash@mb.kcom.ne.jp>,only some types of changes have been made:
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///
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2001-05-12 07:12:38 +00:00
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/// - Added new opcode PFNACC
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/// - decreased number of opcodes (as it was suggested by k7 manual)
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2001-05-11 10:25:55 +00:00
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/// (using memory reference as operand of instructions)
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2001-05-09 07:59:55 +00:00
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/// - change function name for support 3DNowEx! automatic detect
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///
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/// note: because K7 processors are an aggresive out-of-order three-way
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/// superscalar ones instruction order is not significand for them.
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///
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/// Modified by Nick Kurshev <nickols_k@mail.ru>
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///
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/ synth_1to1_3dnow works the same way as the c version of
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/ synth_1to1. this assembler code based 'decode-i586.s'
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/ (by Stefan Bieschewski <stb@acm.org>), two types of changes
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/ have been made:
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/ - use {MMX,3DNow!} instruction for reduce cpu
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/ - remove unused(?) local symbols
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/
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/ useful sources of information on optimizing 3DNow! code include:
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/ AMD 3DNow! Technology Manual (Publication #21928)
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/ English: http://www.amd.com/K6/k6docs/pdf/21928d.pdf
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/ (Japanese: http://www.amd.com/japan/K6/k6docs/j21928c.pdf)
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/ AMD-K6-2 Processor Code Optimization Application Note (Publication #21924)
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/ English: http://www.amd.com/K6/k6docs/pdf/21924b.pdf
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/
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/ This code was tested only AMD-K6-2 processor Linux systems,
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/ please tell me:
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/ - whether this code works on other 3DNow! capable processors
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/ (ex.IDT-C6-2) or not
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/ - whether this code works on other OSes or not
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/
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/ by KIMURA Takuhiro <kim@hannah.ipc.miyakyo-u.ac.jp> - until 31.Mar.1998
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/ <kim@comtec.co.jp> - after 1.Apr.1998
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/ Enhancments for q-word operation by Michael Hipp
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.bss
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.comm buffs,4352,4
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.data
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.align 4
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bo:
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.long 1
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.text
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2001-05-12 07:12:38 +00:00
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/* int synth_1to1(real *bandPtr,int channel,unsigned char *out) */
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2001-05-09 07:59:55 +00:00
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.globl synth_1to1_3dnowex
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synth_1to1_3dnowex:
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subl $12,%esp
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pushl %ebp
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pushl %edi
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pushl %esi
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pushl %ebx
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movl 32(%esp),%eax
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movl 40(%esp),%esi
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movl $0,%edi
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movl bo,%ebp
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cmpl %edi,36(%esp)
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jne .L48
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decl %ebp
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andl $15,%ebp
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movl %ebp,bo
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movl $buffs,%ecx
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jmp .L49
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.L48:
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addl $2,%esi
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movl $buffs+2176,%ecx
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.L49:
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testl $1,%ebp
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je .L50
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movl %ecx,%ebx
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movl %ebp,16(%esp)
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pushl %eax
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movl 20(%esp),%edx
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leal (%ebx,%edx,4),%eax
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pushl %eax
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movl 24(%esp),%eax
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incl %eax
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andl $15,%eax
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leal 1088(,%eax,4),%eax
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addl %ebx,%eax
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jmp .L74
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.L50:
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leal 1088(%ecx),%ebx
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leal 1(%ebp),%edx
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movl %edx,16(%esp)
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pushl %eax
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leal 1092(%ecx,%ebp,4),%eax
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pushl %eax
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leal (%ecx,%ebp,4),%eax
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.L74:
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pushl %eax
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call dct64_3dnowex
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movl 16(%esp),%edx
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leal 0(,%edx,4),%edx
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movl $decwin+64,%eax
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2001-05-12 07:12:38 +00:00
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movl %eax,%ecx
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2001-05-09 07:59:55 +00:00
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subl %edx,%ecx
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movl $16,%ebp
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.L55:
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2001-05-11 10:25:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq (%ecx),%mm0
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pfmul (%ebx),%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 8(%ecx),%mm1
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pfmul 8(%ebx),%mm1
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pfadd %mm1,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 16(%ebx),%mm2
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pfmul 16(%ecx),%mm2
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pfadd %mm2,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 24(%ecx),%mm3
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pfmul 24(%ebx),%mm3
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pfadd %mm3,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 32(%ebx),%mm4
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pfmul 32(%ecx),%mm4
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pfadd %mm4,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 40(%ecx),%mm5
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pfmul 40(%ebx),%mm5
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pfadd %mm5,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 48(%ebx),%mm6
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pfmul 48(%ecx),%mm6
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pfadd %mm6,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 56(%ecx),%mm7
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pfmul 56(%ebx),%mm7
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pfadd %mm7,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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pfnacc %mm0, %mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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pf2id %mm0,%mm0
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movd %mm0,%eax
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2001-05-09 07:59:55 +00:00
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sar $16,%eax
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movw %ax,(%esi)
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addl $64,%ebx
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subl $-128,%ecx
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addl $4,%esi
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decl %ebp
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jnz .L55
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/ --- end of loop 1 ---
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2001-05-24 09:42:18 +00:00
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movd (%ecx),%mm0
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pfmul (%ebx),%mm0
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2001-05-09 07:59:55 +00:00
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movd 8(%ebx),%mm1
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2001-05-11 10:25:55 +00:00
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pfmul 8(%ecx),%mm1
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2001-05-24 09:42:18 +00:00
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pfadd %mm1,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movd 16(%ebx),%mm2
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pfmul 16(%ecx),%mm2
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pfadd %mm2,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movd 24(%ebx),%mm3
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pfmul 24(%ecx),%mm3
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pfadd %mm3,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movd 32(%ebx),%mm4
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pfmul 32(%ecx),%mm4
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pfadd %mm4,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movd 40(%ebx),%mm5
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pfmul 40(%ecx),%mm5
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pfadd %mm5,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movd 48(%ebx),%mm6
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pfmul 48(%ecx),%mm6
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pfadd %mm6,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movd 56(%ebx),%mm7
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pfmul 56(%ecx),%mm7
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pfadd %mm7,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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pf2id %mm0,%mm0
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movd %mm0,%eax
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2001-05-09 07:59:55 +00:00
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sar $16,%eax
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movw %ax,(%esi)
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addl $-64,%ebx
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addl $4,%esi
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addl $256,%ecx
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movl $15,%ebp
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.L68:
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2001-05-12 07:12:38 +00:00
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pxor %mm0, %mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq (%ecx),%mm1
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pfmul (%ebx),%mm1
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pfsub %mm1,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 8(%ecx),%mm2
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pfmul 8(%ebx),%mm2
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2001-05-09 07:59:55 +00:00
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pfsub %mm2,%mm0
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2001-05-24 09:42:18 +00:00
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movq 16(%ecx),%mm3
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pfmul 16(%ebx),%mm3
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pfsub %mm3,%mm0
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2001-05-09 07:59:55 +00:00
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movq 24(%ecx),%mm4
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2001-05-11 10:25:55 +00:00
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pfmul 24(%ebx),%mm4
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2001-05-09 07:59:55 +00:00
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pfsub %mm4,%mm0
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2001-05-24 09:42:18 +00:00
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movq 32(%ecx),%mm5
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pfmul 32(%ebx),%mm5
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pfsub %mm5,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 40(%ecx),%mm6
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pfmul 40(%ebx),%mm6
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pfsub %mm6,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 48(%ecx),%mm7
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pfmul 48(%ebx),%mm7
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pfsub %mm7,%mm0
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2001-05-09 07:59:55 +00:00
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2001-05-24 09:42:18 +00:00
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movq 56(%ecx),%mm1
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pfmul 56(%ebx),%mm1
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pfsub %mm1,%mm0
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2001-05-09 07:59:55 +00:00
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pfacc %mm0,%mm0
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pf2id %mm0,%mm0
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movd %mm0,%eax
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sar $16,%eax
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movw %ax,(%esi)
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addl $-64,%ebx
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subl $-128,%ecx
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addl $4,%esi
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decl %ebp
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jnz .L68
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/ --- end of loop 2
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femms
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movl %edi,%eax
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popl %ebx
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popl %esi
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popl %edi
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popl %ebp
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addl $12,%esp
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ret
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