2019-02-02 23:24:27 +00:00
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/*
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* Copyright (c) 2019 Philip Langdale <philipl@overt.org>
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*
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* This file is part of mpv.
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*
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* mpv is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* mpv is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with mpv. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "config.h"
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#include "hwdec_cuda.h"
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#include "video/out/placebo/ra_pl.h"
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#include <libavutil/hwcontext.h>
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#include <libavutil/hwcontext_cuda.h>
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2023-03-21 17:36:49 +00:00
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#include <libplacebo/vulkan.h>
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2019-02-02 23:24:27 +00:00
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#include <unistd.h>
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#if HAVE_WIN32_DESKTOP
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#include <versionhelpers.h>
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2023-01-16 21:28:24 +00:00
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#define HANDLE_TYPE PL_HANDLE_WIN32
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#else
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#define HANDLE_TYPE PL_HANDLE_FD
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2019-02-02 23:24:27 +00:00
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#endif
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#define CHECK_CU(x) check_cu((mapper)->owner, (x), #x)
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struct ext_vk {
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CUexternalMemory mem;
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CUmipmappedArray mma;
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2022-01-11 12:37:31 +00:00
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pl_tex pltex;
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2023-03-21 17:36:49 +00:00
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pl_vulkan_sem vk_sem;
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union pl_handle sem_handle;
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CUexternalSemaphore cuda_sem;
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2019-02-02 23:24:27 +00:00
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};
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static bool cuda_ext_vk_init(struct ra_hwdec_mapper *mapper,
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const struct ra_format *format, int n)
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{
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struct cuda_hw_priv *p_owner = mapper->owner->priv;
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struct cuda_mapper_priv *p = mapper->priv;
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CudaFunctions *cu = p_owner->cu;
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2023-03-21 17:36:49 +00:00
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int mem_fd = -1;
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2019-02-02 23:24:27 +00:00
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int ret = 0;
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struct ext_vk *evk = talloc_ptrtype(NULL, evk);
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p->ext[n] = evk;
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2022-01-11 12:37:31 +00:00
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pl_gpu gpu = ra_pl_get(mapper->ra);
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2019-02-02 23:24:27 +00:00
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struct pl_tex_params tex_params = {
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.w = mp_image_plane_w(&p->layout, n),
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.h = mp_image_plane_h(&p->layout, n),
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.d = 0,
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.format = ra_pl_fmt_get(format),
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.sampleable = true,
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2023-01-16 21:28:24 +00:00
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.export_handle = HANDLE_TYPE,
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2019-02-02 23:24:27 +00:00
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};
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evk->pltex = pl_tex_create(gpu, &tex_params);
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if (!evk->pltex) {
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goto error;
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}
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struct ra_tex *ratex = talloc_ptrtype(NULL, ratex);
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ret = mppl_wrap_tex(mapper->ra, evk->pltex, ratex);
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if (!ret) {
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pl_tex_destroy(gpu, &evk->pltex);
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talloc_free(ratex);
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goto error;
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}
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mapper->tex[n] = ratex;
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#if !HAVE_WIN32_DESKTOP
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2023-01-16 21:28:24 +00:00
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mem_fd = dup(evk->pltex->shared_mem.handle.fd);
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if (mem_fd < 0)
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goto error;
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2019-02-02 23:24:27 +00:00
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#endif
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CUDA_EXTERNAL_MEMORY_HANDLE_DESC ext_desc = {
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#if HAVE_WIN32_DESKTOP
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2023-01-16 21:28:24 +00:00
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.type = CU_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_WIN32,
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2019-02-02 23:24:27 +00:00
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.handle.win32.handle = evk->pltex->shared_mem.handle.handle,
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#else
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.type = CU_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD,
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.handle.fd = mem_fd,
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#endif
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.size = evk->pltex->shared_mem.size,
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.flags = 0,
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};
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ret = CHECK_CU(cu->cuImportExternalMemory(&evk->mem, &ext_desc));
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if (ret < 0)
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goto error;
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// CUDA takes ownership of imported memory
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mem_fd = -1;
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CUarray_format cufmt;
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switch (format->pixel_size / format->num_components) {
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case 1:
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cufmt = CU_AD_FORMAT_UNSIGNED_INT8;
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break;
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case 2:
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cufmt = CU_AD_FORMAT_UNSIGNED_INT16;
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break;
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default:
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ret = -1;
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goto error;
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}
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CUDA_EXTERNAL_MEMORY_MIPMAPPED_ARRAY_DESC tex_desc = {
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.offset = evk->pltex->shared_mem.offset,
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.arrayDesc = {
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.Width = mp_image_plane_w(&p->layout, n),
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.Height = mp_image_plane_h(&p->layout, n),
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.Depth = 0,
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.Format = cufmt,
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.NumChannels = format->num_components,
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.Flags = 0,
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},
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.numLevels = 1,
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};
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ret = CHECK_CU(cu->cuExternalMemoryGetMappedMipmappedArray(&evk->mma, evk->mem, &tex_desc));
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if (ret < 0)
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goto error;
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ret = CHECK_CU(cu->cuMipmappedArrayGetLevel(&p->cu_array[n], evk->mma, 0));
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if (ret < 0)
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goto error;
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2023-03-21 17:36:49 +00:00
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evk->vk_sem.sem = pl_vulkan_sem_create(gpu, pl_vulkan_sem_params(
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.type = VK_SEMAPHORE_TYPE_TIMELINE,
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.export_handle = HANDLE_TYPE,
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.out_handle = &(evk->sem_handle),
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));
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if (evk->vk_sem.sem == VK_NULL_HANDLE) {
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ret = -1;
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goto error;
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}
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// The returned FD or Handle is owned by the caller (us).
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CUDA_EXTERNAL_SEMAPHORE_HANDLE_DESC w_desc = {
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#if HAVE_WIN32_DESKTOP
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.type = CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_TIMELINE_SEMAPHORE_WIN32,
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.handle.win32.handle = evk->sem_handle.handle,
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#else
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.type = CU_EXTERNAL_SEMAPHORE_HANDLE_TYPE_TIMELINE_SEMAPHORE_FD,
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.handle.fd = evk->sem_handle.fd,
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#endif
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};
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ret = CHECK_CU(cu->cuImportExternalSemaphore(&evk->cuda_sem, &w_desc));
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if (ret < 0)
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goto error;
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// CUDA takes ownership of an imported FD *but not* an imported Handle.
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2023-06-04 16:56:01 +00:00
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evk->sem_handle.fd = -1;
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2019-02-02 23:24:27 +00:00
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return true;
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error:
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MP_ERR(mapper, "cuda_ext_vk_init failed\n");
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if (mem_fd > -1)
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close(mem_fd);
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2023-03-21 17:36:49 +00:00
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#if HAVE_WIN32_DESKTOP
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if (evk->sem_handle.handle != NULL)
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CloseHandle(evk->sem_handle.handle);
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#else
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if (evk->sem_handle.fd > -1)
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close(evk->sem_handle.fd);
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#endif
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2019-02-02 23:24:27 +00:00
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return false;
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}
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static void cuda_ext_vk_uninit(const struct ra_hwdec_mapper *mapper, int n)
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{
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struct cuda_hw_priv *p_owner = mapper->owner->priv;
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struct cuda_mapper_priv *p = mapper->priv;
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CudaFunctions *cu = p_owner->cu;
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struct ext_vk *evk = p->ext[n];
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if (evk) {
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if (evk->mma) {
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CHECK_CU(cu->cuMipmappedArrayDestroy(evk->mma));
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evk->mma = 0;
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}
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if (evk->mem) {
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CHECK_CU(cu->cuDestroyExternalMemory(evk->mem));
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evk->mem = 0;
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}
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2023-03-21 17:36:49 +00:00
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if (evk->cuda_sem) {
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CHECK_CU(cu->cuDestroyExternalSemaphore(evk->cuda_sem));
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evk->cuda_sem = 0;
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}
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pl_vulkan_sem_destroy(ra_pl_get(mapper->ra), &evk->vk_sem.sem);
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#if HAVE_WIN32_DESKTOP
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CloseHandle(evk->sem_handle.handle);
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#endif
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2019-02-02 23:24:27 +00:00
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}
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talloc_free(evk);
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}
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static bool cuda_ext_vk_wait(const struct ra_hwdec_mapper *mapper, int n)
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{
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struct cuda_hw_priv *p_owner = mapper->owner->priv;
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struct cuda_mapper_priv *p = mapper->priv;
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CudaFunctions *cu = p_owner->cu;
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int ret;
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struct ext_vk *evk = p->ext[n];
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2023-03-21 17:36:49 +00:00
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evk->vk_sem.value += 1;
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ret = pl_vulkan_hold_ex(ra_pl_get(mapper->ra), pl_vulkan_hold_params(
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.tex = evk->pltex,
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.layout = VK_IMAGE_LAYOUT_GENERAL,
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.qf = VK_QUEUE_FAMILY_EXTERNAL,
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.semaphore = evk->vk_sem,
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));
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if (!ret)
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return false;
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CUDA_EXTERNAL_SEMAPHORE_WAIT_PARAMS wp = {
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.params = {
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.fence = {
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.value = evk->vk_sem.value
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}
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}
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};
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ret = CHECK_CU(cu->cuWaitExternalSemaphoresAsync(&evk->cuda_sem,
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&wp, 1, 0));
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2019-02-02 23:24:27 +00:00
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return ret == 0;
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}
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static bool cuda_ext_vk_signal(const struct ra_hwdec_mapper *mapper, int n)
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{
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struct cuda_hw_priv *p_owner = mapper->owner->priv;
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struct cuda_mapper_priv *p = mapper->priv;
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CudaFunctions *cu = p_owner->cu;
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int ret;
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struct ext_vk *evk = p->ext[n];
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2023-03-21 17:36:49 +00:00
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evk->vk_sem.value += 1;
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CUDA_EXTERNAL_SEMAPHORE_SIGNAL_PARAMS sp = {
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.params = {
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.fence = {
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.value = evk->vk_sem.value
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}
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}
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};
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ret = CHECK_CU(cu->cuSignalExternalSemaphoresAsync(&evk->cuda_sem,
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&sp, 1, 0));
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if (ret != 0)
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return false;
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pl_vulkan_release_ex(ra_pl_get(mapper->ra), pl_vulkan_release_params(
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.tex = evk->pltex,
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.layout = VK_IMAGE_LAYOUT_GENERAL,
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.qf = VK_QUEUE_FAMILY_EXTERNAL,
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.semaphore = evk->vk_sem,
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));
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2019-02-02 23:24:27 +00:00
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return ret == 0;
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}
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#undef CHECK_CU
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#define CHECK_CU(x) check_cu(hw, (x), #x)
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bool cuda_vk_init(const struct ra_hwdec *hw) {
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int ret = 0;
|
2019-11-17 01:42:51 +00:00
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int level = hw->probing ? MSGL_V : MSGL_ERR;
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2019-02-02 23:24:27 +00:00
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struct cuda_hw_priv *p = hw->priv;
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CudaFunctions *cu = p->cu;
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2022-03-12 18:54:23 +00:00
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pl_gpu gpu = ra_pl_get(hw->ra_ctx->ra);
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2019-02-02 23:24:27 +00:00
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if (gpu != NULL) {
|
2023-01-16 21:28:24 +00:00
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if (!(gpu->export_caps.tex & HANDLE_TYPE)) {
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2019-02-02 23:24:27 +00:00
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MP_VERBOSE(hw, "CUDA hwdec with Vulkan requires exportable texture memory of type 0x%X.\n",
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2023-01-16 21:28:24 +00:00
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HANDLE_TYPE);
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2019-02-02 23:24:27 +00:00
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return false;
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2023-01-16 21:28:24 +00:00
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} else if (!(gpu->export_caps.sync & HANDLE_TYPE)) {
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2019-02-02 23:24:27 +00:00
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MP_VERBOSE(hw, "CUDA hwdec with Vulkan requires exportable semaphores of type 0x%X.\n",
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2023-01-16 21:28:24 +00:00
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HANDLE_TYPE);
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2019-02-02 23:24:27 +00:00
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return false;
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}
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} else {
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2019-09-16 00:49:13 +00:00
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// This is not a Vulkan RA.
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return false;
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2019-02-02 23:24:27 +00:00
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}
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if (!cu->cuImportExternalMemory) {
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2019-11-17 01:42:51 +00:00
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MP_MSG(hw, level, "CUDA hwdec with Vulkan requires driver version 410.48 or newer.\n");
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2019-02-02 23:24:27 +00:00
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return false;
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}
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int device_count;
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ret = CHECK_CU(cu->cuDeviceGetCount(&device_count));
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if (ret < 0)
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return false;
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CUdevice display_dev = -1;
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for (int i = 0; i < device_count; i++) {
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CUdevice dev;
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ret = CHECK_CU(cu->cuDeviceGet(&dev, i));
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if (ret < 0)
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continue;
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CUuuid uuid;
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ret = CHECK_CU(cu->cuDeviceGetUuid(&uuid, dev));
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if (ret < 0)
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continue;
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if (memcmp(gpu->uuid, uuid.bytes, sizeof (gpu->uuid)) == 0) {
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display_dev = dev;
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break;
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}
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}
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if (display_dev == -1) {
|
2019-11-17 01:42:51 +00:00
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MP_MSG(hw, level, "Could not match Vulkan display device in CUDA.\n");
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2019-02-02 23:24:27 +00:00
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return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = CHECK_CU(cu->cuCtxCreate(&p->display_ctx, CU_CTX_SCHED_BLOCKING_SYNC,
|
|
|
|
display_dev));
|
|
|
|
if (ret < 0)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
p->decode_ctx = p->display_ctx;
|
|
|
|
|
|
|
|
p->ext_init = cuda_ext_vk_init;
|
|
|
|
p->ext_uninit = cuda_ext_vk_uninit;
|
|
|
|
p->ext_wait = cuda_ext_vk_wait;
|
|
|
|
p->ext_signal = cuda_ext_vk_signal;
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|