Commit Graph

120 Commits

Author SHA1 Message Date
Gustavo Sousa fa86949f17 i915: Add BMG DMC v2.06
Release info:
    Version: 2.06
    Date   : 07/18/2023
    Notes: 

    1. Pipe scanline counter hang issue fix

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2024-05-09 20:11:39 +00:00
Dnyaneshwar Bhadane e7e1d623e9 i915: Update Xe2LPD DMC to v2.20
Release info:

	Xe2LPD FW 2.20

	Date : 02/16/2024
	Notes:

	1. Bug fix from previous products and check for new register

Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
2024-04-24 22:49:45 +00:00
Daniele Ceraolo Spurio 6213a9f31e i915: Add DG2 HuC 7.10.15
Latest HuC version for DG2, including several optimizations and bug
fixes.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
2024-04-05 16:15:15 +00:00
Gustavo Sousa 94d9a511a6 i915: Add Xe2LPD DMC v2.18
Release info:
    Xe2LPD FW 2.18

    Date : 02/05/2024
    Notes:
 
    1. Bug Fix introduced for an arbitration issue
                                           

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2024-02-22 16:54:31 -03:00
Gustavo Sousa 98502ba83a i915: Update MTL DMC v2.21
Release info for v2.21:
    MTL FW 2.21

    Date : 02/20/2024
    Notes:
 
    1. Flow Update for Clock Frequency Change during DC-State Entry. 

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2024-02-22 10:51:16 -03:00
John Harrison 842afb27a5 i915: Add GuC v70.20.0 for ADL-P, DG1, DG2, MTL and TGL
The API version for this release is 1.9.0.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2024-02-16 22:12:22 +00:00
Gustavo Sousa 451090149c i915: Update MTL DMC to v2.19
Release info:
    Version: 2.19
    Date   : 10/20/2023
    Notes:
 
    1. Clear hold pll lock bit during abort

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2023-11-17 11:03:16 -03:00
John Harrison 44a9510c94 i915: Add GuC v70.13.1 for DG2, TGL, ADL-P and MTL
The GuC submission version for this release is 1.4.1.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2023-10-13 11:34:26 -07:00
Gustavo Sousa 18b60f44e6 i915: Update MTL DMC to v2.17
Release notes for v2.17:

  1. Added programmable wake instruction.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2023-10-02 09:52:35 -03:00
Daniele Ceraolo Spurio a5dbe400f7 i915: update MTL HuC to version 8.5.4
The new v8.5.4 binary replaces the existing v8.5.1

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
2023-09-14 08:34:08 -07:00
Gustavo Sousa 49f9e3479f i915: Update MTL DMC to v2.16
There were some releases of MTL DMC since the last update. We are
updating to v2.16 here, but see below release notes for each release.

Release notes for v2.16:

    1. Bug fix for Debuggability DCN.

Release notes for v2.15:

    1. Bug fix for HRR.

Release notes for v2.14:

    1. Fix for HRR feature.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2023-08-29 09:49:34 -03:00
Daniele Ceraolo Spurio 81caac98ed i915: add GSC 102.0.0.1655 for MTL
First GSC FW release for MTL.

Release: 102.0.0.1655
Compatibility (API) Version: 1.0
SVN: 1

The firmware file is named after the compatibility version, as that is
what the kernel driver cares about.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
2023-08-21 14:13:11 -07:00
Gustavo Sousa fd6e13ca2a i915: Update MTL DMC to v2.13
Release notes:

  1. Pipe scanline counter hang issue fix.
  2. Fix for noclaim generated during Dcstate entry.
  3. HRR and Debugabilty DCN enabled.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2023-07-26 13:59:54 -03:00
Gustavo Sousa 41e615cf34 i915: Update ADLP DMC to v2.20
Release notes:

  1. Pipe scanline counter hang issue fix.
  2. Fix for DC6v aggresive re-entry.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2023-07-26 13:51:44 -03:00
Daniele Ceraolo Spurio 6f3a37f47d i915: update DG2 GuC to v70.8.0
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
2023-07-20 10:14:57 -07:00
Daniele Ceraolo Spurio 0ee23bd11c i915: update to GuC 70.8.0 and HuC 8.5.1 for MTL
Due to changes in the HuC auth flow via GuC, both binaries need to be
updated at the same time to keep compatibility.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
2023-07-19 11:05:35 -07:00
Daniele Ceraolo Spurio 5de33fb45c i915: Add HuC v8.5.0 for MTL
Initial release of HuC firmware for MTL.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
2023-06-06 09:24:40 -07:00
John Harrison 192ee6d1a7 i915: Add GuC v70.6.6 for MTL
Initial release of GuC firmware for MTL.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2023-05-03 06:45:11 -07:00
Gustavo Sousa a18a444bfb i915: Update MTL DMC to v2.12
Release notes:

  1. Fix for DC5 with CMTG enabled.
  2. Register sequence change for underrun recovery.
  3. WA for DPST save/restore.
  4. WA for 3Dlut restore issue.
  5. WA for Audio issue.
  6. Interrupt fix for flip queue.
  7. Fix for DC6v aggresive re-entry

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2023-03-17 14:06:32 -03:00
Gustavo Sousa 4ee236dbbf i915: Update ADLP DMC to v2.19
Release notes:

  1. Interrupt fix for flip queue
  2. Fix for DC6v aggresive re-entry
  3. Fix for DPST index

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2023-03-17 14:06:22 -03:00
Josh Boyer 748e967e81
Merge branch 'dmc-mtl_2.11' of git://anongit.freedesktop.org/drm/drm-firmware
Signed-off-by: Josh Boyer <jwboyer@kernel.org>
2023-02-10 14:32:45 -05:00
Gustavo Sousa c1181ae796 i915: Add DMC v2.11 for MTL
Just as done with HuC in commit 51fff4e69b ("i915: Add versionless HuC
files for current platforms"), we are now starting to move away from
versioning filenames. Next updates for platforms already moved to the
new convention will just replace the blob files and update the WHENCE
file to reflect the new version.

Release notes:

  1.Bug fixes for few FW issues.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2023-02-07 09:13:10 -03:00
Gustavo Sousa a5046f4356 i915: Add DMC v2.18 for ADLP
Just as done with HuC in commit 51fff4e69b ("i915: Add versionless HuC
files for current platforms"), we are now starting to move away from
versioning filenames. Next updates for platforms already moved to the
new convention will just replace the blob files and update the WHENCE
file to reflect the new version.

Notes for this DMC release:

  1. Bug-fixes for latest release.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2023-02-02 12:58:28 -03:00
Josh Boyer 6de0c03ff0
Merge branch 'dg2_dmc_v2.8' of git://anongit.freedesktop.org/drm/drm-firmware
Signed-off-by: Josh Boyer <jwboyer@kernel.org>
2022-11-30 07:52:25 -05:00
Gustavo Sousa 7f6279b3dd i915: Add DMC v2.08 for DG2
Release notes:

1. Fixes for Register noclaims and few restore.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2022-11-21 16:38:26 -03:00
Madhumitha Tolakanahalli Pradeep de854c96df i915: Add DMC v2.10 for MTL
The release notes mention that this version has the following fixes:
1.DCstate residency counter
2.Traphit fix
3.LM TONEFACT fix
4.Ramp up timer fix(PFET)

Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
2022-11-16 14:26:06 -08:00
Daniele Ceraolo Spurio 8f86b5ab3e i915: Add HuC 7.10.3 for DG2
This is a GSC-loaded binary.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
2022-10-18 08:18:19 -07:00
John Harrison 51fff4e69b i915: Add versionless HuC files for current platforms
Direction from upstream is to use minimal version numbering on
firmware files and replace rather than add. So add versionless
editions of the HuC files for currently HuC enabled platforms.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2022-09-16 08:52:30 -07:00
John Harrison 067440c18f i915: Add GuC v70.5.1 for DG1, DG2, TGL and ADL-P
Direction from upstream is to use minimal version numbering on
firmware files and replace rather than add. So going forwards, GuC
files will use only the major version number and HuC files will be
completely versionless.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2022-09-16 08:52:30 -07:00
Josh Boyer 327ac4c071
Merge branch 'dg2_guc_v70.4.1' of git://anongit.freedesktop.org/drm/drm-firmware
Signed-off-by: Josh Boyer <jwboyer@kernel.org>
2022-08-04 07:37:51 -04:00
John Harrison a4235e0aa4 i915: Add GuC v70.4.1 for DG2
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2022-07-27 18:03:49 -07:00
Anusha Srivatsa 3ab394af47 i915: Add DMC v2.07 for DG2
This release has a WA to prevent hang when DC states
are enabled.

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
2022-07-27 10:52:59 -07:00
Madhumitha Tolakanahalli Pradeep b8bd6ccd9c i915: Add DMC v2.06 for DG2
This version provides a fix for DC State entry/exit.

Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
2022-05-02 22:53:23 +05:30
John Harrison 89ae5eb20f i915: Add GuC v70.1.2 for DG2
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2022-04-26 13:27:47 -07:00
John Harrison ab0d8c137d i915: Add GuC v70.1.1 for all platforms
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2022-04-07 13:14:24 -07:00
Madhumitha Tolakanahalli Pradeep 847c6de092 i915: Add DMC firmware v2.16 for ADL-P
Release Notes for DMC v2.16 mentions that it provides fixes for
cases with flip queue and DC6v enabled.

Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
2022-01-25 16:05:54 -08:00
Josh Boyer dad4ae0136
Merge branch 'guc_v69.0.3' of git://anongit.freedesktop.org/drm/drm-firmware into main
Signed-off-by: Josh Boyer <jwboyer@kernel.org>
2022-01-18 09:46:08 -05:00
John Harrison 548b304a35 i915: Add GuC v69.0.3 for all platforms
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2021-12-15 13:28:54 -08:00
Madhumitha Tolakanahalli Pradeep 2a2aa410c2 i915: Add DMC firmware v2.14 for ADL-P
Release notes for DMC v2.14:
  1. Fix for Flip queue roll over cases with DC6v
  2. Enhancemnt for residency
  3. Workaround for 3Dlut restore issue

Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
2021-12-01 16:50:30 -08:00
Anusha Srivatsa 09ab718bfa i915: Update ADLP DMC v2.12
Updateing ADLP DMC to v2.12.
Release Notes mention that this version has fix
for DC6 bort scenarios.

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
2021-09-14 14:42:47 -07:00
Anusha Srivatsa 6c9fd94d41 i915: Add v2.03 DMC for RKL
Add the latest version of DMC for RKL
This version has fixes for timeout issues.

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
2021-07-28 09:45:27 -07:00
Anusha Srivatsa 2ea630c8f2 i915: Add v2.12 DMC for TGL
Add the latest version of DMC for TGL.
This version adds FLip Queue enhancement.

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
2021-07-28 09:45:02 -07:00
John Harrison f4d897acd2 firmware/i915/guc: Add HuC v7.9.3 for TGL & DG1
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2021-06-29 14:20:03 -07:00
John Harrison 84c8655221 firmware/i915/guc: Add GuC v62.0.3 for ADL-P
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2021-06-29 14:19:57 -07:00
John Harrison 14aa9778d0 firmware/i915/guc: Add GuC v62.0.0 for all platforms
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
2021-06-29 14:19:57 -07:00
Anusha Srivatsa 3d32f216e1 i915: Add ADL-P DMC Support
Adding v2.09 and 2.10 for ADL-P

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
2021-05-03 14:34:52 -07:00
Anusha Srivatsa 348d8a9740 i915: Add DMC v2.01 for ADL-S
This is the first official release of ADLS DMC.
xy
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
2021-01-29 11:43:12 -08:00
Anusha Srivatsa f33f1f7a6b i915: Add HuC v7.7.1 for DG1
This is first release of HuC for DG1.

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
2021-01-29 11:38:08 -08:00
Anusha Srivatsa 6a422f5cb5 i915: Add GuC v49.0.1 for DG1
This is the first release of guC for DG1.

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
2021-01-29 11:37:55 -08:00
John Harrison c487f7dadc i915: Add GuC firmware v49.0.1 for all platforms
Updating all platforms to latest GuC release.

Signed-off-by: John Harrison <john.c.harrison@intel.com>
2020-11-24 17:04:17 -08:00