usbdux: usbduxsigma: fixed timing issues between ADC and DAC
When sync ADC and the DAC was running at the same time the ADC showed spikes in the signal. This happened when just before the DRDY from the ADC was triggered a DAC interrupt was dealt with. ADC and DAC share the same SPI bus and priority is now given the ADC. The DAC values are now first stored in a buffer and are only send to the DAC once the ADC has finished converting all channels (start = 0) so that the SPI bus is definitely quiet for about 100us. Signed-off-by: Bernd Porr <mail@berndporr.me.uk> Signed-off-by: Kyle McMartin <kyle@kernel.org>
This commit is contained in:
Bernd Porr
Kyle McMartin
parent
09852eab3e
commit
75cc3ef8ba
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@ -30,17 +30,20 @@
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.inc fx2-include.asm
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;;; a couple of flags
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;;; a couple of flags in high memory
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.equ CMD_FLAG,80h ; flag for the next in transfer
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.equ PWMFLAG,81h ; PWM on or off?
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.equ MAXSMPL,82H ; maximum number of samples, n channellist
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.equ MUXSG0,83H ; content of the MUXSG0 register
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.equ SMPLCTR,84h
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.equ DPTRL,85H
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.equ DPTRH,86h
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.equ ASYNC_ON,87h
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.equ INTERVAL,88h ; uframe/frame interval
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.equ INTCTR,89h ; interval counter
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.equ DABUFFER,0F0h ; buffer with DA values
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;;; in precious low memory but accessible within one clock cycle
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.equ DPTRL,70H
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.equ DPTRH,71h
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.equ ASYNC_ON,72h
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.equ SMPLCTR,73h
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;;; actual code
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.org 0000h ; after reset the processor starts here
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@ -229,31 +232,24 @@ isr0:
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push 06h ; R6
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push 07h ; R7
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mov r0,#ASYNC_ON
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mov a,@r0
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mov a,ASYNC_ON
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jz noepsubmit
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mov DPS,#0
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mov r0,#DPTRL
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mov dpl,@r0
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inc r0
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mov dph,@r0
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mov dpl,DPTRL
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mov dph,DPTRH
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lcall readADCch ; read one channel
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mov r0,#DPTRL
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mov @r0,dpl
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inc r0
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mov @r0,dph
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mov DPTRL,dpl
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mov DPTRH,dph
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mov r0,#SMPLCTR
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mov a,@r0
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mov a,SMPLCTR
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dec a
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mov @r0,a
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mov SMPLCTR,a
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jnz noepsubmit
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mov r0,#ASYNC_ON
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mov @r0,#0
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mov ASYNC_ON,#0
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clr IOA.7 ; START = 0
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@ -303,9 +299,6 @@ main:
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mov a,#00000011b ; allows skip
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lcall syncdelaywr
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mov IP,#0 ; all std 8051 int have low priority
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mov EIP,#0FFH ; all FX2 interrupts have high priority
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mov dptr,#INTSETUP ; IRQ setup register
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mov a,#08h ; enable autovector
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lcall syncdelaywr
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@ -314,6 +307,9 @@ main:
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mov a,#0
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lcall syncdelaywr
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mov IP,#01H ; int0 has highest interrupt priority
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mov EIP,#0 ; all USB interrupts have low priority
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lcall initAD ; init the ports to the converters
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lcall initeps ; init the isochronous data-transfer
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@ -341,8 +337,10 @@ initAD:
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mov r0,#MAXSMPL ; length of channellist
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mov @r0,#0 ; we don't want to accumlate samples
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mov r0,#ASYNC_ON ; async enable
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mov @r0,#0 ; we don't want to accumlate samples
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mov ASYNC_ON,#0 ; async enable
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mov r0,#DABUFFER
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mov @r0,#0
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mov OEA,#11100000b ; PortA7,A6,A5 Outputs
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mov IOA,#01100000b ; /CS = 1 and START = 0
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@ -589,8 +587,6 @@ sof_isr:
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push 06h ; R6
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push 07h ; R7
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clr IE.7 ; make sure that no other int's disturbe us
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mov r0,#INTCTR ; interval counter
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mov a,@r0 ; get the value
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dec a ; decrement
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@ -631,18 +627,14 @@ sof_adc:
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mov a,#0 ; just zero
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movx @dptr,a ; pad it up
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inc dptr ; algin along a 32 bit word
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mov r0,#DPTRL
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mov @r0,dpl
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inc r0
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mov @r0,dph
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mov DPTRL,dpl
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mov DPTRH,dph
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mov r0,#MAXSMPL
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mov a,@r0
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mov r0,#SMPLCTR
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mov @r0,a
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mov SMPLCTR,a
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mov r0,#ASYNC_ON
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mov @r0,#1 ; enable data collection
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mov ASYNC_ON,#1
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epfull:
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;; do the D/A conversion
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@ -659,6 +651,12 @@ epfull:
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lcall syncdelaywr ; wait for the rec to sync
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epempty:
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mov a,IOA ; conversion running?
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jb ACC.7,sofend
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lcall DAsend
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sofend:
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;; clear INT2
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mov a,EXIF ; FIRST clear the USB (INT2) interrupt request
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clr acc.4
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@ -669,8 +667,6 @@ epempty:
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movx @DPTR,a
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nosof:
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setb IE.7 ; re-enable global interrupts
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pop 07h
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pop 06h
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pop 05h
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@ -795,8 +791,6 @@ ep1out_isr:
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push 06h ; R6
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push 07h ; R7
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clr IE.7 ; block other interrupts
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mov dptr,#0E780h ; FIFO buffer of EP1OUT
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movx a,@dptr ; get the first byte
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mov r0,#CMD_FLAG ; pointer to the command byte
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@ -831,8 +825,7 @@ pwm_off:
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sjmp over_da
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initsgADchannel:
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mov r0,#ASYNC_ON
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mov @r0,#0 ; make sure that no async activity is on
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mov ASYNC_ON,#0
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mov dptr,#0e781h ; FIFO buffer of EP1OUT
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lcall configADC ; configures the ADC esp sel the channel
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@ -869,13 +862,11 @@ startadc2:
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inc dptr
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mov r0,#MAXSMPL
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mov @r0,a ; length of the channel list
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mov r0,#SMPLCTR
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mov @r0,a
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mov SMPLCTR,a
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lcall configADC ; configures all registers
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mov r0,#ASYNC_ON ; async enable
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mov @r0,#1 ; enable it
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mov ASYNC_ON,#1 ; async enable
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lcall reset_ep6 ; reset FIFO
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@ -958,8 +949,6 @@ over_da:
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mov a,#00001000b ; clear the ep1outirq
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movx @DPTR,a
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setb IE.7 ; re-enable interrupts
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pop 07h
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pop 06h
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pop 05h
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@ -979,19 +968,45 @@ over_da:
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;;; all channels
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;;; save all DA channels from the endpoint buffer in a local buffer
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dalo:
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movx a,@dptr ; number of bytes to send out
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inc dptr ; pointer to the first byte
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mov r1,#DABUFFER ; buffer for DA values
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mov @r1,a ; save it
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inc r1 ; inc pointer to local buffer
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mov r0,a ; counter
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nextDA:
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nextDAlo:
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movx a,@dptr ; get the byte
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inc dptr ; point to the high byte
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mov r3,a ; store in r3 for writeDA
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mov @r1,a ; save it in the buffer
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inc r1
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movx a,@dptr ; get the channel number
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inc dptr ; get ready for the next channel
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mov @r1,a ; save it
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inc r1
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djnz r0,nextDAlo ; next channel
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ret
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;;; write to the DA converter
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DAsend:
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mov r1,#DABUFFER ; buffer of the DA values
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mov a,@r1 ; get the channel count
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jz DAret ; nothing to do
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inc r1 ; pointer to the first byte
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mov r0,a ; counter
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nextDA:
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mov a,@r1 ; get the byte
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inc r1 ; point to the high byte
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mov r3,a ; store in r3 for writeDA
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mov a,@r1 ; get the channel number
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inc r1 ; get ready for the next channel
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push 1 ; is modified in the subroutine
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lcall writeDA ; write value to the DAC
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pop 1 ; get the pointer back
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djnz r0,nextDA ; next channel
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DAret:
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ret
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@ -1014,7 +1029,7 @@ writeDA3:
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rr a ; shift to the upper to the lower
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djnz r1,writeDA3
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orl a,r2 ; merge with the channel info
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clr IOA.6 ; /SYNC of the DA to 0
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clr IOA.6 ; /SYNC (/CS) of the DA to 0
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lcall sendSPI ; send it out to the SPI
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mov a,r3 ; get data again
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anl a,#00001111b ; get the lower nibble
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@ -1024,7 +1039,7 @@ writeDA4:
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djnz r1,writeDA4
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anl a,#11110000b ; make sure that's empty
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lcall sendSPI
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setb IOA.6 ; /SYNC of the DA to 1
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setb IOA.6 ; /SYNC (/CS) of the DA to 1
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noDA: ret
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