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There is some confusion here as we need to place some cpu_relax statements in some loops where it's not easily possible to condition them on the use of threads. That's what atomic.h already does. So let's take the various pl_cpu_relax() implementations from there and place them in atomic.h under the name __ha_cpu_relax() and let them adapt to the presence or absence of threads and to the architecture (currently only x86 and aarch64 use a barrier instruction), though it's very likely that arm would work well with a cache flushing ISB instruction as well). This time they were implemented as expressions returning 1 rather than statements, in order to ease their placement as the loop condition or the continuation expression inside "for" loops. We should probably do the same with barriers and a few such other ones. |
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