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http://git.haproxy.org/git/haproxy.git/
synced 2024-12-18 17:34:45 +00:00
1e237d037b
As suggested by @AGSaidi in issue #958, on ARMv8 its convenient to use an "isb" instruction in pl_cpu_relax() to improve fairness. Without it I've met a few watchdog conditions on valid locks with 16 threads, indicating that some threads couldn't manage to get it in 2 seconds. I never happened again with it. In addition, the performance increased by slightly more than 5% thanks to the reduced contention. This should be backported as far as 2.2, possibly even 2.0.
570 lines
31 KiB
C
570 lines
31 KiB
C
#ifndef PL_ATOMIC_OPS_H
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#define PL_ATOMIC_OPS_H
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/* compiler-only memory barrier, for use around locks */
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#define pl_barrier() do { \
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asm volatile("" ::: "memory"); \
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} while (0)
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#if defined(__i386__) || defined (__i486__) || defined (__i586__) || defined (__i686__) || defined (__x86_64__)
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/* full memory barrier using mfence when SSE2 is supported, falling back to
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* "lock add %esp" (gcc uses "lock add" or "lock or").
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*/
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#if defined(__SSE2__)
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#define pl_mb() do { \
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asm volatile("mfence" ::: "memory"); \
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} while (0)
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#elif defined(__x86_64__)
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#define pl_mb() do { \
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asm volatile("lock addl $0,0 (%%rsp)" ::: "memory", "cc"); \
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} while (0)
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#else /* ix86 */
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#define pl_mb() do { \
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asm volatile("lock addl $0,0 (%%esp)" ::: "memory", "cc"); \
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} while (0)
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#endif /* end of pl_mb() case for sse2/x86_64/x86 */
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/*
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* Generic functions common to the x86 family
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*/
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#define pl_cpu_relax() do { \
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asm volatile("rep;nop\n"); \
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} while (0)
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/* increment integer value pointed to by pointer <ptr>, and return non-zero if
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* result is non-null.
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*/
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#define pl_inc(ptr) ( \
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(sizeof(long) == 8 && sizeof(*(ptr)) == 8) ? ({ \
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unsigned char ret; \
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asm volatile("lock incq %0\n" \
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"setne %1\n" \
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: "+m" (*(ptr)), "=qm" (ret) \
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: \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 4) ? ({ \
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unsigned char ret; \
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asm volatile("lock incl %0\n" \
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"setne %1\n" \
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: "+m" (*(ptr)), "=qm" (ret) \
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: \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 2) ? ({ \
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unsigned char ret; \
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asm volatile("lock incw %0\n" \
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"setne %1\n" \
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: "+m" (*(ptr)), "=qm" (ret) \
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: \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 1) ? ({ \
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unsigned char ret; \
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asm volatile("lock incb %0\n" \
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"setne %1\n" \
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: "+m" (*(ptr)), "=qm" (ret) \
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: \
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: "cc"); \
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ret; /* return value */ \
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}) : ({ \
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void __unsupported_argument_size_for_pl_inc__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_inc__(__FILE__,__LINE__); \
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0; \
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}) \
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)
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/* decrement integer value pointed to by pointer <ptr>, and return non-zero if
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* result is non-null.
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*/
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#define pl_dec(ptr) ( \
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(sizeof(long) == 8 && sizeof(*(ptr)) == 8) ? ({ \
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unsigned char ret; \
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asm volatile("lock decq %0\n" \
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"setne %1\n" \
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: "+m" (*(ptr)), "=qm" (ret) \
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: \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 4) ? ({ \
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unsigned char ret; \
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asm volatile("lock decl %0\n" \
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"setne %1\n" \
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: "+m" (*(ptr)), "=qm" (ret) \
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: \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 2) ? ({ \
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unsigned char ret; \
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asm volatile("lock decw %0\n" \
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"setne %1\n" \
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: "+m" (*(ptr)), "=qm" (ret) \
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: \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 1) ? ({ \
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unsigned char ret; \
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asm volatile("lock decb %0\n" \
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"setne %1\n" \
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: "+m" (*(ptr)), "=qm" (ret) \
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: \
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: "cc"); \
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ret; /* return value */ \
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}) : ({ \
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void __unsupported_argument_size_for_pl_dec__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_dec__(__FILE__,__LINE__); \
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0; \
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}) \
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)
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/* increment integer value pointed to by pointer <ptr>, no return */
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#define pl_inc_noret(ptr) ({ \
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if (sizeof(long) == 8 && sizeof(*(ptr)) == 8) { \
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asm volatile("lock incq %0\n" \
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: "+m" (*(ptr)) \
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: \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 4) { \
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asm volatile("lock incl %0\n" \
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: "+m" (*(ptr)) \
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: \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 2) { \
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asm volatile("lock incw %0\n" \
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: "+m" (*(ptr)) \
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: \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 1) { \
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asm volatile("lock incb %0\n" \
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: "+m" (*(ptr)) \
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: \
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: "cc"); \
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} else { \
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void __unsupported_argument_size_for_pl_inc_noret__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_inc_noret__(__FILE__,__LINE__); \
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} \
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})
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/* decrement integer value pointed to by pointer <ptr>, no return */
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#define pl_dec_noret(ptr) ({ \
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if (sizeof(long) == 8 && sizeof(*(ptr)) == 8) { \
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asm volatile("lock decq %0\n" \
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: "+m" (*(ptr)) \
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: \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 4) { \
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asm volatile("lock decl %0\n" \
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: "+m" (*(ptr)) \
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: \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 2) { \
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asm volatile("lock decw %0\n" \
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: "+m" (*(ptr)) \
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: \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 1) { \
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asm volatile("lock decb %0\n" \
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: "+m" (*(ptr)) \
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: \
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: "cc"); \
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} else { \
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void __unsupported_argument_size_for_pl_dec_noret__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_dec_noret__(__FILE__,__LINE__); \
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} \
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})
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/* add integer constant <x> to integer value pointed to by pointer <ptr>,
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* no return. Size of <x> is not checked.
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*/
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#define pl_add(ptr, x) ({ \
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if (sizeof(long) == 8 && sizeof(*(ptr)) == 8) { \
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asm volatile("lock addq %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned long)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 4) { \
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asm volatile("lock addl %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned int)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 2) { \
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asm volatile("lock addw %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned short)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 1) { \
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asm volatile("lock addb %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned char)(x)) \
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: "cc"); \
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} else { \
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void __unsupported_argument_size_for_pl_add__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_add__(__FILE__,__LINE__); \
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} \
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})
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/* subtract integer constant <x> from integer value pointed to by pointer
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* <ptr>, no return. Size of <x> is not checked.
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*/
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#define pl_sub(ptr, x) ({ \
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if (sizeof(long) == 8 && sizeof(*(ptr)) == 8) { \
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asm volatile("lock subq %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned long)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 4) { \
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asm volatile("lock subl %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned int)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 2) { \
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asm volatile("lock subw %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned short)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 1) { \
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asm volatile("lock subb %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned char)(x)) \
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: "cc"); \
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} else { \
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void __unsupported_argument_size_for_pl_sub__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_sub__(__FILE__,__LINE__); \
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} \
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})
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/* binary and integer value pointed to by pointer <ptr> with constant <x>, no
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* return. Size of <x> is not checked.
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*/
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#define pl_and(ptr, x) ({ \
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if (sizeof(long) == 8 && sizeof(*(ptr)) == 8) { \
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asm volatile("lock andq %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned long)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 4) { \
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asm volatile("lock andl %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned int)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 2) { \
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asm volatile("lock andw %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned short)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 1) { \
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asm volatile("lock andb %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned char)(x)) \
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: "cc"); \
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} else { \
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void __unsupported_argument_size_for_pl_and__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_and__(__FILE__,__LINE__); \
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} \
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})
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/* binary or integer value pointed to by pointer <ptr> with constant <x>, no
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* return. Size of <x> is not checked.
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*/
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#define pl_or(ptr, x) ({ \
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if (sizeof(long) == 8 && sizeof(*(ptr)) == 8) { \
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asm volatile("lock orq %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned long)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 4) { \
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asm volatile("lock orl %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned int)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 2) { \
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asm volatile("lock orw %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned short)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 1) { \
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asm volatile("lock orb %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned char)(x)) \
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: "cc"); \
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} else { \
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void __unsupported_argument_size_for_pl_or__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_or__(__FILE__,__LINE__); \
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} \
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})
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/* binary xor integer value pointed to by pointer <ptr> with constant <x>, no
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* return. Size of <x> is not checked.
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*/
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#define pl_xor(ptr, x) ({ \
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if (sizeof(long) == 8 && sizeof(*(ptr)) == 8) { \
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asm volatile("lock xorq %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned long)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 4) { \
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asm volatile("lock xorl %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned int)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 2) { \
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asm volatile("lock xorw %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned short)(x)) \
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: "cc"); \
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} else if (sizeof(*(ptr)) == 1) { \
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asm volatile("lock xorb %1, %0\n" \
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: "+m" (*(ptr)) \
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: "er" ((unsigned char)(x)) \
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: "cc"); \
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} else { \
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void __unsupported_argument_size_for_pl_xor__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_xor__(__FILE__,__LINE__); \
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} \
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})
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/* test and set bit <bit> in integer value pointed to by pointer <ptr>. Returns
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* 0 if the bit was not set, or ~0 of the same type as *ptr if it was set. Note
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* that there is no 8-bit equivalent operation.
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*/
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#define pl_bts(ptr, bit) ( \
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(sizeof(long) == 8 && sizeof(*(ptr)) == 8) ? ({ \
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unsigned long ret; \
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asm volatile("lock btsq %2, %0\n\t" \
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"sbb %1, %1\n\t" \
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: "+m" (*(ptr)), "=r" (ret) \
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: "Ir" ((unsigned long)(bit)) \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 4) ? ({ \
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unsigned int ret; \
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asm volatile("lock btsl %2, %0\n\t" \
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"sbb %1, %1\n\t" \
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: "+m" (*(ptr)), "=r" (ret) \
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: "Ir" ((unsigned int)(bit)) \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 2) ? ({ \
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unsigned short ret; \
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asm volatile("lock btsw %2, %0\n\t" \
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"sbb %1, %1\n\t" \
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: "+m" (*(ptr)), "=r" (ret) \
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: "Ir" ((unsigned short)(bit)) \
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: "cc"); \
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ret; /* return value */ \
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}) : ({ \
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void __unsupported_argument_size_for_pl_bts__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_bts__(__FILE__,__LINE__); \
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0; \
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}) \
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)
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/* Note: for an unclear reason, gcc's __sync_fetch_and_add() implementation
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* produces less optimal than hand-crafted asm code so let's implement here the
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* operations we need for the most common archs.
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*/
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/* fetch-and-add: fetch integer value pointed to by pointer <ptr>, add <x> to
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* to <*ptr> and return the previous value.
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*/
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#define pl_xadd(ptr, x) ( \
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(sizeof(long) == 8 && sizeof(*(ptr)) == 8) ? ({ \
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unsigned long ret = (unsigned long)(x); \
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asm volatile("lock xaddq %0, %1\n" \
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: "=r" (ret), "+m" (*(ptr)) \
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: "0" (ret) \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 4) ? ({ \
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unsigned int ret = (unsigned int)(x); \
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asm volatile("lock xaddl %0, %1\n" \
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: "=r" (ret), "+m" (*(ptr)) \
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: "0" (ret) \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 2) ? ({ \
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unsigned short ret = (unsigned short)(x); \
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asm volatile("lock xaddw %0, %1\n" \
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: "=r" (ret), "+m" (*(ptr)) \
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: "0" (ret) \
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: "cc"); \
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ret; /* return value */ \
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}) : (sizeof(*(ptr)) == 1) ? ({ \
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unsigned char ret = (unsigned char)(x); \
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asm volatile("lock xaddb %0, %1\n" \
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: "=r" (ret), "+m" (*(ptr)) \
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: "0" (ret) \
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: "cc"); \
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ret; /* return value */ \
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}) : ({ \
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void __unsupported_argument_size_for_pl_xadd__(char *,int); \
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if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
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sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
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__unsupported_argument_size_for_pl_xadd__(__FILE__,__LINE__); \
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0; \
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}) \
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)
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/* exchange value <x> with integer value pointed to by pointer <ptr>, and return
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* previous <*ptr> value. <x> must be of the same size as <*ptr>.
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*/
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#define pl_xchg(ptr, x) ( \
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|
(sizeof(long) == 8 && sizeof(*(ptr)) == 8) ? ({ \
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|
unsigned long ret = (unsigned long)(x); \
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|
asm volatile("xchgq %0, %1\n" \
|
|
: "=r" (ret), "+m" (*(ptr)) \
|
|
: "0" (ret) \
|
|
: "cc"); \
|
|
ret; /* return value */ \
|
|
}) : (sizeof(*(ptr)) == 4) ? ({ \
|
|
unsigned int ret = (unsigned int)(x); \
|
|
asm volatile("xchgl %0, %1\n" \
|
|
: "=r" (ret), "+m" (*(ptr)) \
|
|
: "0" (ret) \
|
|
: "cc"); \
|
|
ret; /* return value */ \
|
|
}) : (sizeof(*(ptr)) == 2) ? ({ \
|
|
unsigned short ret = (unsigned short)(x); \
|
|
asm volatile("xchgw %0, %1\n" \
|
|
: "=r" (ret), "+m" (*(ptr)) \
|
|
: "0" (ret) \
|
|
: "cc"); \
|
|
ret; /* return value */ \
|
|
}) : (sizeof(*(ptr)) == 1) ? ({ \
|
|
unsigned char ret = (unsigned char)(x); \
|
|
asm volatile("xchgb %0, %1\n" \
|
|
: "=r" (ret), "+m" (*(ptr)) \
|
|
: "0" (ret) \
|
|
: "cc"); \
|
|
ret; /* return value */ \
|
|
}) : ({ \
|
|
void __unsupported_argument_size_for_pl_xchg__(char *,int); \
|
|
if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
|
|
sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
|
|
__unsupported_argument_size_for_pl_xchg__(__FILE__,__LINE__); \
|
|
0; \
|
|
}) \
|
|
)
|
|
|
|
/* compare integer value <*ptr> with <old> and exchange it with <new> if
|
|
* it matches, and return <old>. <old> and <new> must be of the same size as
|
|
* <*ptr>.
|
|
*/
|
|
#define pl_cmpxchg(ptr, old, new) ( \
|
|
(sizeof(long) == 8 && sizeof(*(ptr)) == 8) ? ({ \
|
|
unsigned long ret; \
|
|
asm volatile("lock cmpxchgq %2,%1" \
|
|
: "=a" (ret), "+m" (*(ptr)) \
|
|
: "r" ((unsigned long)(new)), \
|
|
"0" ((unsigned long)(old)) \
|
|
: "cc"); \
|
|
ret; /* return value */ \
|
|
}) : (sizeof(*(ptr)) == 4) ? ({ \
|
|
unsigned int ret; \
|
|
asm volatile("lock cmpxchgl %2,%1" \
|
|
: "=a" (ret), "+m" (*(ptr)) \
|
|
: "r" ((unsigned int)(new)), \
|
|
"0" ((unsigned int)(old)) \
|
|
: "cc"); \
|
|
ret; /* return value */ \
|
|
}) : (sizeof(*(ptr)) == 2) ? ({ \
|
|
unsigned short ret; \
|
|
asm volatile("lock cmpxchgw %2,%1" \
|
|
: "=a" (ret), "+m" (*(ptr)) \
|
|
: "r" ((unsigned short)(new)), \
|
|
"0" ((unsigned short)(old)) \
|
|
: "cc"); \
|
|
ret; /* return value */ \
|
|
}) : (sizeof(*(ptr)) == 1) ? ({ \
|
|
unsigned char ret; \
|
|
asm volatile("lock cmpxchgb %2,%1" \
|
|
: "=a" (ret), "+m" (*(ptr)) \
|
|
: "r" ((unsigned char)(new)), \
|
|
"0" ((unsigned char)(old)) \
|
|
: "cc"); \
|
|
ret; /* return value */ \
|
|
}) : ({ \
|
|
void __unsupported_argument_size_for_pl_cmpxchg__(char *,int); \
|
|
if (sizeof(*(ptr)) != 1 && sizeof(*(ptr)) != 2 && \
|
|
sizeof(*(ptr)) != 4 && (sizeof(long) != 8 || sizeof(*(ptr)) != 8)) \
|
|
__unsupported_argument_size_for_pl_cmpxchg__(__FILE__,__LINE__); \
|
|
0; \
|
|
}) \
|
|
)
|
|
|
|
#else
|
|
/* generic implementations */
|
|
|
|
#if defined(__aarch64__)
|
|
|
|
/* This was shown to improve fairness on modern ARMv8 such as Neoverse N1 */
|
|
#define pl_cpu_relax() do { \
|
|
asm volatile("isb" ::: "memory"); \
|
|
} while (0)
|
|
|
|
#else
|
|
|
|
#define pl_cpu_relax() do { \
|
|
asm volatile(""); \
|
|
} while (0)
|
|
|
|
#endif
|
|
|
|
/* full memory barrier */
|
|
#define pl_mb() do { \
|
|
__sync_synchronize(); \
|
|
} while (0)
|
|
|
|
#define pl_inc_noret(ptr) ({ __sync_add_and_fetch((ptr), 1); })
|
|
#define pl_dec_noret(ptr) ({ __sync_sub_and_fetch((ptr), 1); })
|
|
#define pl_inc(ptr) ({ __sync_add_and_fetch((ptr), 1); })
|
|
#define pl_dec(ptr) ({ __sync_sub_and_fetch((ptr), 1); })
|
|
#define pl_add(ptr, x) ({ __sync_add_and_fetch((ptr), (x)); })
|
|
#define pl_and(ptr, x) ({ __sync_and_and_fetch((ptr), (x)); })
|
|
#define pl_or(ptr, x) ({ __sync_or_and_fetch((ptr), (x)); })
|
|
#define pl_xor(ptr, x) ({ __sync_xor_and_fetch((ptr), (x)); })
|
|
#define pl_sub(ptr, x) ({ __sync_sub_and_fetch((ptr), (x)); })
|
|
#define pl_bts(ptr, bit) ({ typeof(*(ptr)) __pl_t = (1u << (bit)); \
|
|
__sync_fetch_and_or((ptr), __pl_t) & __pl_t; \
|
|
})
|
|
#define pl_xadd(ptr, x) ({ __sync_fetch_and_add((ptr), (x)); })
|
|
#define pl_cmpxchg(ptr, o, n) ({ __sync_val_compare_and_swap((ptr), (o), (n)); })
|
|
#define pl_xchg(ptr, x) ({ typeof(*(ptr)) __pl_t; \
|
|
do { __pl_t = *(ptr); \
|
|
} while (!__sync_bool_compare_and_swap((ptr), __pl_t, (x))); \
|
|
__pl_t; \
|
|
})
|
|
|
|
#endif
|
|
|
|
#endif /* PL_ATOMIC_OPS_H */
|