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MINOR: ring: it's not x86 but all non-ARMv8.1 which needs the read before OR
Archs relying on CAS benefit from a read prior to FETCH_OR, so it's not just x86 that benefits from this. Let's just change the condition to only exclude __ARM_FEATURE_ATOMICS which is the only one faster without.
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@ -280,10 +280,12 @@ ssize_t ring_write(struct ring *ring, size_t maxlen, const struct ist pfx[], siz
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goto wait_for_flush;
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__ha_cpu_relax_for_read();
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#if defined(__x86_64__)
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/* x86 prefers a read first */
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if ((tail_ofs = HA_ATOMIC_LOAD(tail_ptr)) & RING_TAIL_LOCK)
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#if !defined(__ARM_FEATURE_ATOMICS)
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/* ARMv8.1-a has a true atomic OR and doesn't need the preliminary read */
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if ((tail_ofs = HA_ATOMIC_LOAD(tail_ptr)) & RING_TAIL_LOCK) {
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__ha_cpu_relax_for_read();
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continue;
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}
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#endif
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/* OK the queue is locked, let's attempt to get the tail lock */
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tail_ofs = HA_ATOMIC_FETCH_OR(tail_ptr, RING_TAIL_LOCK);
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