Add support for Elbrus 2000 (e2k)

This commit is contained in:
SSE4 2021-01-27 11:15:56 +03:00 committed by Aliaksey Kandratsenka
parent c5747615da
commit 3b1c60cc4e
4 changed files with 6 additions and 1 deletions

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@ -29,6 +29,7 @@ macro(pc_from_ucontext variable)
"uc_mcontext.psw.addr" # Linux (s390)
"uc_mcontext.gregs[R15]" # Linux (arm old [untested])
"uc_mcontext.arm_pc" # Linux (arm arch 5)
"uc_mcontext.cr0_hi" # Linux (e2k)
"uc_mcontext.gp_regs[PT_NIP]" # Suse SLES 11 (ppc64)
"uc_mcontext.mc_eip" # FreeBSD (i386)
"uc_mcontext.mc_rip" # FreeBSD (x86_64 [untested])

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@ -32,6 +32,7 @@ AC_DEFUN([AC_PC_FROM_UCONTEXT],
pc_fields="$pc_fields uc_mcontext.psw.addr" # Linux (s390)
pc_fields="$pc_fields uc_mcontext.gregs[[R15]]" # Linux (arm old [untested])
pc_fields="$pc_fields uc_mcontext.arm_pc" # Linux (arm arch 5)
pc_fields="$pc_fields uc_mcontext.cr0_hi" # Linux (e2k)
pc_fields="$pc_fields uc_mcontext.gp_regs[[PT_NIP]]" # Suse SLES 11 (ppc64)
pc_fields="$pc_fields uc_mcontext.mc_eip" # FreeBSD (i386)
pc_fields="$pc_fields uc_mcontext.mc_srr0" # FreeBSD (powerpc, powerpc64)

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@ -385,6 +385,8 @@ class AssignAttributeStartEnd {
# define CACHELINE_ALIGNED __attribute__((aligned(256)))
# elif (defined(__riscv) && __riscv_xlen == 64)
# define CACHELINE_ALIGNED __attribute__((aligned(64)))
# elif (defined(__e2k__))
# define CACHELINE_ALIGNED __attribute__((aligned(64)))
# else
# error Could not determine cache line length - unknown architecture
# endif

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@ -56,7 +56,8 @@
|| defined(__PPC64__) \
|| defined(__aarch64__) \
|| (defined(_MIPS_SIM) && (_MIPS_SIM == _ABI64 || _MIPS_SIM == _ABIN32)) \
|| defined(__s390__) || (defined(__riscv) && __riscv_xlen == 64)
|| defined(__s390__) || (defined(__riscv) && __riscv_xlen == 64) \
|| defined(__e2k__)
static inline void* do_mmap64(void *start, size_t length,
int prot, int flags,