mirror of https://git.ffmpeg.org/ffmpeg.git
cb8ad005bb
IEEE-754 differentiates two different kind of NaNs. Quiet and Signaling ones. They are differentiated by the MSB of the mantissa. For whatever reason, actual hardware conversion of half to single always sets the signaling bit to 1 if the mantissa is != 0, and to 0 if it's 0. So our code has to follow suite or fate-testing hardware float16 will be impossible. |
||
|---|---|---|
| .. | ||
| acodec | ||
| fate | ||
| lavf | ||
| lavf-fate | ||
| pixfmt | ||
| seek | ||
| vsynth | ||