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4501b1dfd7
./configure --disable-lasx ffmpeg -i ~/media/1_h264_1080p_30fps_3Mbps.mp4 -f rawvideo -s 640x480 -pix_fmt bgra -y /dev/null -an before: 91fps after: 160fps Reviewed-by: Shiyou Yin <yinshiyou-hf@loongson.cn> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
286 lines
10 KiB
ArmAsm
286 lines
10 KiB
ArmAsm
/*
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* Loongson LSX optimized swscale
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*
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* Copyright (c) 2023 Loongson Technology Corporation Limited
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* Contributed by Lu Wang <wanglu@loongson.cn>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavcodec/loongarch/loongson_asm.S"
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/* void planar_rgb_to_y_lsx(uint8_t *_dst, const uint8_t *src[4],
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* int width, int32_t *rgb2yuv)
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*/
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function planar_rgb_to_y_lsx
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ld.d a5, a1, 0
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ld.d a6, a1, 8
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ld.d a7, a1, 16
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ld.w t1, a3, 0 // ry
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ld.w t2, a3, 4 // gy
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ld.w t3, a3, 8 // by
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li.w t4, 9
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li.w t5, 524544
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li.w t7, 4
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li.w t8, 8
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vldi vr7, 0
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vreplgr2vr.w vr1, t1
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vreplgr2vr.w vr2, t2
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vreplgr2vr.w vr3, t3
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vreplgr2vr.w vr4, t4
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vreplgr2vr.w vr5, t5
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bge a2, t8, .WIDTH8
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bge a2, t7, .WIDTH4
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blt zero, a2, .WIDTH
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b .END
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.WIDTH8:
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vld vr8, a5, 0
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vld vr9, a6, 0
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vld vr10, a7, 0
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vilvl.b vr11, vr7, vr8
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vilvl.b vr12, vr7, vr9
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vilvl.b vr13, vr7, vr10
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vilvl.h vr14, vr7, vr11
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vilvl.h vr15, vr7, vr12
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vilvl.h vr16, vr7, vr13
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vilvh.h vr17, vr7, vr11
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vilvh.h vr18, vr7, vr12
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vilvh.h vr19, vr7, vr13
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vmul.w vr20, vr1, vr16
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vmul.w vr21, vr1, vr19
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vmadd.w vr20, vr2, vr14
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vmadd.w vr20, vr3, vr15
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vmadd.w vr21, vr2, vr17
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vmadd.w vr21, vr3, vr18
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vadd.w vr20, vr20, vr5
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vadd.w vr21, vr21, vr5
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vsra.w vr20, vr20, vr4
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vsra.w vr21, vr21, vr4
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vpickev.h vr20, vr21, vr20
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vst vr20, a0, 0
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addi.d a2, a2, -8
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addi.d a5, a5, 8
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addi.d a6, a6, 8
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addi.d a7, a7, 8
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addi.d a0, a0, 16
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bge a2, t8, .WIDTH8
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bge a2, t7, .WIDTH4
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blt zero, a2, .WIDTH
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b .END
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.WIDTH4:
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vld vr8, a5, 0
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vld vr9, a6, 0
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vld vr10, a7, 0
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vilvl.b vr11, vr7, vr8
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vilvl.b vr12, vr7, vr9
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vilvl.b vr13, vr7, vr10
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vilvl.h vr14, vr7, vr11
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vilvl.h vr15, vr7, vr12
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vilvl.h vr16, vr7, vr13
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vmul.w vr17, vr1, vr16
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vmadd.w vr17, vr2, vr14
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vmadd.w vr17, vr3, vr15
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vadd.w vr17, vr17, vr5
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vsra.w vr17, vr17, vr4
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vpickev.h vr17, vr17, vr17
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vstelm.d vr17, a0, 0, 0
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addi.d a2, a2, -4
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addi.d a5, a5, 4
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addi.d a6, a6, 4
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addi.d a7, a7, 4
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addi.d a0, a0, 8
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bge a2, t7, .WIDTH4
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blt zero, a2, .WIDTH
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b .END
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.WIDTH:
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ld.bu t0, a5, 0
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ld.bu t4, a6, 0
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ld.bu t6, a7, 0
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mul.w t8, t6, t1
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mul.w t7, t0, t2
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add.w t8, t8, t7
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mul.w t7, t4, t3
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add.w t8, t8, t7
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add.w t8, t8, t5
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srai.w t8, t8, 9
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st.h t8, a0, 0
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addi.d a2, a2, -1
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addi.d a5, a5, 1
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addi.d a6, a6, 1
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addi.d a7, a7, 1
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addi.d a0, a0, 2
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blt zero, a2, .WIDTH
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.END:
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endfunc
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/* void planar_rgb_to_uv_lsx(uint8_t *_dstU, uint8_t *_dstV, const uint8_t *src[4],
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* int width, int32_t *rgb2yuv)
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*/
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function planar_rgb_to_uv_lsx
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addi.d sp, sp, -24
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st.d s1, sp, 0
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st.d s2, sp, 8
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st.d s3, sp, 16
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ld.d a5, a2, 0
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ld.d a6, a2, 8
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ld.d a7, a2, 16
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ld.w t1, a4, 12 // ru
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ld.w t2, a4, 16 // gu
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ld.w t3, a4, 20 // bu
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ld.w s1, a4, 24 // rv
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ld.w s2, a4, 28 // gv
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ld.w s3, a4, 32 // bv
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li.w t4, 9
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li.w t5, 4194560
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li.w t7, 4
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li.w t8, 8
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vldi vr0, 0
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vreplgr2vr.w vr1, t1
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vreplgr2vr.w vr2, t2
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vreplgr2vr.w vr3, t3
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vreplgr2vr.w vr4, s1
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vreplgr2vr.w vr5, s2
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vreplgr2vr.w vr6, s3
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vreplgr2vr.w vr7, t4
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vreplgr2vr.w vr8, t5
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bge a2, t8, .LOOP_WIDTH8
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bge a2, t7, .LOOP_WIDTH4
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blt zero, a2, .LOOP_WIDTH
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b .LOOP_END
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.LOOP_WIDTH8:
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vld vr9, a5, 0
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vld vr10, a6, 0
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vld vr11, a7, 0
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vilvl.b vr9, vr0, vr9
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vilvl.b vr10, vr0, vr10
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vilvl.b vr11, vr0, vr11
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vilvl.h vr12, vr0, vr9
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vilvl.h vr13, vr0, vr10
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vilvl.h vr14, vr0, vr11
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vilvh.h vr15, vr0, vr9
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vilvh.h vr16, vr0, vr10
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vilvh.h vr17, vr0, vr11
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vmul.w vr18, vr1, vr14
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vmul.w vr19, vr1, vr17
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vmul.w vr20, vr4, vr14
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vmul.w vr21, vr4, vr17
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vmadd.w vr18, vr2, vr12
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vmadd.w vr18, vr3, vr13
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vmadd.w vr19, vr2, vr15
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vmadd.w vr19, vr3, vr16
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vmadd.w vr20, vr5, vr12
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vmadd.w vr20, vr6, vr13
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vmadd.w vr21, vr5, vr15
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vmadd.w vr21, vr6, vr16
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vadd.w vr18, vr18, vr8
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vadd.w vr19, vr19, vr8
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vadd.w vr20, vr20, vr8
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vadd.w vr21, vr21, vr8
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vsra.w vr18, vr18, vr7
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vsra.w vr19, vr19, vr7
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vsra.w vr20, vr20, vr7
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vsra.w vr21, vr21, vr7
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vpickev.h vr18, vr19, vr18
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vpickev.h vr20, vr21, vr20
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vst vr18, a0, 0
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vst vr20, a1, 0
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addi.d a3, a3, -8
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addi.d a5, a5, 8
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addi.d a6, a6, 8
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addi.d a7, a7, 8
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addi.d a0, a0, 16
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addi.d a1, a1, 16
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bge a3, t8, .LOOP_WIDTH8
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bge a3, t7, .LOOP_WIDTH4
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blt zero, a3, .LOOP_WIDTH
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b .LOOP_END
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.LOOP_WIDTH4:
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vld vr9, a5, 0
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vld vr10, a6, 0
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vld vr11, a7, 0
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vilvl.b vr9, vr0, vr9
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vilvl.b vr10, vr0, vr10
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vilvl.b vr11, vr0, vr11
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vilvl.h vr12, vr0, vr9
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vilvl.h vr13, vr0, vr10
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vilvl.h vr14, vr0, vr11
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vmul.w vr18, vr1, vr14
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vmul.w vr19, vr4, vr14
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vmadd.w vr18, vr2, vr12
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vmadd.w vr18, vr3, vr13
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vmadd.w vr19, vr5, vr12
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vmadd.w vr19, vr6, vr13
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vadd.w vr18, vr18, vr8
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vadd.w vr19, vr19, vr8
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vsra.w vr18, vr18, vr7
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vsra.w vr19, vr19, vr7
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vpickev.h vr18, vr18, vr18
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vpickev.h vr19, vr19, vr19
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vstelm.d vr18, a0, 0, 0
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vstelm.d vr19, a1, 0, 0
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addi.d a3, a3, -4
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addi.d a5, a5, 4
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addi.d a6, a6, 4
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addi.d a7, a7, 4
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addi.d a0, a0, 8
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addi.d a1, a1, 8
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bge a3, t7, .LOOP_WIDTH4
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blt zero, a3, .LOOP_WIDTH
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b .LOOP_END
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.LOOP_WIDTH:
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ld.bu t0, a5, 0
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ld.bu t4, a6, 0
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ld.bu t6, a7, 0
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mul.w t8, t6, t1
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mul.w t7, t0, t2
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add.w t8, t8, t7
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mul.w t7, t4, t3
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add.w t8, t8, t7
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add.w t8, t8, t5
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srai.w t8, t8, 9
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st.h t8, a0, 0
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mul.w t8, t6, s1
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mul.w t7, t0, s2
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add.w t8, t8, t7
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mul.w t7, t4, s3
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add.w t8, t8, t7
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add.w t8, t8, t5
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srai.w t8, t8, 9
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st.h t8, a1, 0
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addi.d a3, a3, -1
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addi.d a5, a5, 1
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addi.d a6, a6, 1
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addi.d a7, a7, 1
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addi.d a0, a0, 2
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addi.d a1, a1, 2
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blt zero, a3, .LOOP_WIDTH
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.LOOP_END:
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ld.d s1, sp, 0
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ld.d s2, sp, 8
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ld.d s3, sp, 16
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addi.d sp, sp, 24
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endfunc
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