mirror of https://git.ffmpeg.org/ffmpeg.git
356 lines
14 KiB
NASM
356 lines
14 KiB
NASM
;******************************************************************************
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;* VP9 IDCT SIMD optimizations
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;*
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;* Copyright (C) 2013 Clément Bœsch <u pkh me>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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pw_11585x2: times 8 dw 23170
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%macro VP9_IDCT_COEFFS 2
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pw_m%1_%2: dw -%1, %2, -%1, %2, -%1, %2, -%1, %2
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pw_%2_%1: dw %2, %1, %2, %1, %2, %1, %2, %1
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%endmacro
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%macro VP9_IDCT_COEFFS_ALL 2
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pw_%1x2: times 8 dw %1*2
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pw_%2x2: times 8 dw %2*2
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VP9_IDCT_COEFFS %1, %2
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%endmacro
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VP9_IDCT_COEFFS_ALL 15137, 6270
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VP9_IDCT_COEFFS_ALL 16069, 3196
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VP9_IDCT_COEFFS_ALL 9102, 13623
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pd_8192: times 4 dd 8192
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pw_2048: times 8 dw 2048
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pw_1024: times 8 dw 1024
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SECTION .text
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; (a*x + b*y + round) >> shift
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%macro VP9_MULSUB_2W_2X 6 ; dst1, dst2, src (unchanged), round, coefs1, coefs2
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pmaddwd m%1, m%3, %5
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pmaddwd m%2, m%3, %6
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paddd m%1, %4
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paddd m%2, %4
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psrad m%1, 14
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psrad m%2, 14
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%endmacro
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%macro VP9_UNPACK_MULSUB_2W_4X 7 ; dst1, dst2, coef1, coef2, rnd, tmp1, tmp2
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punpckhwd m%6, m%2, m%1
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VP9_MULSUB_2W_2X %7, %6, %6, %5, [pw_m%3_%4], [pw_%4_%3]
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punpcklwd m%2, m%1
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VP9_MULSUB_2W_2X %1, %2, %2, %5, [pw_m%3_%4], [pw_%4_%3]
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packssdw m%1, m%7
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packssdw m%2, m%6
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%endmacro
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%macro VP9_STORE_2X 5 ; reg1, reg2, tmp1, tmp2, zero
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movh m%3, [dstq]
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movh m%4, [dstq+strideq]
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punpcklbw m%3, m%5
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punpcklbw m%4, m%5
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paddw m%3, m%1
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paddw m%4, m%2
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packuswb m%3, m%5
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packuswb m%4, m%5
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movh [dstq], m%3
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movh [dstq+strideq], m%4
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%endmacro
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;-------------------------------------------------------------------------------------------
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; void vp9_idct_idct_4x4_add_<opt>(uint8_t *dst, ptrdiff_t stride, int16_t *block, int eob);
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;-------------------------------------------------------------------------------------------
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%macro VP9_IDCT4_1D_FINALIZE 0
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SUMSUB_BA w, 3, 2, 4 ; m3=t3+t0, m2=-t3+t0
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SUMSUB_BA w, 1, 0, 4 ; m1=t2+t1, m0=-t2+t1
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SWAP 0, 3, 2 ; 3102 -> 0123
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%endmacro
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%macro VP9_IDCT4_1D 0
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SUMSUB_BA w, 2, 0, 4 ; m2=IN(0)+IN(2) m0=IN(0)-IN(2)
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pmulhrsw m2, m6 ; m2=t0
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pmulhrsw m0, m6 ; m0=t1
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VP9_UNPACK_MULSUB_2W_4X 1, 3, 15137, 6270, m7, 4, 5 ; m1=t2, m3=t3
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VP9_IDCT4_1D_FINALIZE
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%endmacro
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; 2x2 top left corner
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%macro VP9_IDCT4_2x2_1D 0
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pmulhrsw m0, m5 ; m0=t1
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mova m2, m0 ; m2=t0
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mova m3, m1
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pmulhrsw m1, m6 ; m1=t2
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pmulhrsw m3, m7 ; m3=t3
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VP9_IDCT4_1D_FINALIZE
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%endmacro
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%macro VP9_IDCT4_WRITEOUT 0
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mova m5, [pw_2048]
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pmulhrsw m0, m5 ; (x*2048 + (1<<14))>>15 <=> (x+8)>>4
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pmulhrsw m1, m5
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VP9_STORE_2X 0, 1, 6, 7, 4
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lea dstq, [dstq+2*strideq]
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pmulhrsw m2, m5
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pmulhrsw m3, m5
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VP9_STORE_2X 2, 3, 6, 7, 4
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%endmacro
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INIT_MMX ssse3
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cglobal vp9_idct_idct_4x4_add, 4,4,0, dst, stride, block, eob
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cmp eobd, 4 ; 2x2 or smaller
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jg .idctfull
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cmp eobd, 1 ; faster path for when only DC is set
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jne .idct2x2
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movd m0, [blockq]
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mova m5, [pw_11585x2]
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pmulhrsw m0, m5
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pmulhrsw m0, m5
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pshufw m0, m0, 0
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pxor m4, m4
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movh [blockq], m4
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pmulhrsw m0, [pw_2048] ; (x*2048 + (1<<14))>>15 <=> (x+8)>>4
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VP9_STORE_2X 0, 0, 6, 7, 4
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lea dstq, [dstq+2*strideq]
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VP9_STORE_2X 0, 0, 6, 7, 4
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RET
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; faster path for when only top left 2x2 block is set
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.idct2x2:
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movd m0, [blockq+0]
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movd m1, [blockq+8]
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mova m5, [pw_11585x2]
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mova m6, [pw_6270x2]
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mova m7, [pw_15137x2]
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VP9_IDCT4_2x2_1D
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TRANSPOSE4x4W 0, 1, 2, 3, 4
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VP9_IDCT4_2x2_1D
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pxor m4, m4 ; used for the block reset, and VP9_STORE_2X
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movh [blockq+ 0], m4
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movh [blockq+ 8], m4
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VP9_IDCT4_WRITEOUT
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RET
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.idctfull: ; generic full 4x4 idct/idct
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mova m0, [blockq+ 0]
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mova m1, [blockq+ 8]
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mova m2, [blockq+16]
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mova m3, [blockq+24]
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mova m6, [pw_11585x2]
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mova m7, [pd_8192] ; rounding
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VP9_IDCT4_1D
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TRANSPOSE4x4W 0, 1, 2, 3, 4
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VP9_IDCT4_1D
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pxor m4, m4 ; used for the block reset, and VP9_STORE_2X
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mova [blockq+ 0], m4
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mova [blockq+ 8], m4
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mova [blockq+16], m4
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mova [blockq+24], m4
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VP9_IDCT4_WRITEOUT
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RET
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;-------------------------------------------------------------------------------------------
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; void vp9_idct_idct_8x8_add_<opt>(uint8_t *dst, ptrdiff_t stride, int16_t *block, int eob);
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;-------------------------------------------------------------------------------------------
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%if ARCH_X86_64 ; TODO: 32-bit? (32-bit limited to 8 xmm reg, we use 13 here)
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%macro VP9_IDCT8_1D_FINALIZE 0
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SUMSUB_BA w, 3, 10, 4 ; m3=t0+t7, m10=t0-t7
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SUMSUB_BA w, 1, 2, 4 ; m1=t1+t6, m2=t1-t6
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SUMSUB_BA w, 11, 0, 4 ; m11=t2+t5, m0=t2-t5
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SUMSUB_BA w, 9, 8, 4 ; m9=t3+t4, m8=t3-t4
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SWAP 11, 10, 2
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SWAP 3, 9, 0
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%endmacro
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%macro VP9_IDCT8_1D 0
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SUMSUB_BA w, 8, 0, 4 ; m8=IN(0)+IN(4) m0=IN(0)-IN(4)
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pmulhrsw m8, m12 ; m8=t0a
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pmulhrsw m0, m12 ; m0=t1a
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VP9_UNPACK_MULSUB_2W_4X 2, 10, 15137, 6270, m7, 4, 5 ; m2=t2a, m10=t3a
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VP9_UNPACK_MULSUB_2W_4X 1, 11, 16069, 3196, m7, 4, 5 ; m1=t4a, m11=t7a
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VP9_UNPACK_MULSUB_2W_4X 9, 3, 9102, 13623, m7, 4, 5 ; m9=t5a, m3=t6a
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SUMSUB_BA w, 10, 8, 4 ; m10=t0a+t3a (t0), m8=t0a-t3a (t3)
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SUMSUB_BA w, 2, 0, 4 ; m2=t1a+t2a (t1), m0=t1a-t2a (t2)
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SUMSUB_BA w, 9, 1, 4 ; m9=t4a+t5a (t4), m1=t4a-t5a (t5a)
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SUMSUB_BA w, 3, 11, 4 ; m3=t7a+t6a (t7), m11=t7a-t6a (t6a)
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SUMSUB_BA w, 1, 11, 4 ; m1=t6a+t5a (t6), m11=t6a-t5a (t5)
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pmulhrsw m1, m12 ; m1=t6
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pmulhrsw m11, m12 ; m11=t5
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VP9_IDCT8_1D_FINALIZE
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%endmacro
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%macro VP9_IDCT8_4x4_1D 0
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pmulhrsw m0, m12 ; m0=t1a/t0a
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pmulhrsw m10, m2, [pw_15137x2] ; m10=t3a
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pmulhrsw m2, [pw_6270x2] ; m2=t2a
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pmulhrsw m11, m1, [pw_16069x2] ; m11=t7a
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pmulhrsw m1, [pw_3196x2] ; m1=t4a
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pmulhrsw m9, m3, [pw_9102x2] ; m9=-t5a
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pmulhrsw m3, [pw_13623x2] ; m3=t6a
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psubw m8, m0, m10 ; m8=t0a-t3a (t3)
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paddw m10, m0 ; m10=t0a+t3a (t0)
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SUMSUB_BA w, 2, 0, 4 ; m2=t1a+t2a (t1), m0=t1a-t2a (t2)
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SUMSUB_BA w, 9, 1, 4 ; m1=t4a+t5a (t4), m9=t4a-t5a (t5a)
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SWAP 1, 9
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SUMSUB_BA w, 3, 11, 4 ; m3=t7a+t6a (t7), m11=t7a-t6a (t6a)
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SUMSUB_BA w, 1, 11, 4 ; m1=t6a+t5a (t6), m11=t6a-t5a (t5)
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pmulhrsw m1, m12 ; m1=t6
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pmulhrsw m11, m12 ; m11=t5
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VP9_IDCT8_1D_FINALIZE
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%endmacro
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; TODO: a lot of t* copies can probably be removed and merged with
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; following SUMSUBs from VP9_IDCT8_1D_FINALIZE with AVX
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%macro VP9_IDCT8_2x2_1D 0
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pmulhrsw m0, m12 ; m0=t0
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mova m3, m1
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pmulhrsw m1, m6 ; m1=t4
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pmulhrsw m3, m7 ; m3=t7
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mova m2, m0 ; m2=t1
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mova m10, m0 ; m10=t2
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mova m8, m0 ; m8=t3
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mova m11, m3 ; t5 = t7a ...
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mova m9, m3 ; t6 = t7a ...
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psubw m11, m1 ; t5 = t7a - t4a
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paddw m9, m1 ; t6 = t7a + t4a
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pmulhrsw m11, m12 ; m11=t5
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pmulhrsw m9, m12 ; m9=t6
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SWAP 0, 10
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SWAP 9, 1
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VP9_IDCT8_1D_FINALIZE
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%endmacro
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%macro VP9_IDCT8_WRITEOUT 0
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mova m5, [pw_1024]
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pmulhrsw m0, m5 ; (x*1024 + (1<<14))>>15 <=> (x+16)>>5
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pmulhrsw m1, m5
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VP9_STORE_2X 0, 1, 6, 7, 4
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lea dstq, [dstq+2*strideq]
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pmulhrsw m2, m5
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pmulhrsw m3, m5
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VP9_STORE_2X 2, 3, 6, 7, 4
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lea dstq, [dstq+2*strideq]
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pmulhrsw m8, m5
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pmulhrsw m9, m5
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VP9_STORE_2X 8, 9, 6, 7, 4
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lea dstq, [dstq+2*strideq]
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pmulhrsw m10, m5
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pmulhrsw m11, m5
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VP9_STORE_2X 10, 11, 6, 7, 4
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%endmacro
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INIT_XMM ssse3
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cglobal vp9_idct_idct_8x8_add, 4,4,13, dst, stride, block, eob
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mova m12, [pw_11585x2] ; often used
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cmp eobd, 12 ; top left half or less
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jg .idctfull
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cmp eobd, 3 ; top left corner or less
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jg .idcthalf
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cmp eobd, 1 ; faster path for when only DC is set
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jne .idcttopleftcorner
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movd m0, [blockq]
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pmulhrsw m0, m12
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pmulhrsw m0, m12
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SPLATW m0, m0, 0
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pxor m4, m4
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movd [blockq], m4
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mova m5, [pw_1024]
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pmulhrsw m0, m5 ; (x*1024 + (1<<14))>>15 <=> (x+16)>>5
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VP9_STORE_2X 0, 0, 6, 7, 4
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lea dstq, [dstq+2*strideq]
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VP9_STORE_2X 0, 0, 6, 7, 4
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lea dstq, [dstq+2*strideq]
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VP9_STORE_2X 0, 0, 6, 7, 4
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lea dstq, [dstq+2*strideq]
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VP9_STORE_2X 0, 0, 6, 7, 4
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RET
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; faster path for when only left corner is set (3 input: DC, right to DC, below
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; to DC). Note: also working with a 2x2 block
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.idcttopleftcorner:
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movd m0, [blockq+0]
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movd m1, [blockq+16]
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mova m6, [pw_3196x2]
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mova m7, [pw_16069x2]
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VP9_IDCT8_2x2_1D
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TRANSPOSE8x8W 0, 1, 2, 3, 8, 9, 10, 11, 4
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VP9_IDCT8_2x2_1D
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pxor m4, m4 ; used for the block reset, and VP9_STORE_2X
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movd [blockq+ 0], m4
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movd [blockq+16], m4
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VP9_IDCT8_WRITEOUT
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RET
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.idcthalf:
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movh m0, [blockq + 0]
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movh m1, [blockq +16]
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movh m2, [blockq +32]
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movh m3, [blockq +48]
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VP9_IDCT8_4x4_1D
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TRANSPOSE8x8W 0, 1, 2, 3, 8, 9, 10, 11, 4
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VP9_IDCT8_4x4_1D
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pxor m4, m4
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movh [blockq+ 0], m4
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movh [blockq+16], m4
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movh [blockq+32], m4
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movh [blockq+48], m4
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VP9_IDCT8_WRITEOUT
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RET
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.idctfull: ; generic full 8x8 idct/idct
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mova m0, [blockq+ 0] ; IN(0)
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mova m1, [blockq+ 16] ; IN(1)
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mova m2, [blockq+ 32] ; IN(2)
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mova m3, [blockq+ 48] ; IN(3)
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mova m8, [blockq+ 64] ; IN(4)
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mova m9, [blockq+ 80] ; IN(5)
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mova m10, [blockq+ 96] ; IN(6)
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mova m11, [blockq+112] ; IN(7)
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mova m7, [pd_8192] ; rounding
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VP9_IDCT8_1D
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TRANSPOSE8x8W 0, 1, 2, 3, 8, 9, 10, 11, 4
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VP9_IDCT8_1D
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pxor m4, m4 ; used for the block reset, and VP9_STORE_2X
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mova [blockq+ 0], m4
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mova [blockq+ 16], m4
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mova [blockq+ 32], m4
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mova [blockq+ 48], m4
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mova [blockq+ 64], m4
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mova [blockq+ 80], m4
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mova [blockq+ 96], m4
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mova [blockq+112], m4
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VP9_IDCT8_WRITEOUT
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RET
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%endif
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