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https://git.ffmpeg.org/ffmpeg.git
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bbe95f7353
From x86inc: > On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either > a branch or a branch target. So switch to a 2-byte form of ret in that case. > We can automatically detect "follows a branch", but not a branch target. > (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.) x86inc can automatically determine whether to use REP_RET rather than REP in most of these cases, so impact is minimal. Additionally, a few REP_RETs were used unnecessary, despite the return being nowhere near a branch. The only CPUs affected were AMD K10s, made between 2007 and 2011, 16 years ago and 12 years ago, respectively. In the future, everyone involved with x86inc should consider dropping REP_RETs altogether.
291 lines
7.6 KiB
NASM
291 lines
7.6 KiB
NASM
;******************************************************************************
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;* linear least squares model
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;*
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;* Copyright (c) 2013 Loren Merritt
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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%define MAX_VARS 32
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%define MAX_VARS_ALIGN (MAX_VARS+4)
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%define COVAR_STRIDE MAX_VARS_ALIGN*8
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%define COVAR(x,y) [covarq + (x)*8 + (y)*COVAR_STRIDE]
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struc LLSModel
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.covariance: resq MAX_VARS_ALIGN*MAX_VARS_ALIGN
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.coeff: resq MAX_VARS*MAX_VARS
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.variance: resq MAX_VARS
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.indep_count: resd 1
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endstruc
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%macro ADDPD_MEM 2
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%if cpuflag(avx)
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vaddpd %2, %2, %1
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%else
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addpd %2, %1
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%endif
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mova %1, %2
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%endmacro
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INIT_XMM sse2
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%define movdqa movaps
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cglobal update_lls, 2,5,8, ctx, var, i, j, covar2
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%define covarq ctxq
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mov id, [ctxq + LLSModel.indep_count]
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lea varq, [varq + iq*8]
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neg iq
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mov covar2q, covarq
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.loopi:
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; Compute all 3 pairwise products of a 2x2 block that lies on the diagonal
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mova m1, [varq + iq*8]
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mova m3, [varq + iq*8 + 16]
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pshufd m4, m1, q1010
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pshufd m5, m1, q3232
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pshufd m6, m3, q1010
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pshufd m7, m3, q3232
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mulpd m0, m1, m4
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mulpd m1, m1, m5
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lea covarq, [covar2q + 16]
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ADDPD_MEM COVAR(-2,0), m0
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ADDPD_MEM COVAR(-2,1), m1
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lea jq, [iq + 2]
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cmp jd, -2
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jg .skip4x4
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.loop4x4:
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; Compute all 16 pairwise products of a 4x4 block
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mulpd m0, m4, m3
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mulpd m1, m5, m3
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mulpd m2, m6, m3
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mulpd m3, m3, m7
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ADDPD_MEM COVAR(0,0), m0
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ADDPD_MEM COVAR(0,1), m1
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ADDPD_MEM COVAR(0,2), m2
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ADDPD_MEM COVAR(0,3), m3
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mova m3, [varq + jq*8 + 16]
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mulpd m0, m4, m3
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mulpd m1, m5, m3
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mulpd m2, m6, m3
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mulpd m3, m3, m7
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ADDPD_MEM COVAR(2,0), m0
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ADDPD_MEM COVAR(2,1), m1
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ADDPD_MEM COVAR(2,2), m2
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ADDPD_MEM COVAR(2,3), m3
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mova m3, [varq + jq*8 + 32]
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add covarq, 32
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add jq, 4
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cmp jd, -2
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jle .loop4x4
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.skip4x4:
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test jd, jd
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jg .skip2x4
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mulpd m4, m3
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mulpd m5, m3
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mulpd m6, m3
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mulpd m7, m3
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ADDPD_MEM COVAR(0,0), m4
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ADDPD_MEM COVAR(0,1), m5
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ADDPD_MEM COVAR(0,2), m6
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ADDPD_MEM COVAR(0,3), m7
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.skip2x4:
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add iq, 4
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add covar2q, 4*COVAR_STRIDE+32
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cmp id, -2
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jle .loopi
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test id, id
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jg .ret
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mov jq, iq
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%define covarq covar2q
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.loop2x1:
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movsd m0, [varq + iq*8]
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movlhps m0, m0
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mulpd m0, [varq + jq*8]
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ADDPD_MEM COVAR(0,0), m0
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inc iq
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add covarq, COVAR_STRIDE
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test id, id
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jle .loop2x1
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.ret:
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RET
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%macro UPDATE_LLS 0
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cglobal update_lls, 3,6,8, ctx, var, count, i, j, count2
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%define covarq ctxq
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mov countd, [ctxq + LLSModel.indep_count]
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lea count2d, [countq-2]
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xor id, id
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.loopi:
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; Compute all 10 pairwise products of a 4x4 block that lies on the diagonal
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mova ymm1, [varq + iq*8]
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vbroadcastsd ymm4, [varq + iq*8]
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vbroadcastsd ymm5, [varq + iq*8 + 8]
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vbroadcastsd ymm6, [varq + iq*8 + 16]
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vbroadcastsd ymm7, [varq + iq*8 + 24]
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vextractf128 xmm3, ymm1, 1
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%if cpuflag(fma3)
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mova ymm0, COVAR(iq ,0)
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mova xmm2, COVAR(iq+2,2)
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fmaddpd ymm0, ymm1, ymm4, ymm0
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fmaddpd xmm2, xmm3, xmm6, xmm2
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fmaddpd ymm1, ymm5, ymm1, COVAR(iq ,1)
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fmaddpd xmm3, xmm7, xmm3, COVAR(iq+2,3)
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mova COVAR(iq ,0), ymm0
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mova COVAR(iq ,1), ymm1
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mova COVAR(iq+2,2), xmm2
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mova COVAR(iq+2,3), xmm3
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%else
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vmulpd ymm0, ymm1, ymm4
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vmulpd ymm1, ymm1, ymm5
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vmulpd xmm2, xmm3, xmm6
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vmulpd xmm3, xmm3, xmm7
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ADDPD_MEM COVAR(iq ,0), ymm0
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ADDPD_MEM COVAR(iq ,1), ymm1
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ADDPD_MEM COVAR(iq+2,2), xmm2
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ADDPD_MEM COVAR(iq+2,3), xmm3
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%endif ; cpuflag(fma3)
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lea jd, [iq + 4]
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cmp jd, count2d
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jg .skip4x4
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.loop4x4:
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; Compute all 16 pairwise products of a 4x4 block
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mova ymm3, [varq + jq*8]
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%if cpuflag(fma3)
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mova ymm0, COVAR(jq, 0)
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mova ymm1, COVAR(jq, 1)
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mova ymm2, COVAR(jq, 2)
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fmaddpd ymm0, ymm3, ymm4, ymm0
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fmaddpd ymm1, ymm3, ymm5, ymm1
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fmaddpd ymm2, ymm3, ymm6, ymm2
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fmaddpd ymm3, ymm7, ymm3, COVAR(jq,3)
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mova COVAR(jq, 0), ymm0
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mova COVAR(jq, 1), ymm1
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mova COVAR(jq, 2), ymm2
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mova COVAR(jq, 3), ymm3
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%else
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vmulpd ymm0, ymm3, ymm4
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vmulpd ymm1, ymm3, ymm5
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vmulpd ymm2, ymm3, ymm6
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vmulpd ymm3, ymm3, ymm7
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ADDPD_MEM COVAR(jq,0), ymm0
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ADDPD_MEM COVAR(jq,1), ymm1
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ADDPD_MEM COVAR(jq,2), ymm2
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ADDPD_MEM COVAR(jq,3), ymm3
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%endif ; cpuflag(fma3)
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add jd, 4
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cmp jd, count2d
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jle .loop4x4
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.skip4x4:
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cmp jd, countd
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jg .skip2x4
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mova xmm3, [varq + jq*8]
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%if cpuflag(fma3)
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mova xmm0, COVAR(jq, 0)
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mova xmm1, COVAR(jq, 1)
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mova xmm2, COVAR(jq, 2)
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fmaddpd xmm0, xmm3, xmm4, xmm0
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fmaddpd xmm1, xmm3, xmm5, xmm1
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fmaddpd xmm2, xmm3, xmm6, xmm2
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fmaddpd xmm3, xmm7, xmm3, COVAR(jq,3)
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mova COVAR(jq, 0), xmm0
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mova COVAR(jq, 1), xmm1
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mova COVAR(jq, 2), xmm2
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mova COVAR(jq, 3), xmm3
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%else
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vmulpd xmm0, xmm3, xmm4
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vmulpd xmm1, xmm3, xmm5
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vmulpd xmm2, xmm3, xmm6
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vmulpd xmm3, xmm3, xmm7
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ADDPD_MEM COVAR(jq,0), xmm0
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ADDPD_MEM COVAR(jq,1), xmm1
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ADDPD_MEM COVAR(jq,2), xmm2
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ADDPD_MEM COVAR(jq,3), xmm3
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%endif ; cpuflag(fma3)
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.skip2x4:
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add id, 4
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add covarq, 4*COVAR_STRIDE
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cmp id, count2d
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jle .loopi
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cmp id, countd
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jg .ret
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mov jd, id
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.loop2x1:
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vmovddup xmm0, [varq + iq*8]
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%if cpuflag(fma3)
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mova xmm1, [varq + jq*8]
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fmaddpd xmm0, xmm1, xmm0, COVAR(jq,0)
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mova COVAR(jq,0), xmm0
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%else
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vmulpd xmm0, [varq + jq*8]
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ADDPD_MEM COVAR(jq,0), xmm0
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%endif ; cpuflag(fma3)
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inc id
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add covarq, COVAR_STRIDE
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cmp id, countd
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jle .loop2x1
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.ret:
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RET
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%endmacro ; UPDATE_LLS
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%if HAVE_AVX_EXTERNAL
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INIT_YMM avx
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UPDATE_LLS
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%endif
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%if HAVE_FMA3_EXTERNAL
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INIT_YMM fma3
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UPDATE_LLS
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%endif
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INIT_XMM sse2
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cglobal evaluate_lls, 3,4,2, ctx, var, order, i
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; This function is often called on the same buffer as update_lls, but with
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; an offset. They can't both be aligned.
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; Load halves rather than movu to avoid store-forwarding stalls, since the
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; input was initialized immediately prior to this function using scalar math.
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%define coefsq ctxq
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mov id, orderd
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imul orderd, MAX_VARS
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lea coefsq, [ctxq + LLSModel.coeff + orderq*8]
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movsd m0, [varq]
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movhpd m0, [varq + 8]
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mulpd m0, [coefsq]
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lea coefsq, [coefsq + iq*8]
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lea varq, [varq + iq*8]
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neg iq
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add iq, 2
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.loop:
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movsd m1, [varq + iq*8]
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movhpd m1, [varq + iq*8 + 8]
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mulpd m1, [coefsq + iq*8]
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addpd m0, m1
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add iq, 2
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jl .loop
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jg .skip1
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movsd m1, [varq + iq*8]
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mulsd m1, [coefsq + iq*8]
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addpd m0, m1
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.skip1:
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movhlps m1, m0
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addsd m0, m1
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%if ARCH_X86_32
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movsd r0m, m0
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fld qword r0m
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%endif
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RET
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