ffmpeg/libavutil/riscv
Rémi Denis-Courmont 29b9d616c2 lavu/float_dsp: rework RISC-V V scalar product
1) Take the reductive sum out of the loop,
   leaving a regular vector addition in the loop.
2) Merge the addition and the multiplication.
3) Unroll.

Before:
scalarproduct_float_rvv_f32: 832.5

After:
scalarproduct_float_rvv_f32: 275.2
2023-07-20 22:54:34 +03:00
..
asm.S
bswap.h
cpu.c lavu: add/use flag for RISC-V Zba extension 2023-07-19 19:29:35 +03:00
cpu.h
fixed_dsp_init.c lavu: add/use flag for RISC-V Zba extension 2023-07-19 19:29:35 +03:00
fixed_dsp_rvv.S lavu/fixed_dsp: unroll RISC-V V loop 2023-07-17 18:48:42 +03:00
float_dsp_init.c lavu: add/use flag for RISC-V Zba extension 2023-07-19 19:29:35 +03:00
float_dsp_rvv.S lavu/float_dsp: rework RISC-V V scalar product 2023-07-20 22:54:34 +03:00
intmath.h
Makefile
timer.h