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fe4b9ef69f
Initially used for getauxval() but will be used to add support for other API, such as elf_aux_info(). Signed-off-by: Brad Smith <brad@comstyle.com>
135 lines
3.2 KiB
C
135 lines
3.2 KiB
C
/*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/cpu.h"
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#include "libavutil/cpu_internal.h"
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#include "config.h"
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#if defined __linux__ || defined __ANDROID__
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <sys/auxv.h>
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#include "asmdefs.h"
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#include "libavutil/avstring.h"
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#endif
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#if defined __linux__ || defined __ANDROID__
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#define HWCAP_LOONGSON_CPUCFG (1 << 14)
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static int cpucfg_available(void)
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{
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return ff_getauxval(AT_HWCAP) & HWCAP_LOONGSON_CPUCFG;
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}
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/* Most toolchains have no CPUCFG support yet */
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static uint32_t read_cpucfg(uint32_t reg)
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{
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uint32_t __res;
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__asm__ __volatile__(
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"parse_r __res,%0\n\t"
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"parse_r reg,%1\n\t"
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".insn \n\t"
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".word (0xc8080118 | (reg << 21) | (__res << 11))\n\t"
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:"=r"(__res)
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:"r"(reg)
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:
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);
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return __res;
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}
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#define LOONGSON_CFG1 0x1
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#define LOONGSON_CFG1_MMI (1 << 4)
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#define LOONGSON_CFG1_MSA1 (1 << 5)
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static int cpu_flags_cpucfg(void)
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{
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int flags = 0;
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uint32_t cfg1 = read_cpucfg(LOONGSON_CFG1);
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if (cfg1 & LOONGSON_CFG1_MMI)
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flags |= AV_CPU_FLAG_MMI;
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if (cfg1 & LOONGSON_CFG1_MSA1)
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flags |= AV_CPU_FLAG_MSA;
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return flags;
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}
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static int cpu_flags_cpuinfo(void)
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{
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FILE *f = fopen("/proc/cpuinfo", "r");
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char buf[200];
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int flags = 0;
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if (!f)
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return -1;
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while (fgets(buf, sizeof(buf), f)) {
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/* Legacy kernel may not export MMI in ASEs implemented */
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if (av_strstart(buf, "cpu model", NULL)) {
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if (strstr(buf, "Loongson-3 "))
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flags |= AV_CPU_FLAG_MMI;
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}
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if (av_strstart(buf, "ASEs implemented", NULL)) {
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if (strstr(buf, " loongson-mmi"))
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flags |= AV_CPU_FLAG_MMI;
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if (strstr(buf, " msa"))
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flags |= AV_CPU_FLAG_MSA;
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break;
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}
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}
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fclose(f);
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return flags;
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}
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#endif
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int ff_get_cpu_flags_mips(void)
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{
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#if defined __linux__ || defined __ANDROID__
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if (cpucfg_available())
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return cpu_flags_cpucfg();
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else
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return cpu_flags_cpuinfo();
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#else
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/* Assume no SIMD ASE supported */
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return 0;
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#endif
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}
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size_t ff_get_cpu_max_align_mips(void)
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{
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int flags = av_get_cpu_flags();
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if (flags & AV_CPU_FLAG_MSA)
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return 16;
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/*
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* MMI itself is 64-bit but quad word load & store
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* needs 128-bit align.
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*/
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if (flags & AV_CPU_FLAG_MMI)
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return 16;
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return 8;
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}
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