mirror of https://git.ffmpeg.org/ffmpeg.git
130 lines
4.1 KiB
ArmAsm
130 lines
4.1 KiB
ArmAsm
/*
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* Copyright (c) 2024 Rémi Denis-Courmont.
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/riscv/asm.S"
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#if __riscv_xlen >= 64
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func ff_vp7_luma_dc_wht_rvv, zve32x
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li a2, 4 * 16 * 2
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li a7, 16 * 2
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jal t0, 1f
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vsse16.v v4, (a0), a7
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vsse16.v v5, (t1), a7
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vsse16.v v6, (t2), a7
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vsse16.v v7, (t3), a7
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ret
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1:
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csrwi vxrm, 0
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li t4, 12540
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vsetivli zero, 4, e16, mf2, ta, ma
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vlseg4e16.v v0, (a1)
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li t6, 30274
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vwmul.vx v8, v1, t4
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li t5, 23170
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vwmul.vx v9, v3, t6
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addi t1, sp, -12 * 2
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vwmul.vx v10, v1, t6
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addi t2, sp, -8 * 2
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vwmul.vx v11, v3, t4
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addi t3, sp, -4 * 2
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vwadd.vv v4, v0, v2
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addi sp, sp, -16 * 2
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vwsub.vv v5, v0, v2
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vsetvli zero, zero, e32, m1, ta, ma
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vadd.vv v7, v10, v11
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vmul.vx v4, v4, t5
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vsub.vv v6, v8, v9
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vmul.vx v5, v5, t5
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vadd.vv v0, v4, v7
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vsub.vv v3, v4, v7
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vadd.vv v1, v5, v6
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vsub.vv v2, v5, v6
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vsetvli zero, zero, e16, mf2, ta, ma
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vnsra.wi v4, v0, 14
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vnsra.wi v7, v3, 14
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vnsra.wi v5, v1, 14
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vnsra.wi v6, v2, 14
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vsseg4e16.v v4, (sp)
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vle16.v v0, (sp)
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vle16.v v1, (t1)
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vle16.v v2, (t2)
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vle16.v v3, (t3)
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vwmul.vx v8, v1, t4
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vwmul.vx v9, v3, t6
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add t1, a2, a0
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vwmul.vx v10, v1, t6
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sh1add t2, a2, a0
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vwmul.vx v11, v3, t4
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sh1add a2, a2, a2 # a2 *= 3
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vwadd.vv v4, v0, v2
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add t3, a2, a0
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vwsub.vv v5, v0, v2
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vsetvli zero, zero, e32, m1, ta, ma
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vmul.vx v4, v4, t5
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sd zero, (a1)
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vadd.vv v7, v10, v11
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sd zero, 8(a1)
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vmul.vx v5, v5, t5
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sd zero, 16(a1)
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vsub.vv v6, v8, v9
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sd zero, 24(a1)
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vadd.vv v0, v4, v7
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addi sp, sp, 16 * 2
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vsub.vv v3, v4, v7
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vadd.vv v1, v5, v6
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vsub.vv v2, v5, v6
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vsetvli zero, zero, e16, mf2, ta, ma
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vnclip.wi v4, v0, 18
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vnclip.wi v5, v1, 18
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vnclip.wi v6, v2, 18
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vnclip.wi v7, v3, 18
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jr t0
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endfunc
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func ff_vp7_idct_add_rvv, zve32x
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jal t0, 1b
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csrwi vxrm, 2
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vsetvli zero, zero, e8, mf4, ta, ma
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vle8.v v12, (a0)
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vle8.v v13, (t1)
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vwaddu.wv v4, v4, v12
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vle8.v v14, (t2)
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vwaddu.wv v5, v5, v13
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vle8.v v15, (t3)
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vwaddu.wv v6, v6, v14
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vwaddu.wv v7, v7, v15
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vsetvli zero, zero, e16, mf2, ta, ma
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vmax.vx v4, v4, zero
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vmax.vx v5, v5, zero
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vmax.vx v6, v6, zero
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vmax.vx v7, v7, zero
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vsetvli zero, zero, e8, mf4, ta, ma
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vnclipu.wi v0, v4, 0
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vnclipu.wi v1, v5, 0
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vse8.v v0, (a0)
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vnclipu.wi v2, v6, 0
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vse8.v v1, (t1)
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vnclipu.wi v3, v7, 0
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vse8.v v2, (t2)
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vse8.v v3, (t3)
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ret
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endfunc
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#endif
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