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da6f34516b
this should fix checkasm on x86_64-archlinux-gcc-valgrind Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
125 lines
3.8 KiB
NASM
125 lines
3.8 KiB
NASM
;******************************************************************************
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;* x86 optimized Format Conversion Utils
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;* Copyright (c) 2008 Loren Merritt
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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;------------------------------------------------------------------------------
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; void ff_int32_to_float_fmul_scalar(float *dst, const int32_t *src, float mul,
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; int len);
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;------------------------------------------------------------------------------
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%macro INT32_TO_FLOAT_FMUL_SCALAR 1
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%if UNIX64
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cglobal int32_to_float_fmul_scalar, 3, 3, %1, dst, src, len
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%else
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cglobal int32_to_float_fmul_scalar, 4, 4, %1, dst, src, mul, len
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%endif
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%if WIN64
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SWAP 0, 2
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%elif ARCH_X86_32
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movss m0, mulm
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%endif
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SPLATD m0
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shl lend, 2
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add srcq, lenq
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add dstq, lenq
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neg lenq
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.loop:
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%if cpuflag(sse2)
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cvtdq2ps m1, [srcq+lenq ]
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cvtdq2ps m2, [srcq+lenq+16]
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%else
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cvtpi2ps m1, [srcq+lenq ]
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cvtpi2ps m3, [srcq+lenq+ 8]
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cvtpi2ps m2, [srcq+lenq+16]
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cvtpi2ps m4, [srcq+lenq+24]
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movlhps m1, m3
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movlhps m2, m4
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%endif
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mulps m1, m0
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mulps m2, m0
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mova [dstq+lenq ], m1
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mova [dstq+lenq+16], m2
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add lenq, 32
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jl .loop
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%if notcpuflag(sse2)
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;; cvtpi2ps switches to MMX even if the source is a memory location
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;; possible an error in documentation since every tested CPU disagrees with
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;; that. Use emms anyway since the vast majority of machines will use the
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;; SSE2 variant
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emms
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%endif
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RET
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%endmacro
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INIT_XMM sse
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INT32_TO_FLOAT_FMUL_SCALAR 5
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INIT_XMM sse2
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INT32_TO_FLOAT_FMUL_SCALAR 3
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;------------------------------------------------------------------------------
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; void ff_int32_to_float_fmul_array8(FmtConvertContext *c, float *dst, const int32_t *src,
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; const float *mul, int len);
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;------------------------------------------------------------------------------
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%macro INT32_TO_FLOAT_FMUL_ARRAY8 0
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cglobal int32_to_float_fmul_array8, 5, 5, 5, c, dst, src, mul, len
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shl lend, 2
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add srcq, lenq
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add dstq, lenq
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neg lenq
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.loop:
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movss m0, [mulq]
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SPLATD m0
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%if cpuflag(sse2)
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cvtdq2ps m1, [srcq+lenq ]
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cvtdq2ps m2, [srcq+lenq+16]
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%else
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cvtpi2ps m1, [srcq+lenq ]
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cvtpi2ps m3, [srcq+lenq+ 8]
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cvtpi2ps m2, [srcq+lenq+16]
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cvtpi2ps m4, [srcq+lenq+24]
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movlhps m1, m3
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movlhps m2, m4
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%endif
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mulps m1, m0
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mulps m2, m0
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mova [dstq+lenq ], m1
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mova [dstq+lenq+16], m2
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add mulq, 4
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add lenq, 32
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jl .loop
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%if notcpuflag(sse2)
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;; cvtpi2ps switches to MMX even if the source is a memory location
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;; possible an error in documentation since every tested CPU disagrees with
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;; that. Use emms anyway since the vast majority of machines will use the
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;; SSE2 variant
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emms
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%endif
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RET
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%endmacro
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INIT_XMM sse
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INT32_TO_FLOAT_FMUL_ARRAY8
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INIT_XMM sse2
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INT32_TO_FLOAT_FMUL_ARRAY8
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