mirror of https://git.ffmpeg.org/ffmpeg.git
116 lines
3.8 KiB
ArmAsm
116 lines
3.8 KiB
ArmAsm
/*
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* Copyright © 2024 Rémi Denis-Courmont.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "libavutil/riscv/asm.S"
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.macro sx rd, addr
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#if (__riscv_xlen == 32)
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sw \rd, \addr
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#elif (__riscv_xlen == 64)
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sd \rd, \addr
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#else
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sq \rd, \addr
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#endif
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.endm
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func ff_h264_add_pixels4_8_rvv, zve32x
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lpad 0
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vsetivli zero, 4, e8, mf4, ta, ma
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vlse32.v v8, (a0), a2
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vsetivli zero, 4 * 4, e8, m1, ta, ma
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vle16.v v16, (a1)
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.equ offset, 0
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.rept 256 / __riscv_xlen
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sx zero, offset(a1)
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.equ offset, offset + (__riscv_xlen / 8)
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.endr
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vncvt.x.x.w v24, v16
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vadd.vv v8, v8, v24
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vsetivli zero, 4, e8, mf4, ta, ma
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vsse32.v v8, (a0), a2
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ret
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endfunc
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func ff_h264_add_pixels4_16_rvv, zve64x
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lpad 0
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vsetivli zero, 4, e16, mf2, ta, ma
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vlse64.v v8, (a0), a2
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vsetivli zero, 4 * 4, e16, m2, ta, ma
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vle32.v v16, (a1)
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.equ offset, 0
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.rept 512 / __riscv_xlen
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sx zero, offset(a1)
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.equ offset, offset + (__riscv_xlen / 8)
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.endr
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vncvt.x.x.w v24, v16
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vadd.vv v8, v8, v24
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vsetivli zero, 4, e16, mf2, ta, ma
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vsse64.v v8, (a0), a2
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ret
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endfunc
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func ff_h264_add_pixels8_8_rvv, zve64x
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lpad 0
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li t0, 8 * 8
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vsetivli zero, 8, e8, mf2, ta, ma
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vlse64.v v8, (a0), a2
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vsetvli zero, t0, e8, m4, ta, ma
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vle16.v v16, (a1)
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.equ offset, 0
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.rept 1024 / __riscv_xlen
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sx zero, offset(a1)
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.equ offset, offset + (__riscv_xlen / 8)
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.endr
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vncvt.x.x.w v24, v16
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vadd.vv v8, v8, v24
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vsetivli zero, 8, e8, mf2, ta, ma
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vsse64.v v8, (a0), a2
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ret
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endfunc
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func ff_h264_add_pixels8_16_rvv, zve32x
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lpad 0
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li t0, 8
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vsetivli zero, 8, e16, m1, ta, ma
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1:
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vle32.v v16, (a1)
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addi t0, t0, -1
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vle16.v v8, (a0)
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.equ offset, 0
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.rept 256 / __riscv_xlen
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sx zero, offset(a1)
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.equ offset, offset + (__riscv_xlen / 8)
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.endr
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vncvt.x.x.w v24, v16
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addi a1, a1, 8 * 4
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vadd.vv v8, v8, v24
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vse16.v v8, (a0)
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add a0, a0, a2
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bnez t0, 1b
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ret
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endfunc
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