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67adb30322
And preserve the public SwsContext as separate name. The motivation here is that I want to turn SwsContext into a public struct, while keeping the internal implementation hidden. Additionally, I also want to be able to use multiple internal implementations, e.g. for GPU devices. This commit does not include any functional changes. For the most part, it is a simple rename. The only complications arise from the public facing API functions, which preserve their current type (and hence require an additional unwrapping step internally), and the checkasm test framework, which directly accesses SwsInternal. For consistency, the affected functions that need to maintain a distionction have generally been changed to refer to the SwsContext as *sws, and the SwsInternal as *c. In an upcoming commit, I will provide a backing definition for the public SwsContext, and update `sws_internal()` to dereference the internal struct instead of merely casting it. Sponsored-by: Sovereign Tech Fund Signed-off-by: Niklas Haas <git@haasn.dev>
362 lines
14 KiB
C
362 lines
14 KiB
C
/*
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* Copyright (C) 2001-2003 Michael Niedermayer <michaelni@gmx.at>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "../swscale_internal.h"
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#include "libavutil/attributes.h"
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#include "libavutil/x86/asm.h"
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#include "libavutil/x86/cpu.h"
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#include "libavutil/mem_internal.h"
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#define RET 0xC3 // near return opcode for x86
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#define PREFETCH "prefetchnta"
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#if HAVE_INLINE_ASM
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av_cold int ff_init_hscaler_mmxext(int dstW, int xInc, uint8_t *filterCode,
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int16_t *filter, int32_t *filterPos,
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int numSplits)
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{
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uint8_t *fragmentA;
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x86_reg imm8OfPShufW1A;
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x86_reg imm8OfPShufW2A;
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x86_reg fragmentLengthA;
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uint8_t *fragmentB;
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x86_reg imm8OfPShufW1B;
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x86_reg imm8OfPShufW2B;
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x86_reg fragmentLengthB;
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int fragmentPos;
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int xpos, i;
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// create an optimized horizontal scaling routine
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/* This scaler is made of runtime-generated MMXEXT code using specially tuned
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* pshufw instructions. For every four output pixels, if four input pixels
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* are enough for the fast bilinear scaling, then a chunk of fragmentB is
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* used. If five input pixels are needed, then a chunk of fragmentA is used.
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*/
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// code fragment
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__asm__ volatile (
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"jmp 9f \n\t"
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// Begin
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"0: \n\t"
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"movq (%%"FF_REG_d", %%"FF_REG_a"), %%mm3 \n\t"
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"movd (%%"FF_REG_c", %%"FF_REG_S"), %%mm0 \n\t"
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"movd 1(%%"FF_REG_c", %%"FF_REG_S"), %%mm1 \n\t"
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"punpcklbw %%mm7, %%mm1 \n\t"
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"punpcklbw %%mm7, %%mm0 \n\t"
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"pshufw $0xFF, %%mm1, %%mm1 \n\t"
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"1: \n\t"
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"pshufw $0xFF, %%mm0, %%mm0 \n\t"
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"2: \n\t"
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"psubw %%mm1, %%mm0 \n\t"
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"movl 8(%%"FF_REG_b", %%"FF_REG_a"), %%esi \n\t"
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"pmullw %%mm3, %%mm0 \n\t"
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"psllw $7, %%mm1 \n\t"
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"paddw %%mm1, %%mm0 \n\t"
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"movq %%mm0, (%%"FF_REG_D", %%"FF_REG_a") \n\t"
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"add $8, %%"FF_REG_a" \n\t"
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// End
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"9: \n\t"
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"lea " LOCAL_MANGLE(0b) ", %0 \n\t"
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"lea " LOCAL_MANGLE(1b) ", %1 \n\t"
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"lea " LOCAL_MANGLE(2b) ", %2 \n\t"
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"dec %1 \n\t"
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"dec %2 \n\t"
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"sub %0, %1 \n\t"
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"sub %0, %2 \n\t"
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"lea " LOCAL_MANGLE(9b) ", %3 \n\t"
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"sub %0, %3 \n\t"
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: "=r" (fragmentA), "=r" (imm8OfPShufW1A), "=r" (imm8OfPShufW2A),
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"=r" (fragmentLengthA)
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);
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__asm__ volatile (
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"jmp 9f \n\t"
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// Begin
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"0: \n\t"
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"movq (%%"FF_REG_d", %%"FF_REG_a"), %%mm3 \n\t"
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"movd (%%"FF_REG_c", %%"FF_REG_S"), %%mm0 \n\t"
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"punpcklbw %%mm7, %%mm0 \n\t"
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"pshufw $0xFF, %%mm0, %%mm1 \n\t"
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"1: \n\t"
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"pshufw $0xFF, %%mm0, %%mm0 \n\t"
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"2: \n\t"
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"psubw %%mm1, %%mm0 \n\t"
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"movl 8(%%"FF_REG_b", %%"FF_REG_a"), %%esi \n\t"
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"pmullw %%mm3, %%mm0 \n\t"
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"psllw $7, %%mm1 \n\t"
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"paddw %%mm1, %%mm0 \n\t"
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"movq %%mm0, (%%"FF_REG_D", %%"FF_REG_a") \n\t"
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"add $8, %%"FF_REG_a" \n\t"
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// End
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"9: \n\t"
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"lea " LOCAL_MANGLE(0b) ", %0 \n\t"
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"lea " LOCAL_MANGLE(1b) ", %1 \n\t"
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"lea " LOCAL_MANGLE(2b) ", %2 \n\t"
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"dec %1 \n\t"
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"dec %2 \n\t"
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"sub %0, %1 \n\t"
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"sub %0, %2 \n\t"
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"lea " LOCAL_MANGLE(9b) ", %3 \n\t"
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"sub %0, %3 \n\t"
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: "=r" (fragmentB), "=r" (imm8OfPShufW1B), "=r" (imm8OfPShufW2B),
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"=r" (fragmentLengthB)
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);
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xpos = 0; // lumXInc/2 - 0x8000; // difference between pixel centers
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fragmentPos = 0;
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for (i = 0; i < dstW / numSplits; i++) {
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int xx = xpos >> 16;
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if ((i & 3) == 0) {
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int a = 0;
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int b = ((xpos + xInc) >> 16) - xx;
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int c = ((xpos + xInc * 2) >> 16) - xx;
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int d = ((xpos + xInc * 3) >> 16) - xx;
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int inc = (d + 1 < 4);
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uint8_t *fragment = inc ? fragmentB : fragmentA;
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x86_reg imm8OfPShufW1 = inc ? imm8OfPShufW1B : imm8OfPShufW1A;
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x86_reg imm8OfPShufW2 = inc ? imm8OfPShufW2B : imm8OfPShufW2A;
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x86_reg fragmentLength = inc ? fragmentLengthB : fragmentLengthA;
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int maxShift = 3 - (d + inc);
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int shift = 0;
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if (filterCode) {
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filter[i] = ((xpos & 0xFFFF) ^ 0xFFFF) >> 9;
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filter[i + 1] = (((xpos + xInc) & 0xFFFF) ^ 0xFFFF) >> 9;
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filter[i + 2] = (((xpos + xInc * 2) & 0xFFFF) ^ 0xFFFF) >> 9;
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filter[i + 3] = (((xpos + xInc * 3) & 0xFFFF) ^ 0xFFFF) >> 9;
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filterPos[i / 2] = xx;
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memcpy(filterCode + fragmentPos, fragment, fragmentLength);
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filterCode[fragmentPos + imm8OfPShufW1] = (a + inc) |
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((b + inc) << 2) |
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((c + inc) << 4) |
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((d + inc) << 6);
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filterCode[fragmentPos + imm8OfPShufW2] = a | (b << 2) |
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(c << 4) |
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(d << 6);
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if (i + 4 - inc >= dstW)
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shift = maxShift; // avoid overread
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else if ((filterPos[i / 2] & 3) <= maxShift)
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shift = filterPos[i / 2] & 3; // align
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if (shift && i >= shift) {
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filterCode[fragmentPos + imm8OfPShufW1] += 0x55 * shift;
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filterCode[fragmentPos + imm8OfPShufW2] += 0x55 * shift;
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filterPos[i / 2] -= shift;
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}
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}
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fragmentPos += fragmentLength;
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if (filterCode)
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filterCode[fragmentPos] = RET;
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}
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xpos += xInc;
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}
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if (filterCode)
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filterPos[((i / 2) + 1) & (~1)] = xpos >> 16; // needed to jump to the next part
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return fragmentPos + 1;
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}
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void ff_hyscale_fast_mmxext(SwsInternal *c, int16_t *dst,
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int dstWidth, const uint8_t *src,
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int srcW, int xInc)
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{
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int32_t *filterPos = c->hLumFilterPos;
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int16_t *filter = c->hLumFilter;
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void *mmxextFilterCode = c->lumMmxextFilterCode;
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int i;
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#if ARCH_X86_64
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uint64_t retsave;
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#else
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#if !HAVE_EBX_AVAILABLE
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uint64_t ebxsave;
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#endif
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#endif
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__asm__ volatile(
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#if ARCH_X86_64
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"mov -8(%%rsp), %%"FF_REG_a" \n\t"
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"mov %%"FF_REG_a", %5 \n\t" // retsave
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#else
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#if !HAVE_EBX_AVAILABLE
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"mov %%"FF_REG_b", %5 \n\t" // ebxsave
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#endif
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#endif
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"pxor %%mm7, %%mm7 \n\t"
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"mov %0, %%"FF_REG_c" \n\t"
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"mov %1, %%"FF_REG_D" \n\t"
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"mov %2, %%"FF_REG_d" \n\t"
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"mov %3, %%"FF_REG_b" \n\t"
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"xor %%"FF_REG_a", %%"FF_REG_a" \n\t" // i
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PREFETCH" (%%"FF_REG_c") \n\t"
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PREFETCH" 32(%%"FF_REG_c") \n\t"
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PREFETCH" 64(%%"FF_REG_c") \n\t"
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#if ARCH_X86_64
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#define CALL_MMXEXT_FILTER_CODE \
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"movl (%%"FF_REG_b"), %%esi \n\t"\
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"call *%4 \n\t"\
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"movl (%%"FF_REG_b", %%"FF_REG_a"), %%esi \n\t"\
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"add %%"FF_REG_S", %%"FF_REG_c" \n\t"\
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"add %%"FF_REG_a", %%"FF_REG_D" \n\t"\
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"xor %%"FF_REG_a", %%"FF_REG_a" \n\t"\
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#else
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#define CALL_MMXEXT_FILTER_CODE \
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"movl (%%"FF_REG_b"), %%esi \n\t"\
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"call *%4 \n\t"\
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"addl (%%"FF_REG_b", %%"FF_REG_a"), %%"FF_REG_c" \n\t"\
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"add %%"FF_REG_a", %%"FF_REG_D" \n\t"\
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"xor %%"FF_REG_a", %%"FF_REG_a" \n\t"\
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#endif /* ARCH_X86_64 */
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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#if ARCH_X86_64
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"mov %5, %%"FF_REG_a" \n\t"
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"mov %%"FF_REG_a", -8(%%rsp) \n\t"
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#else
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#if !HAVE_EBX_AVAILABLE
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"mov %5, %%"FF_REG_b" \n\t"
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#endif
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#endif
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:: "m" (src), "m" (dst), "m" (filter), "m" (filterPos),
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"m" (mmxextFilterCode)
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#if ARCH_X86_64
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,"m"(retsave)
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#else
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#if !HAVE_EBX_AVAILABLE
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,"m" (ebxsave)
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#endif
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#endif
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: "%"FF_REG_a, "%"FF_REG_c, "%"FF_REG_d, "%"FF_REG_S, "%"FF_REG_D
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#if ARCH_X86_64 || HAVE_EBX_AVAILABLE
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,"%"FF_REG_b
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#endif
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);
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for (i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--)
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dst[i] = src[srcW-1]*128;
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}
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void ff_hcscale_fast_mmxext(SwsInternal *c, int16_t *dst1, int16_t *dst2,
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int dstWidth, const uint8_t *src1,
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const uint8_t *src2, int srcW, int xInc)
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{
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int32_t *filterPos = c->hChrFilterPos;
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int16_t *filter = c->hChrFilter;
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void *mmxextFilterCode = c->chrMmxextFilterCode;
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int i;
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#if ARCH_X86_64
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DECLARE_ALIGNED(8, uint64_t, retsave);
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#else
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#if !HAVE_EBX_AVAILABLE
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DECLARE_ALIGNED(8, uint64_t, ebxsave);
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#endif
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#endif
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__asm__ volatile(
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#if ARCH_X86_64
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"mov -8(%%rsp), %%"FF_REG_a" \n\t"
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"mov %%"FF_REG_a", %7 \n\t" // retsave
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#else
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#if !HAVE_EBX_AVAILABLE
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"mov %%"FF_REG_b", %7 \n\t" // ebxsave
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#endif
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#endif
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"pxor %%mm7, %%mm7 \n\t"
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"mov %0, %%"FF_REG_c" \n\t"
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"mov %1, %%"FF_REG_D" \n\t"
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"mov %2, %%"FF_REG_d" \n\t"
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"mov %3, %%"FF_REG_b" \n\t"
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"xor %%"FF_REG_a", %%"FF_REG_a" \n\t" // i
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PREFETCH" (%%"FF_REG_c") \n\t"
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PREFETCH" 32(%%"FF_REG_c") \n\t"
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PREFETCH" 64(%%"FF_REG_c") \n\t"
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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"xor %%"FF_REG_a", %%"FF_REG_a" \n\t" // i
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"mov %5, %%"FF_REG_c" \n\t" // src2
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"mov %6, %%"FF_REG_D" \n\t" // dst2
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PREFETCH" (%%"FF_REG_c") \n\t"
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PREFETCH" 32(%%"FF_REG_c") \n\t"
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PREFETCH" 64(%%"FF_REG_c") \n\t"
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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CALL_MMXEXT_FILTER_CODE
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#if ARCH_X86_64
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"mov %7, %%"FF_REG_a" \n\t"
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"mov %%"FF_REG_a", -8(%%rsp) \n\t"
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#else
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#if !HAVE_EBX_AVAILABLE
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"mov %7, %%"FF_REG_b" \n\t"
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#endif
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#endif
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:: "m" (src1), "m" (dst1), "m" (filter), "m" (filterPos),
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"m" (mmxextFilterCode), "m" (src2), "m"(dst2)
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#if ARCH_X86_64
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,"m"(retsave)
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#else
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#if !HAVE_EBX_AVAILABLE
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,"m" (ebxsave)
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#endif
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#endif
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: "%"FF_REG_a, "%"FF_REG_c, "%"FF_REG_d, "%"FF_REG_S, "%"FF_REG_D
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#if ARCH_X86_64 || HAVE_EBX_AVAILABLE
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,"%"FF_REG_b
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#endif
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);
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for (i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--) {
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dst1[i] = src1[srcW-1]*128;
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dst2[i] = src2[srcW-1]*128;
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}
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}
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#endif //HAVE_INLINE_ASM
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