ffmpeg/libavcodec/riscv
Rémi Denis-Courmont f883746587 lavc/flacdsp: do not assume maximum R-V VL
This loop correctly assumes that VLMAX=16 (4x128-bit vectors
with 32-bit elements) and 32 >= pred_order > 16. We need to alternate
between VL=16 and VL=t2=pred_order-16 elements to add up to pred_order.

The current code requests AVL=a2=pred_order elements. In QEMU and on
thte K230 hardware, this sets VL=16 as we need. But the specification
merely guarantees that we get: ceil(AVL / 2) <= VL <= VLMAX. For
instance, if pred_order equals 27, we could end up with VL=14 or VL=15
instead of VL=16. So instead, request literally VLMAX=16.
2024-05-25 10:31:50 +03:00
..
aacencdsp_init.c
aacencdsp_rvv.S
aacpsdsp_init.c
aacpsdsp_rvv.S lavc/riscv: explicitly require Zbb for MIN 2024-05-10 18:59:06 +03:00
ac3dsp_init.c lavc/ac3dsp: add R-V Zvbb extract_exponents 2024-05-11 11:38:49 +03:00
ac3dsp_rvb.S
ac3dsp_rvv.S
ac3dsp_rvvb.S lavc/ac3dsp: add R-V Zvbb extract_exponents 2024-05-11 11:38:49 +03:00
alacdsp_init.c
alacdsp_rvv.S
audiodsp_init.c
audiodsp_rvf.S
audiodsp_rvv.S
blockdsp_init.c lavc/riscv: use ff_rv_vlen_least() 2024-05-13 18:36:07 +03:00
blockdsp_rvv.S
bswapdsp_init.c
bswapdsp_rvb.S
bswapdsp_rvv.S
exrdsp_init.c
exrdsp_rvv.S
flacdsp_init.c lavc/flacdsp: optimise RVV vector type for lpc32 2024-05-19 18:37:33 +03:00
flacdsp_rvv.S lavc/flacdsp: do not assume maximum R-V VL 2024-05-25 10:31:50 +03:00
fmtconvert_init.c
fmtconvert_rvv.S
g722dsp_init.c lavc/riscv: use ff_rv_vlen_least() 2024-05-13 18:36:07 +03:00
g722dsp_rvv.S
h263dsp_init.c lavc/h263dsp: R-V V {h,v}_loop_filter 2024-05-22 19:15:39 +03:00
h263dsp_rvv.S lavc/h263dsp: R-V V {h,v}_loop_filter 2024-05-22 19:15:39 +03:00
h264_chroma_init_riscv.c lavc/riscv: use ff_rv_vlen_least() 2024-05-13 18:36:07 +03:00
h264_mc_chroma.S
h264dsp_init.c lavc/startcode: add R-V V startcode_find_candidate 2024-05-19 10:03:49 +03:00
huffyuvdsp_init.c lavc/huffyuvdsp: optimise RVV vtype for add_hfyu_left_pred_bgr32 2024-05-19 18:37:33 +03:00
huffyuvdsp_rvv.S lavc/huffyuvdsp: optimise RVV vtype for add_hfyu_left_pred_bgr32 2024-05-19 18:37:33 +03:00
idctdsp_init.c lavc/riscv: use ff_rv_vlen_least() 2024-05-13 18:36:07 +03:00
idctdsp_rvv.S
jpeg2000dsp_init.c
jpeg2000dsp_rvv.S
llauddsp_init.c
llauddsp_rvv.S
llviddsp_init.c
llviddsp_rvv.S
llvidencdsp_init.c
llvidencdsp_rvv.S
lpc_init.c
lpc_rvv.S
Makefile lavc/h263dsp: R-V V {h,v}_loop_filter 2024-05-22 19:15:39 +03:00
me_cmp_init.c lavc/riscv: use ff_rv_vlen_least() 2024-05-13 18:36:07 +03:00
me_cmp_rvv.S
opusdsp_init.c
opusdsp_rvv.S lavc/riscv: explicitly require Zbb for MIN 2024-05-10 18:59:06 +03:00
pixblockdsp_init.c lavc/pixblockdsp: add scalar get_pixels_unaligned 2024-05-24 17:53:43 +03:00
pixblockdsp_rvi.S
pixblockdsp_rvv.S
rv34dsp_init.c lavc/riscv: use ff_rv_vlen_least() 2024-05-13 18:36:07 +03:00
rv34dsp_rvv.S
rv40dsp_init.c lavc/riscv: use ff_rv_vlen_least() 2024-05-13 18:36:07 +03:00
rv40dsp_rvv.S
sbrdsp_init.c Revert "lavc/sbrdsp: R-V V neg_odd_64" 2024-05-21 21:26:39 +03:00
sbrdsp_rvv.S Revert "lavc/sbrdsp: R-V V neg_odd_64" 2024-05-21 21:26:39 +03:00
startcode_rvb.S lavc/startcode: add R-V Zbb startcode_find_candidate 2024-05-19 10:03:49 +03:00
startcode_rvv.S lavc/startcode: add R-V V startcode_find_candidate 2024-05-19 10:03:49 +03:00
svqenc_init.c
svqenc_rvv.S
takdsp_init.c
takdsp_rvv.S
utvideodsp_init.c
utvideodsp_rvv.S
vc1dsp_init.c lavc/vc1dsp: R-V V vc1_unescape_buffer 2024-05-21 21:16:30 +03:00
vc1dsp_rvi.S lavc/vc1dsp: R-V V mspel_pixels 2024-05-16 17:08:18 +03:00
vc1dsp_rvv.S lavc/vc1dsp: R-V V vc1_unescape_buffer 2024-05-21 21:16:30 +03:00
vorbisdsp_init.c
vorbisdsp_rvv.S
vp8dsp_init.c lavc/vp8dsp: restrict RVI optimisations 2024-05-14 19:50:00 +03:00
vp8dsp_rvi.S
vp8dsp_rvv.S lavc/vp8dsp: fix .irp use with LLVM as 2024-05-19 10:03:49 +03:00
vp8dsp.h
vp9_intra_rvi.S lavc/vp9dsp: R-V ipred vert 2024-05-15 19:52:25 +03:00
vp9_intra_rvv.S lavc/vp9_intra: fix another .irp use with LLVM as 2024-05-19 10:22:46 +03:00
vp9_mc_rvi.S lavc/vp9dsp: R-V mc copy 2024-05-15 19:52:28 +03:00
vp9_mc_rvv.S lavc/vp9dsp: R-V V mc avg 2024-05-21 21:28:14 +03:00
vp9dsp_init.c lavc/vp9dsp: R-V V mc avg 2024-05-21 21:28:14 +03:00
vp9dsp.h lavc/vp9dsp: R-V V ipred tm 2024-05-17 18:12:11 +03:00