mirror of
https://git.ffmpeg.org/ffmpeg.git
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249 lines
5.8 KiB
NASM
249 lines
5.8 KiB
NASM
;******************************************************************************
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;* MMX optimized DSP utils
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;* Copyright (c) 2008 Loren Merritt
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;*
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;* This file is part of Libav.
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;*
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;* Libav is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* Libav is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with Libav; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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pb_bswap32: db 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12
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SECTION_TEXT
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%macro SCALARPRODUCT 0
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; int ff_scalarproduct_int16(int16_t *v1, int16_t *v2, int order)
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cglobal scalarproduct_int16, 3,3,3, v1, v2, order
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shl orderq, 1
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add v1q, orderq
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add v2q, orderq
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neg orderq
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pxor m2, m2
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.loop:
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movu m0, [v1q + orderq]
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movu m1, [v1q + orderq + mmsize]
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pmaddwd m0, [v2q + orderq]
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pmaddwd m1, [v2q + orderq + mmsize]
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paddd m2, m0
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paddd m2, m1
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add orderq, mmsize*2
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jl .loop
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%if mmsize == 16
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movhlps m0, m2
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paddd m2, m0
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pshuflw m0, m2, 0x4e
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%else
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pshufw m0, m2, 0x4e
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%endif
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paddd m2, m0
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movd eax, m2
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RET
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%endmacro
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INIT_MMX mmxext
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SCALARPRODUCT
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INIT_XMM sse2
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SCALARPRODUCT
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;-----------------------------------------------------------------------------
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; void ff_vector_clip_int32(int32_t *dst, const int32_t *src, int32_t min,
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; int32_t max, unsigned int len)
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;-----------------------------------------------------------------------------
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; %1 = number of xmm registers used
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; %2 = number of inline load/process/store loops per asm loop
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; %3 = process 4*mmsize (%3=0) or 8*mmsize (%3=1) bytes per loop
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; %4 = CLIPD function takes min/max as float instead of int (CLIPD_SSE2)
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; %5 = suffix
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%macro VECTOR_CLIP_INT32 4-5
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cglobal vector_clip_int32%5, 5,5,%1, dst, src, min, max, len
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%if %4
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cvtsi2ss m4, minm
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cvtsi2ss m5, maxm
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%else
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movd m4, minm
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movd m5, maxm
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%endif
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SPLATD m4
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SPLATD m5
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.loop:
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%assign %%i 1
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%rep %2
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mova m0, [srcq+mmsize*0*%%i]
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mova m1, [srcq+mmsize*1*%%i]
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mova m2, [srcq+mmsize*2*%%i]
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mova m3, [srcq+mmsize*3*%%i]
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%if %3
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mova m7, [srcq+mmsize*4*%%i]
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mova m8, [srcq+mmsize*5*%%i]
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mova m9, [srcq+mmsize*6*%%i]
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mova m10, [srcq+mmsize*7*%%i]
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%endif
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CLIPD m0, m4, m5, m6
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CLIPD m1, m4, m5, m6
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CLIPD m2, m4, m5, m6
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CLIPD m3, m4, m5, m6
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%if %3
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CLIPD m7, m4, m5, m6
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CLIPD m8, m4, m5, m6
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CLIPD m9, m4, m5, m6
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CLIPD m10, m4, m5, m6
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%endif
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mova [dstq+mmsize*0*%%i], m0
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mova [dstq+mmsize*1*%%i], m1
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mova [dstq+mmsize*2*%%i], m2
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mova [dstq+mmsize*3*%%i], m3
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%if %3
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mova [dstq+mmsize*4*%%i], m7
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mova [dstq+mmsize*5*%%i], m8
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mova [dstq+mmsize*6*%%i], m9
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mova [dstq+mmsize*7*%%i], m10
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%endif
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%assign %%i %%i+1
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%endrep
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add srcq, mmsize*4*(%2+%3)
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add dstq, mmsize*4*(%2+%3)
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sub lend, mmsize*(%2+%3)
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jg .loop
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REP_RET
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%endmacro
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INIT_MMX mmx
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%define CLIPD CLIPD_MMX
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VECTOR_CLIP_INT32 0, 1, 0, 0
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INIT_XMM sse2
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VECTOR_CLIP_INT32 6, 1, 0, 0, _int
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%define CLIPD CLIPD_SSE2
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VECTOR_CLIP_INT32 6, 2, 0, 1
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INIT_XMM sse4
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%define CLIPD CLIPD_SSE41
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%ifdef m8
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VECTOR_CLIP_INT32 11, 1, 1, 0
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%else
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VECTOR_CLIP_INT32 6, 1, 0, 0
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%endif
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; %1 = aligned/unaligned
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%macro BSWAP_LOOPS 1
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mov r3, r2
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sar r2, 3
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jz .left4_%1
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.loop8_%1:
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mov%1 m0, [r1 + 0]
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mov%1 m1, [r1 + 16]
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%if cpuflag(ssse3)
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pshufb m0, m2
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pshufb m1, m2
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mov%1 [r0 + 0], m0
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mov%1 [r0 + 16], m1
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%else
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pshuflw m0, m0, 10110001b
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pshuflw m1, m1, 10110001b
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pshufhw m0, m0, 10110001b
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pshufhw m1, m1, 10110001b
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mova m2, m0
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mova m3, m1
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psllw m0, 8
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psllw m1, 8
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psrlw m2, 8
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psrlw m3, 8
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por m2, m0
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por m3, m1
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mov%1 [r0 + 0], m2
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mov%1 [r0 + 16], m3
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%endif
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add r0, 32
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add r1, 32
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dec r2
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jnz .loop8_%1
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.left4_%1:
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mov r2, r3
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and r3, 4
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jz .left
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mov%1 m0, [r1]
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%if cpuflag(ssse3)
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pshufb m0, m2
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mov%1 [r0], m0
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%else
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pshuflw m0, m0, 10110001b
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pshufhw m0, m0, 10110001b
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mova m2, m0
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psllw m0, 8
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psrlw m2, 8
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por m2, m0
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mov%1 [r0], m2
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%endif
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add r1, 16
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add r0, 16
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%endmacro
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; void ff_bswap_buf(uint32_t *dst, const uint32_t *src, int w);
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%macro BSWAP32_BUF 0
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%if cpuflag(ssse3)
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cglobal bswap32_buf, 3,4,3
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mov r3, r1
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mova m2, [pb_bswap32]
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%else
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cglobal bswap32_buf, 3,4,5
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mov r3, r1
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%endif
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and r3, 15
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jz .start_align
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BSWAP_LOOPS u
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jmp .left
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.start_align:
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BSWAP_LOOPS a
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.left:
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%if cpuflag(ssse3)
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mov r3, r2
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and r2, 2
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jz .left1
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movq m0, [r1]
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pshufb m0, m2
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movq [r0], m0
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add r1, 8
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add r0, 8
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.left1:
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and r3, 1
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jz .end
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mov r2d, [r1]
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bswap r2d
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mov [r0], r2d
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%else
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and r2, 3
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jz .end
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.loop2:
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mov r3d, [r1]
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bswap r3d
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mov [r0], r3d
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add r1, 4
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add r0, 4
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dec r2
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jnz .loop2
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%endif
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.end:
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RET
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%endmacro
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INIT_XMM sse2
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BSWAP32_BUF
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INIT_XMM ssse3
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BSWAP32_BUF
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