mirror of https://git.ffmpeg.org/ffmpeg.git
432 lines
10 KiB
NASM
432 lines
10 KiB
NASM
;******************************************************************************
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;* VP9 MC SIMD optimizations
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;*
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;* Copyright (c) 2015 Ronald S. Bultje <rsbultje gmail com>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA 32
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pw_4095: times 16 dw 0xfff
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pd_64: times 8 dd 64
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cextern pw_1023
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SECTION .text
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%macro filter_h4_fn 1-2 12
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cglobal vp9_%1_8tap_1d_h_4_10, 6, 6, %2, dst, dstride, src, sstride, h, filtery
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mova m5, [pw_1023]
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.body:
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%if notcpuflag(sse4) && ARCH_X86_64
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pxor m11, m11
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%endif
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mova m6, [pd_64]
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mova m7, [filteryq+ 0]
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%if ARCH_X86_64 && mmsize > 8
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mova m8, [filteryq+32]
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mova m9, [filteryq+64]
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mova m10, [filteryq+96]
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%endif
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.loop:
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movh m0, [srcq-6]
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movh m1, [srcq-4]
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movh m2, [srcq-2]
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movh m3, [srcq+0]
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movh m4, [srcq+2]
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punpcklwd m0, m1
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punpcklwd m2, m3
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pmaddwd m0, m7
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%if ARCH_X86_64 && mmsize > 8
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pmaddwd m2, m8
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%else
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pmaddwd m2, [filteryq+32]
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%endif
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movu m1, [srcq+4]
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movu m3, [srcq+6]
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paddd m0, m2
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movu m2, [srcq+8]
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add srcq, sstrideq
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punpcklwd m4, m1
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punpcklwd m3, m2
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%if ARCH_X86_64 && mmsize > 8
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pmaddwd m4, m9
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pmaddwd m3, m10
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%else
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pmaddwd m4, [filteryq+64]
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pmaddwd m3, [filteryq+96]
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%endif
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paddd m0, m4
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paddd m0, m3
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paddd m0, m6
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psrad m0, 7
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%if cpuflag(sse4)
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packusdw m0, m0
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%else
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packssdw m0, m0
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%endif
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%ifidn %1, avg
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movh m1, [dstq]
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%endif
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pminsw m0, m5
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%if notcpuflag(sse4)
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%if ARCH_X86_64
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pmaxsw m0, m11
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%else
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pxor m2, m2
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pmaxsw m0, m2
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%endif
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%endif
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%ifidn %1, avg
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pavgw m0, m1
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%endif
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movh [dstq], m0
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add dstq, dstrideq
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dec hd
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jg .loop
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RET
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cglobal vp9_%1_8tap_1d_h_4_12, 6, 6, %2, dst, dstride, src, sstride, h, filtery
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mova m5, [pw_4095]
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jmp mangle(private_prefix %+ _ %+ vp9_%1_8tap_1d_h_4_10 %+ SUFFIX).body
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%endmacro
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INIT_XMM sse2
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filter_h4_fn put
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filter_h4_fn avg
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%macro filter_h_fn 1-2 12
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%assign %%px mmsize/2
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cglobal vp9_%1_8tap_1d_h_ %+ %%px %+ _10, 6, 6, %2, dst, dstride, src, sstride, h, filtery
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mova m5, [pw_1023]
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.body:
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%if notcpuflag(sse4) && ARCH_X86_64
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pxor m11, m11
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%endif
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mova m6, [pd_64]
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mova m7, [filteryq+ 0]
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%if ARCH_X86_64 && mmsize > 8
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mova m8, [filteryq+32]
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mova m9, [filteryq+64]
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mova m10, [filteryq+96]
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%endif
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.loop:
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movu m0, [srcq-6]
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movu m1, [srcq-4]
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movu m2, [srcq-2]
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movu m3, [srcq+0]
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movu m4, [srcq+2]
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pmaddwd m0, m7
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pmaddwd m1, m7
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%if ARCH_X86_64 && mmsize > 8
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pmaddwd m2, m8
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pmaddwd m3, m8
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pmaddwd m4, m9
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%else
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pmaddwd m2, [filteryq+32]
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pmaddwd m3, [filteryq+32]
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pmaddwd m4, [filteryq+64]
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%endif
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paddd m0, m2
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paddd m1, m3
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paddd m0, m4
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movu m2, [srcq+4]
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movu m3, [srcq+6]
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movu m4, [srcq+8]
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add srcq, sstrideq
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%if ARCH_X86_64 && mmsize > 8
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pmaddwd m2, m9
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pmaddwd m3, m10
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pmaddwd m4, m10
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%else
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pmaddwd m2, [filteryq+64]
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pmaddwd m3, [filteryq+96]
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pmaddwd m4, [filteryq+96]
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%endif
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paddd m1, m2
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paddd m0, m3
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paddd m1, m4
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paddd m0, m6
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paddd m1, m6
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psrad m0, 7
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psrad m1, 7
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%if cpuflag(sse4)
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packusdw m0, m0
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packusdw m1, m1
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%else
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packssdw m0, m0
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packssdw m1, m1
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%endif
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punpcklwd m0, m1
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pminsw m0, m5
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%if notcpuflag(sse4)
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%if ARCH_X86_64
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pmaxsw m0, m11
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%else
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pxor m2, m2
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pmaxsw m0, m2
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%endif
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%endif
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%ifidn %1, avg
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pavgw m0, [dstq]
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%endif
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mova [dstq], m0
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add dstq, dstrideq
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dec hd
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jg .loop
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RET
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cglobal vp9_%1_8tap_1d_h_ %+ %%px %+ _12, 6, 6, %2, dst, dstride, src, sstride, h, filtery
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mova m5, [pw_4095]
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jmp mangle(private_prefix %+ _ %+ vp9_%1_8tap_1d_h_ %+ %%px %+ _10 %+ SUFFIX).body
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%endmacro
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INIT_XMM sse2
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filter_h_fn put
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filter_h_fn avg
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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filter_h_fn put
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filter_h_fn avg
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%endif
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%macro filter_v4_fn 1-2 12
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%if ARCH_X86_64
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cglobal vp9_%1_8tap_1d_v_4_10, 6, 8, %2, dst, dstride, src, sstride, h, filtery, src4, sstride3
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%else
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cglobal vp9_%1_8tap_1d_v_4_10, 4, 7, %2, dst, dstride, src, sstride, filtery, src4, sstride3
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mov filteryq, r5mp
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%define hd r4mp
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%endif
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mova m5, [pw_1023]
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.body:
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%if notcpuflag(sse4) && ARCH_X86_64
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pxor m11, m11
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%endif
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mova m6, [pd_64]
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lea sstride3q, [sstrideq*3]
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lea src4q, [srcq+sstrideq]
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sub srcq, sstride3q
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mova m7, [filteryq+ 0]
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%if ARCH_X86_64 && mmsize > 8
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mova m8, [filteryq+ 32]
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mova m9, [filteryq+ 64]
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mova m10, [filteryq+ 96]
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%endif
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.loop:
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; FIXME maybe reuse loads from previous rows, or just
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; more generally unroll this to prevent multiple loads of
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; the same data?
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movh m0, [srcq]
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movh m1, [srcq+sstrideq]
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movh m2, [srcq+sstrideq*2]
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movh m3, [srcq+sstride3q]
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add srcq, sstrideq
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movh m4, [src4q]
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punpcklwd m0, m1
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punpcklwd m2, m3
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pmaddwd m0, m7
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%if ARCH_X86_64 && mmsize > 8
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pmaddwd m2, m8
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%else
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pmaddwd m2, [filteryq+ 32]
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%endif
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movh m1, [src4q+sstrideq]
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movh m3, [src4q+sstrideq*2]
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paddd m0, m2
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movh m2, [src4q+sstride3q]
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add src4q, sstrideq
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punpcklwd m4, m1
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punpcklwd m3, m2
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%if ARCH_X86_64 && mmsize > 8
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pmaddwd m4, m9
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pmaddwd m3, m10
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%else
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pmaddwd m4, [filteryq+ 64]
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pmaddwd m3, [filteryq+ 96]
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%endif
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paddd m0, m4
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paddd m0, m3
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paddd m0, m6
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psrad m0, 7
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%if cpuflag(sse4)
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packusdw m0, m0
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%else
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packssdw m0, m0
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%endif
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%ifidn %1, avg
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movh m1, [dstq]
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%endif
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pminsw m0, m5
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%if notcpuflag(sse4)
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%if ARCH_X86_64
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pmaxsw m0, m11
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%else
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pxor m2, m2
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pmaxsw m0, m2
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%endif
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%endif
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%ifidn %1, avg
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pavgw m0, m1
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%endif
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movh [dstq], m0
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add dstq, dstrideq
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dec hd
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jg .loop
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RET
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%if ARCH_X86_64
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cglobal vp9_%1_8tap_1d_v_4_12, 6, 8, %2, dst, dstride, src, sstride, h, filtery, src4, sstride3
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%else
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cglobal vp9_%1_8tap_1d_v_4_12, 4, 7, %2, dst, dstride, src, sstride, filtery, src4, sstride3
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mov filteryq, r5mp
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%endif
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mova m5, [pw_4095]
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jmp mangle(private_prefix %+ _ %+ vp9_%1_8tap_1d_v_4_10 %+ SUFFIX).body
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%endmacro
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INIT_XMM sse2
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filter_v4_fn put
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filter_v4_fn avg
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%macro filter_v_fn 1-2 13
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%assign %%px mmsize/2
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%if ARCH_X86_64
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cglobal vp9_%1_8tap_1d_v_ %+ %%px %+ _10, 6, 8, %2, dst, dstride, src, sstride, h, filtery, src4, sstride3
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%else
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cglobal vp9_%1_8tap_1d_v_ %+ %%px %+ _10, 4, 7, %2, dst, dstride, src, sstride, filtery, src4, sstride3
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mov filteryq, r5mp
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%define hd r4mp
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%endif
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mova m5, [pw_1023]
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.body:
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%if notcpuflag(sse4) && ARCH_X86_64
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pxor m12, m12
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%endif
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%if ARCH_X86_64
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mova m11, [pd_64]
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%endif
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lea sstride3q, [sstrideq*3]
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lea src4q, [srcq+sstrideq]
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sub srcq, sstride3q
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mova m7, [filteryq+ 0]
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%if ARCH_X86_64 && mmsize > 8
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mova m8, [filteryq+ 32]
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mova m9, [filteryq+ 64]
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mova m10, [filteryq+ 96]
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%endif
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.loop:
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; FIXME maybe reuse loads from previous rows, or just
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; more generally unroll this to prevent multiple loads of
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; the same data?
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movu m0, [srcq]
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movu m1, [srcq+sstrideq]
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movu m2, [srcq+sstrideq*2]
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movu m3, [srcq+sstride3q]
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add srcq, sstrideq
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movu m4, [src4q]
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SBUTTERFLY wd, 0, 1, 6
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SBUTTERFLY wd, 2, 3, 6
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pmaddwd m0, m7
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pmaddwd m1, m7
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%if ARCH_X86_64 && mmsize > 8
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pmaddwd m2, m8
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pmaddwd m3, m8
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%else
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pmaddwd m2, [filteryq+ 32]
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pmaddwd m3, [filteryq+ 32]
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%endif
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paddd m0, m2
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paddd m1, m3
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movu m2, [src4q+sstrideq]
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movu m3, [src4q+sstrideq*2]
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SBUTTERFLY wd, 4, 2, 6
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%if ARCH_X86_64 && mmsize > 8
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pmaddwd m4, m9
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pmaddwd m2, m9
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%else
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pmaddwd m4, [filteryq+ 64]
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pmaddwd m2, [filteryq+ 64]
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%endif
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paddd m0, m4
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paddd m1, m2
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movu m4, [src4q+sstride3q]
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add src4q, sstrideq
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SBUTTERFLY wd, 3, 4, 6
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%if ARCH_X86_64 && mmsize > 8
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pmaddwd m3, m10
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pmaddwd m4, m10
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%else
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pmaddwd m3, [filteryq+ 96]
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pmaddwd m4, [filteryq+ 96]
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%endif
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paddd m0, m3
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paddd m1, m4
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%if ARCH_X86_64
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paddd m0, m11
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paddd m1, m11
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%else
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paddd m0, [pd_64]
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paddd m1, [pd_64]
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%endif
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psrad m0, 7
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psrad m1, 7
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%if cpuflag(sse4)
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packusdw m0, m1
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%else
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packssdw m0, m1
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%endif
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pminsw m0, m5
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%if notcpuflag(sse4)
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%if ARCH_X86_64
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pmaxsw m0, m12
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%else
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pxor m2, m2
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pmaxsw m0, m2
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%endif
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%endif
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%ifidn %1, avg
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pavgw m0, [dstq]
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%endif
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mova [dstq], m0
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add dstq, dstrideq
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dec hd
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jg .loop
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RET
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%if ARCH_X86_64
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cglobal vp9_%1_8tap_1d_v_ %+ %%px %+ _12, 6, 8, %2, dst, dstride, src, sstride, h, filtery, src4, sstride3
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%else
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cglobal vp9_%1_8tap_1d_v_ %+ %%px %+ _12, 4, 7, %2, dst, dstride, src, sstride, filtery, src4, sstride3
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mov filteryq, r5mp
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%endif
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mova m5, [pw_4095]
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jmp mangle(private_prefix %+ _ %+ vp9_%1_8tap_1d_v_ %+ %%px %+ _10 %+ SUFFIX).body
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%endmacro
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INIT_XMM sse2
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filter_v_fn put
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filter_v_fn avg
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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filter_v_fn put
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filter_v_fn avg
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%endif
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