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d8fb44c0aa
T-Head C908: add_8x8basis_c: 440.6 add_8x8basis_rvv_i32: 70.3 SpacemiT X60: add_8x8basis_c: 436.3 add_8x8basis_rvv_i32: 40.5
128 lines
3.6 KiB
ArmAsm
128 lines
3.6 KiB
ArmAsm
/*
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* Copyright © 2024 Rémi Denis-Courmont.
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/riscv/asm.S"
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.equ BASIS_SHIFT, 16
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.equ RECON_SHIFT, 6
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func ff_try_8x8basis_rvv, zve32x, b
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li t1, 64
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csrwi vxrm, 0
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vsetvli t0, t1, e32, m8, ta, ma
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vmv.v.x v24, zero
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vmv.s.x v1, zero
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1:
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vsetvli zero, zero, e16, m4, ta, ma
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vle16.v v4, (a2)
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sub t1, t1, t0
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vwmul.vx v16, v4, a3
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sh1add a2, t0, a2
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vle16.v v8, (a0)
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sh1add a0, t0, a0
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vnclip.wi v4, v16, BASIS_SHIFT - RECON_SHIFT
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vle16.v v12, (a1)
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sh1add a1, t0, a1
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vadd.vv v4, v8, v4
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vsra.vi v4, v4, RECON_SHIFT
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vwmul.vv v16, v12, v4
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vsetvli zero, zero, e32, m8, ta, ma
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vmul.vv v16, v16, v16
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vsra.vi v16, v16, 4
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vadd.vv v24, v24, v16
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bnez t1, 1b
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vredsum.vs v1, v24, v1
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vmv.x.s a0, v1
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srai a0, a0, 2
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ret
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endfunc
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func ff_add_8x8basis_rvv, zve32x, b
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li t1, 64
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csrwi vxrm, 0
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1:
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vsetvli t0, t1, e16, m4, ta, ma
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vle16.v v4, (a1)
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sub t1, t1, t0
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vwmul.vx v16, v4, a2
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sh1add a1, t0, a1
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vle16.v v8, (a0)
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vnclip.wi v4, v16, BASIS_SHIFT - RECON_SHIFT
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vadd.vv v4, v8, v4
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vse16.v v4, (a0)
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sh1add a0, t0, a0
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bnez t1, 1b
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ret
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endfunc
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func ff_pix_sum_rvv, zve64x, b
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lpad 0
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vsetivli t0, 16, e16, m1, ta, ma
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slli t1, t0, 3
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vlsseg2e64.v v8, (a0), a1 # poor man's vlse128.v
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li t2, 16
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vmv.s.x v1, zero
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vsetvli zero, t1, e8, m4, ta, ma
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vwaddu.vv v16, v8, v12
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beq t0, t2, 2f # VLEN >= 256
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1:
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sh3add a0, a1, a0
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vsetivli zero, 8, e16, m1, ta, ma
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vlsseg2e64.v v8, (a0), a1
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vsetvli zero, t1, e8, m4, ta, ma
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vwaddu.wv v16, v16, v8
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vwaddu.wv v16, v16, v12
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2:
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vsetvli zero, zero, e16, m8, ta, ma
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vredsum.vs v1, v16, v1
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vmv.x.s a0, v1
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zext.h a0, a0
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ret
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endfunc
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func ff_pix_norm1_rvv, zve64x
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lpad 0
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li t1, 16
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vsetvli t0, zero, e32, m8, ta, ma
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vmv.v.x v16, zero
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vmv.s.x v1, zero
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1:
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vsetvli t0, t1, e64, m2, ta, ma
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vlsseg2e64.v v8, (a0), a1
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slli t2, t0, 3
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vsetvli zero, t2, e8, m2, ta, ma
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vwmulu.vv v24, v8, v8
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sub t1, t1, t0
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vwmulu.vv v28, v10, v10
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mul t3, a1, t0
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vsetvli zero, zero, e16, m4, tu, ma
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vwaddu.wv v16, v16, v24
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add a0, t3, a0
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vwaddu.wv v16, v16, v28
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bnez t1, 1b
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vsetvli zero, zero, e32, m8, ta, ma
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vredsum.vs v1, v16, v1
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vmv.x.s a0, v1
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ret
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endfunc
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