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cfbdda607d
After this patch, the peformance of decoding H265 4K 30FPS 30Mbps on 3A6000 with 8 threads improves 2fps (45fps-->47fsp). Reviewed-by: yinshiyou-hf@loongson.cn Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
163 lines
4.9 KiB
ArmAsm
163 lines
4.9 KiB
ArmAsm
/*
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* Loongson LSX optimized add_residual functions for HEVC decoding
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*
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* Copyright (c) 2023 Loongson Technology Corporation Limited
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* Contributed by jinbo <jinbo@loongson.cn>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "loongson_asm.S"
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/*
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* void ff_hevc_add_residual4x4_lsx(uint8_t *dst, const int16_t *res, ptrdiff_t stride)
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*/
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.macro ADD_RES_LSX_4x4_8
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vldrepl.w vr0, a0, 0
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add.d t0, a0, a2
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vldrepl.w vr1, t0, 0
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vld vr2, a1, 0
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vilvl.w vr1, vr1, vr0
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vsllwil.hu.bu vr1, vr1, 0
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vadd.h vr1, vr1, vr2
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vssrani.bu.h vr1, vr1, 0
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vstelm.w vr1, a0, 0, 0
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vstelm.w vr1, t0, 0, 1
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.endm
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function ff_hevc_add_residual4x4_8_lsx
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ADD_RES_LSX_4x4_8
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alsl.d a0, a2, a0, 1
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addi.d a1, a1, 16
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ADD_RES_LSX_4x4_8
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endfunc
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/*
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* void ff_hevc_add_residual8x8_8_lsx(uint8_t *dst, const int16_t *res, ptrdiff_t stride)
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*/
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.macro ADD_RES_LSX_8x8_8
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vldrepl.d vr0, a0, 0
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add.d t0, a0, a2
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vldrepl.d vr1, t0, 0
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add.d t1, t0, a2
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vldrepl.d vr2, t1, 0
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add.d t2, t1, a2
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vldrepl.d vr3, t2, 0
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vld vr4, a1, 0
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addi.d t3, zero, 16
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vldx vr5, a1, t3
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addi.d t4, a1, 32
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vld vr6, t4, 0
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vldx vr7, t4, t3
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vsllwil.hu.bu vr0, vr0, 0
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vsllwil.hu.bu vr1, vr1, 0
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vsllwil.hu.bu vr2, vr2, 0
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vsllwil.hu.bu vr3, vr3, 0
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vadd.h vr0, vr0, vr4
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vadd.h vr1, vr1, vr5
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vadd.h vr2, vr2, vr6
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vadd.h vr3, vr3, vr7
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vssrani.bu.h vr1, vr0, 0
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vssrani.bu.h vr3, vr2, 0
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vstelm.d vr1, a0, 0, 0
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vstelm.d vr1, t0, 0, 1
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vstelm.d vr3, t1, 0, 0
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vstelm.d vr3, t2, 0, 1
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.endm
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function ff_hevc_add_residual8x8_8_lsx
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ADD_RES_LSX_8x8_8
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alsl.d a0, a2, a0, 2
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addi.d a1, a1, 64
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ADD_RES_LSX_8x8_8
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endfunc
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/*
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* void ff_hevc_add_residual16x16_8_lsx(uint8_t *dst, const int16_t *res, ptrdiff_t stride)
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*/
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function ff_hevc_add_residual16x16_8_lsx
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.rept 8
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vld vr0, a0, 0
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vldx vr2, a0, a2
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vld vr4, a1, 0
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addi.d t0, zero, 16
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vldx vr5, a1, t0
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addi.d t1, a1, 32
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vld vr6, t1, 0
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vldx vr7, t1, t0
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vexth.hu.bu vr1, vr0
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vsllwil.hu.bu vr0, vr0, 0
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vexth.hu.bu vr3, vr2
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vsllwil.hu.bu vr2, vr2, 0
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vadd.h vr0, vr0, vr4
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vadd.h vr1, vr1, vr5
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vadd.h vr2, vr2, vr6
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vadd.h vr3, vr3, vr7
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vssrani.bu.h vr1, vr0, 0
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vssrani.bu.h vr3, vr2, 0
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vst vr1, a0, 0
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vstx vr3, a0, a2
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alsl.d a0, a2, a0, 1
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addi.d a1, a1, 64
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.endr
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endfunc
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/*
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* void ff_hevc_add_residual32x32_8_lsx(uint8_t *dst, const int16_t *res, ptrdiff_t stride)
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*/
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function ff_hevc_add_residual32x32_8_lsx
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.rept 32
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vld vr0, a0, 0
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addi.w t0, zero, 16
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vldx vr2, a0, t0
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vld vr4, a1, 0
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vldx vr5, a1, t0
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addi.d t1, a1, 32
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vld vr6, t1, 0
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vldx vr7, t1, t0
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vexth.hu.bu vr1, vr0
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vsllwil.hu.bu vr0, vr0, 0
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vexth.hu.bu vr3, vr2
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vsllwil.hu.bu vr2, vr2, 0
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vadd.h vr0, vr0, vr4
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vadd.h vr1, vr1, vr5
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vadd.h vr2, vr2, vr6
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vadd.h vr3, vr3, vr7
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vssrani.bu.h vr1, vr0, 0
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vssrani.bu.h vr3, vr2, 0
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vst vr1, a0, 0
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vstx vr3, a0, t0
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add.d a0, a0, a2
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addi.d a1, a1, 64
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.endr
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endfunc
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