mirror of https://git.ffmpeg.org/ffmpeg.git
x86: motion_est: K&R formatting cosmetics
This commit is contained in:
Diego Biurrun
parent
a36947c167
commit
f8bbebecfd
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@ -31,18 +31,18 @@
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#if HAVE_INLINE_ASM
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DECLARE_ASM_CONST(8, uint64_t, round_tab)[3]={
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0x0000000000000000ULL,
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0x0001000100010001ULL,
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0x0002000200020002ULL,
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DECLARE_ASM_CONST(8, uint64_t, round_tab)[3] = {
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0x0000000000000000ULL,
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0x0001000100010001ULL,
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0x0002000200020002ULL,
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};
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DECLARE_ASM_CONST(8, uint64_t, bone)= 0x0101010101010101LL;
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DECLARE_ASM_CONST(8, uint64_t, bone) = 0x0101010101010101LL;
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static inline void sad8_1_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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{
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x86_reg len= -(stride*h);
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__asm__ volatile(
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x86_reg len = -(stride * h);
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__asm__ volatile (
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1, %%"REG_a"), %%mm0 \n\t"
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@ -71,14 +71,13 @@ static inline void sad8_1_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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"add %3, %%"REG_a" \n\t"
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" js 1b \n\t"
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: "+a" (len)
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: "r" (blk1 - len), "r" (blk2 - len), "r" ((x86_reg)stride)
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);
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: "r" (blk1 - len), "r" (blk2 - len), "r" ((x86_reg) stride));
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}
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static inline void sad8_1_mmxext(uint8_t *blk1, uint8_t *blk2,
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int stride, int h)
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{
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__asm__ volatile(
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__asm__ volatile (
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1), %%mm0 \n\t"
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@ -92,14 +91,13 @@ static inline void sad8_1_mmxext(uint8_t *blk1, uint8_t *blk2,
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"sub $2, %0 \n\t"
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" jg 1b \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2)
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: "r" ((x86_reg)stride)
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);
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: "r" ((x86_reg) stride));
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}
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static int sad16_sse2(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)
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{
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int ret;
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__asm__ volatile(
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__asm__ volatile (
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"pxor %%xmm2, %%xmm2 \n\t"
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".p2align 4 \n\t"
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"1: \n\t"
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@ -116,16 +114,15 @@ static int sad16_sse2(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)
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"movhlps %%xmm2, %%xmm0 \n\t"
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"paddw %%xmm0, %%xmm2 \n\t"
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"movd %%xmm2, %3 \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2), "=r"(ret)
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: "r" ((x86_reg)stride)
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);
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: "+r" (h), "+r" (blk1), "+r" (blk2), "=r" (ret)
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: "r" ((x86_reg) stride));
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return ret;
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}
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static inline void sad8_x2a_mmxext(uint8_t *blk1, uint8_t *blk2,
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int stride, int h)
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{
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__asm__ volatile(
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__asm__ volatile (
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1), %%mm0 \n\t"
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@ -141,14 +138,13 @@ static inline void sad8_x2a_mmxext(uint8_t *blk1, uint8_t *blk2,
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"sub $2, %0 \n\t"
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" jg 1b \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2)
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: "r" ((x86_reg)stride)
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);
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: "r" ((x86_reg) stride));
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}
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static inline void sad8_y2a_mmxext(uint8_t *blk1, uint8_t *blk2,
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int stride, int h)
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{
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__asm__ volatile(
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__asm__ volatile (
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"movq (%1), %%mm0 \n\t"
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"add %3, %1 \n\t"
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".p2align 4 \n\t"
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@ -167,14 +163,13 @@ static inline void sad8_y2a_mmxext(uint8_t *blk1, uint8_t *blk2,
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"sub $2, %0 \n\t"
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" jg 1b \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2)
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: "r" ((x86_reg)stride)
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);
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: "r" ((x86_reg) stride));
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}
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static inline void sad8_4_mmxext(uint8_t *blk1, uint8_t *blk2,
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int stride, int h)
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{
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__asm__ volatile(
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__asm__ volatile (
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"movq "MANGLE(bone)", %%mm5 \n\t"
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"movq (%1), %%mm0 \n\t"
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"pavgb 1(%1), %%mm0 \n\t"
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@ -198,14 +193,14 @@ static inline void sad8_4_mmxext(uint8_t *blk1, uint8_t *blk2,
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"sub $2, %0 \n\t"
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" jg 1b \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2)
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: "r" ((x86_reg)stride)
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);
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: "r" ((x86_reg) stride));
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}
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static inline void sad8_2_mmx(uint8_t *blk1a, uint8_t *blk1b, uint8_t *blk2, int stride, int h)
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static inline void sad8_2_mmx(uint8_t *blk1a, uint8_t *blk1b, uint8_t *blk2,
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int stride, int h)
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{
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x86_reg len= -(stride*h);
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__asm__ volatile(
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x86_reg len = -(stride * h);
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__asm__ volatile (
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1, %%"REG_a"), %%mm0 \n\t"
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@ -236,15 +231,15 @@ static inline void sad8_2_mmx(uint8_t *blk1a, uint8_t *blk1b, uint8_t *blk2, int
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"add %4, %%"REG_a" \n\t"
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" js 1b \n\t"
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: "+a" (len)
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: "r" (blk1a - len), "r" (blk1b -len), "r" (blk2 - len), "r" ((x86_reg)stride)
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);
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: "r" (blk1a - len), "r" (blk1b - len), "r" (blk2 - len),
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"r" ((x86_reg) stride));
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}
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static inline void sad8_4_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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{
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x86_reg len= -(stride*h);
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__asm__ volatile(
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"movq (%1, %%"REG_a"), %%mm0 \n\t"
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x86_reg len = -(stride * h);
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__asm__ volatile (
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"movq (%1, %%"REG_a"), %%mm0 \n\t"
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"movq 1(%1, %%"REG_a"), %%mm2 \n\t"
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"movq %%mm0, %%mm1 \n\t"
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"movq %%mm2, %%mm3 \n\t"
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@ -256,7 +251,7 @@ static inline void sad8_4_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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"paddw %%mm3, %%mm1 \n\t"
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%2, %%"REG_a"), %%mm2 \n\t"
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"movq (%2, %%"REG_a"), %%mm2 \n\t"
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"movq 1(%2, %%"REG_a"), %%mm4 \n\t"
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"movq %%mm2, %%mm3 \n\t"
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"movq %%mm4, %%mm5 \n\t"
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@ -289,14 +284,14 @@ static inline void sad8_4_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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"add %4, %%"REG_a" \n\t"
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" js 1b \n\t"
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: "+a" (len)
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: "r" (blk1 - len), "r" (blk1 -len + stride), "r" (blk2 - len), "r" ((x86_reg)stride)
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);
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: "r" (blk1 - len), "r" (blk1 - len + stride), "r" (blk2 - len),
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"r" ((x86_reg) stride));
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}
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static inline int sum_mmx(void)
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{
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int ret;
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__asm__ volatile(
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__asm__ volatile (
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"movq %%mm6, %%mm0 \n\t"
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"psrlq $32, %%mm6 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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@ -304,129 +299,145 @@ static inline int sum_mmx(void)
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"psrlq $16, %%mm6 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"movd %%mm6, %0 \n\t"
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: "=r" (ret)
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);
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return ret&0xFFFF;
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: "=r" (ret));
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return ret & 0xFFFF;
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}
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static inline int sum_mmxext(void)
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{
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int ret;
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__asm__ volatile(
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__asm__ volatile (
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"movd %%mm6, %0 \n\t"
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: "=r" (ret)
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);
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: "=r" (ret));
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return ret;
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}
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static inline void sad8_x2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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{
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sad8_2_mmx(blk1, blk1+1, blk2, stride, h);
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sad8_2_mmx(blk1, blk1 + 1, blk2, stride, h);
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}
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static inline void sad8_y2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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{
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sad8_2_mmx(blk1, blk1+stride, blk2, stride, h);
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sad8_2_mmx(blk1, blk1 + stride, blk2, stride, h);
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}
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#define PIX_SAD(suf)\
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static int sad8_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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assert(h==8);\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t":);\
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\
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sad8_1_ ## suf(blk1, blk2, stride, 8);\
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\
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return sum_ ## suf();\
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}\
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static int sad8_x2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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assert(h==8);\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t"\
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"movq %0, %%mm5 \n\t"\
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:: "m"(round_tab[1]) \
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);\
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\
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sad8_x2a_ ## suf(blk1, blk2, stride, 8);\
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\
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return sum_ ## suf();\
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}\
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\
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static int sad8_y2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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assert(h==8);\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t"\
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"movq %0, %%mm5 \n\t"\
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:: "m"(round_tab[1]) \
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);\
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\
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sad8_y2a_ ## suf(blk1, blk2, stride, 8);\
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\
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return sum_ ## suf();\
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}\
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\
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static int sad8_xy2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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assert(h==8);\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t"\
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::);\
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\
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sad8_4_ ## suf(blk1, blk2, stride, 8);\
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\
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return sum_ ## suf();\
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}\
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\
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static int sad16_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t":);\
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\
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sad8_1_ ## suf(blk1 , blk2 , stride, h);\
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sad8_1_ ## suf(blk1+8, blk2+8, stride, h);\
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\
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return sum_ ## suf();\
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}\
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static int sad16_x2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t"\
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"movq %0, %%mm5 \n\t"\
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:: "m"(round_tab[1]) \
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);\
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\
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sad8_x2a_ ## suf(blk1 , blk2 , stride, h);\
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sad8_x2a_ ## suf(blk1+8, blk2+8, stride, h);\
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\
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return sum_ ## suf();\
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}\
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static int sad16_y2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t"\
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"movq %0, %%mm5 \n\t"\
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:: "m"(round_tab[1]) \
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);\
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\
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sad8_y2a_ ## suf(blk1 , blk2 , stride, h);\
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sad8_y2a_ ## suf(blk1+8, blk2+8, stride, h);\
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\
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return sum_ ## suf();\
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}\
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static int sad16_xy2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\
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{\
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__asm__ volatile("pxor %%mm7, %%mm7 \n\t"\
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"pxor %%mm6, %%mm6 \n\t"\
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::);\
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\
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sad8_4_ ## suf(blk1 , blk2 , stride, h);\
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sad8_4_ ## suf(blk1+8, blk2+8, stride, h);\
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\
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return sum_ ## suf();\
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}\
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#define PIX_SAD(suf) \
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static int sad8_ ## suf(void *v, uint8_t *blk2, \
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uint8_t *blk1, int stride, int h) \
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{ \
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assert(h == 8); \
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__asm__ volatile ( \
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"pxor %%mm7, %%mm7 \n\t" \
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"pxor %%mm6, %%mm6 \n\t" \
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:); \
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\
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sad8_1_ ## suf(blk1, blk2, stride, 8); \
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\
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return sum_ ## suf(); \
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} \
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\
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static int sad8_x2_ ## suf(void *v, uint8_t *blk2, \
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uint8_t *blk1, int stride, int h) \
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{ \
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assert(h == 8); \
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__asm__ volatile ( \
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"pxor %%mm7, %%mm7 \n\t" \
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"pxor %%mm6, %%mm6 \n\t" \
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"movq %0, %%mm5 \n\t" \
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:: "m" (round_tab[1])); \
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\
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sad8_x2a_ ## suf(blk1, blk2, stride, 8); \
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\
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return sum_ ## suf(); \
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} \
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\
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static int sad8_y2_ ## suf(void *v, uint8_t *blk2, \
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uint8_t *blk1, int stride, int h) \
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{ \
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assert(h == 8); \
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__asm__ volatile ( \
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"pxor %%mm7, %%mm7 \n\t" \
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"pxor %%mm6, %%mm6 \n\t" \
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"movq %0, %%mm5 \n\t" \
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:: "m" (round_tab[1])); \
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\
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sad8_y2a_ ## suf(blk1, blk2, stride, 8); \
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\
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return sum_ ## suf(); \
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} \
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\
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static int sad8_xy2_ ## suf(void *v, uint8_t *blk2, \
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uint8_t *blk1, int stride, int h) \
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{ \
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assert(h == 8); \
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__asm__ volatile ( \
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"pxor %%mm7, %%mm7 \n\t" \
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"pxor %%mm6, %%mm6 \n\t" \
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::); \
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\
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sad8_4_ ## suf(blk1, blk2, stride, 8); \
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\
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return sum_ ## suf(); \
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} \
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\
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static int sad16_ ## suf(void *v, uint8_t *blk2, \
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uint8_t *blk1, int stride, int h) \
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{ \
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__asm__ volatile ( \
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"pxor %%mm7, %%mm7 \n\t" \
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"pxor %%mm6, %%mm6 \n\t" \
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:); \
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\
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sad8_1_ ## suf(blk1, blk2, stride, h); \
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sad8_1_ ## suf(blk1 + 8, blk2 + 8, stride, h); \
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\
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return sum_ ## suf(); \
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} \
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\
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static int sad16_x2_ ## suf(void *v, uint8_t *blk2, \
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uint8_t *blk1, int stride, int h) \
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{ \
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__asm__ volatile ( \
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"pxor %%mm7, %%mm7 \n\t" \
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"pxor %%mm6, %%mm6 \n\t" \
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"movq %0, %%mm5 \n\t" \
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:: "m" (round_tab[1])); \
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\
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sad8_x2a_ ## suf(blk1, blk2, stride, h); \
|
||||
sad8_x2a_ ## suf(blk1 + 8, blk2 + 8, stride, h); \
|
||||
\
|
||||
return sum_ ## suf(); \
|
||||
} \
|
||||
\
|
||||
static int sad16_y2_ ## suf(void *v, uint8_t *blk2, \
|
||||
uint8_t *blk1, int stride, int h) \
|
||||
{ \
|
||||
__asm__ volatile ( \
|
||||
"pxor %%mm7, %%mm7 \n\t" \
|
||||
"pxor %%mm6, %%mm6 \n\t" \
|
||||
"movq %0, %%mm5 \n\t" \
|
||||
:: "m" (round_tab[1])); \
|
||||
\
|
||||
sad8_y2a_ ## suf(blk1, blk2, stride, h); \
|
||||
sad8_y2a_ ## suf(blk1 + 8, blk2 + 8, stride, h); \
|
||||
\
|
||||
return sum_ ## suf(); \
|
||||
} \
|
||||
\
|
||||
static int sad16_xy2_ ## suf(void *v, uint8_t *blk2, \
|
||||
uint8_t *blk1, int stride, int h) \
|
||||
{ \
|
||||
__asm__ volatile ( \
|
||||
"pxor %%mm7, %%mm7 \n\t" \
|
||||
"pxor %%mm6, %%mm6 \n\t" \
|
||||
::); \
|
||||
\
|
||||
sad8_4_ ## suf(blk1, blk2, stride, h); \
|
||||
sad8_4_ ## suf(blk1 + 8, blk2 + 8, stride, h); \
|
||||
\
|
||||
return sum_ ## suf(); \
|
||||
} \
|
||||
|
||||
PIX_SAD(mmx)
|
||||
PIX_SAD(mmxext)
|
||||
|
|
@ -448,17 +459,17 @@ av_cold void ff_dsputil_init_pix_mmx(DSPContext *c, AVCodecContext *avctx)
|
|||
c->pix_abs[1][2] = sad8_y2_mmx;
|
||||
c->pix_abs[1][3] = sad8_xy2_mmx;
|
||||
|
||||
c->sad[0]= sad16_mmx;
|
||||
c->sad[1]= sad8_mmx;
|
||||
c->sad[0] = sad16_mmx;
|
||||
c->sad[1] = sad8_mmx;
|
||||
}
|
||||
if (INLINE_MMXEXT(cpu_flags)) {
|
||||
c->pix_abs[0][0] = sad16_mmxext;
|
||||
c->pix_abs[1][0] = sad8_mmxext;
|
||||
|
||||
c->sad[0] = sad16_mmxext;
|
||||
c->sad[1] = sad8_mmxext;
|
||||
c->sad[0] = sad16_mmxext;
|
||||
c->sad[1] = sad8_mmxext;
|
||||
|
||||
if(!(avctx->flags & CODEC_FLAG_BITEXACT)){
|
||||
if (!(avctx->flags & CODEC_FLAG_BITEXACT)) {
|
||||
c->pix_abs[0][1] = sad16_x2_mmxext;
|
||||
c->pix_abs[0][2] = sad16_y2_mmxext;
|
||||
c->pix_abs[0][3] = sad16_xy2_mmxext;
|
||||
|
|
@ -468,7 +479,7 @@ av_cold void ff_dsputil_init_pix_mmx(DSPContext *c, AVCodecContext *avctx)
|
|||
}
|
||||
}
|
||||
if (INLINE_SSE2(cpu_flags) && !(cpu_flags & AV_CPU_FLAG_3DNOW)) {
|
||||
c->sad[0]= sad16_sse2;
|
||||
c->sad[0] = sad16_sse2;
|
||||
}
|
||||
#endif /* HAVE_INLINE_ASM */
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue