mirror of https://git.ffmpeg.org/ffmpeg.git
x86: Add missing movsxd for the int stride parameter
Signed-off-by: Martin Storsjö <martin@martin.st>
This commit is contained in:
Martin Storsjö
parent
a2ddfadc2d
commit
f1a9eee41c
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@ -82,6 +82,7 @@ SECTION .text
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INIT_MMX mmx
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; void ff_h264_idct_add_8_mmx(uint8_t *dst, int16_t *block, int stride)
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cglobal h264_idct_add_8, 3, 3, 0
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movsxdifnidn r2, r2d
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IDCT4_ADD r0, r1, r2
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RET
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@ -204,6 +205,7 @@ cglobal h264_idct_add_8, 3, 3, 0
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INIT_MMX mmx
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; void ff_h264_idct8_add_8_mmx(uint8_t *dst, int16_t *block, int stride)
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cglobal h264_idct8_add_8, 3, 4, 0
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movsxdifnidn r2, r2d
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%assign pad 128+4-(stack_offset&7)
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SUB rsp, pad
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@ -272,6 +274,7 @@ cglobal h264_idct8_add_8, 3, 4, 0
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INIT_XMM sse2
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; void ff_h264_idct8_add_8_sse2(uint8_t *dst, int16_t *block, int stride)
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cglobal h264_idct8_add_8, 3, 4, 10
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movsxdifnidn r2, r2d
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IDCT8_ADD_SSE r0, r1, r2, r3
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RET
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@ -310,6 +313,7 @@ INIT_MMX mmxext
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; void ff_h264_idct_dc_add_8_mmxext(uint8_t *dst, int16_t *block, int stride)
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%if ARCH_X86_64
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cglobal h264_idct_dc_add_8, 3, 4, 0
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movsxd r2, r2d
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movsx r3, word [r1]
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mov dword [r1], 0
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DC_ADD_MMXEXT_INIT r3, r2
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@ -318,6 +322,7 @@ cglobal h264_idct_dc_add_8, 3, 4, 0
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; void ff_h264_idct8_dc_add_8_mmxext(uint8_t *dst, int16_t *block, int stride)
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cglobal h264_idct8_dc_add_8, 3, 4, 0
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movsxd r2, r2d
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movsx r3, word [r1]
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mov dword [r1], 0
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DC_ADD_MMXEXT_INIT r3, r2
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@ -352,6 +357,7 @@ INIT_MMX mmx
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct_add16_8, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg
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movsxdifnidn r3, r3d
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xor r5, r5
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%ifdef PIC
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lea picregq, [scan8_mem]
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@ -375,6 +381,7 @@ cglobal h264_idct_add16_8, 5, 7 + npicregs, 0, dst, block_offset, block, stride,
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct8_add4_8, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg
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movsxdifnidn r3, r3d
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%assign pad 128+4-(stack_offset&7)
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SUB rsp, pad
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@ -409,6 +416,7 @@ INIT_MMX mmxext
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct_add16_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
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movsxdifnidn r3, r3d
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xor r5, r5
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%ifdef PIC
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lea picregq, [scan8_mem]
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@ -456,6 +464,7 @@ INIT_MMX mmx
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct_add16intra_8, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg
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movsxdifnidn r3, r3d
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xor r5, r5
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%ifdef PIC
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lea picregq, [scan8_mem]
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@ -481,6 +490,7 @@ INIT_MMX mmxext
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct_add16intra_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
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movsxdifnidn r3, r3d
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xor r5, r5
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%ifdef PIC
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lea picregq, [scan8_mem]
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@ -525,6 +535,7 @@ cglobal h264_idct_add16intra_8, 5, 8 + npicregs, 0, dst1, block_offset, block, s
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct8_add4_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
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movsxdifnidn r3, r3d
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%assign pad 128+4-(stack_offset&7)
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SUB rsp, pad
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@ -587,6 +598,7 @@ INIT_XMM sse2
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct8_add4_8, 5, 8 + npicregs, 10, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
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movsxdifnidn r3, r3d
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xor r5, r5
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%ifdef PIC
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lea picregq, [scan8_mem]
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@ -638,6 +650,7 @@ INIT_XMM cpuname
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INIT_MMX mmx
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h264_idct_add8_mmx_plane:
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movsxdifnidn r3, r3d
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.nextblock:
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movzx r6, byte [scan8+r5]
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movzx r6, byte [r4+r6]
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@ -664,6 +677,7 @@ h264_idct_add8_mmx_plane:
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct_add8_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
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movsxdifnidn r3, r3d
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mov r5, 16
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add r2, 512
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%ifdef PIC
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@ -684,6 +698,7 @@ cglobal h264_idct_add8_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride,
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RET
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h264_idct_add8_mmxext_plane:
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movsxdifnidn r3, r3d
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.nextblock:
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movzx r6, byte [scan8+r5]
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movzx r6, byte [r4+r6]
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@ -730,6 +745,7 @@ INIT_MMX mmxext
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct_add8_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
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movsxdifnidn r3, r3d
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mov r5, 16
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add r2, 512
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%if ARCH_X86_64
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@ -751,6 +767,7 @@ cglobal h264_idct_add8_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride,
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; r0 = uint8_t *dst, r2 = int16_t *block, r3 = int stride, r6=clobbered
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h264_idct_dc_add8_mmxext:
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movsxdifnidn r3, r3d
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movd m0, [r2 ] ; 0 0 X D
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mov word [r2+ 0], 0
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punpcklwd m0, [r2+32] ; x X d D
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@ -771,6 +788,7 @@ ALIGN 16
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INIT_XMM sse2
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; r0 = uint8_t *dst (clobbered), r2 = int16_t *block, r3 = int stride
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h264_add8x4_idct_sse2:
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movsxdifnidn r3, r3d
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movq m0, [r2+ 0]
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movq m1, [r2+ 8]
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movq m2, [r2+16]
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@ -814,6 +832,7 @@ h264_add8x4_idct_sse2:
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct_add16_8, 5, 5 + ARCH_X86_64, 8
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movsxdifnidn r3, r3d
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%if ARCH_X86_64
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mov r5, r0
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%endif
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@ -862,6 +881,7 @@ cglobal h264_idct_add16_8, 5, 5 + ARCH_X86_64, 8
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct_add16intra_8, 5, 7 + ARCH_X86_64, 8
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movsxdifnidn r3, r3d
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%if ARCH_X86_64
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mov r7, r0
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%endif
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@ -914,6 +934,7 @@ cglobal h264_idct_add16intra_8, 5, 7 + ARCH_X86_64, 8
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; int16_t *block, int stride,
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; const uint8_t nnzc[6 * 8])
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cglobal h264_idct_add8_8, 5, 7 + ARCH_X86_64, 8
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movsxdifnidn r3, r3d
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add r2, 512
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%if ARCH_X86_64
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mov r7, r0
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@ -77,6 +77,7 @@ SECTION .text
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%macro IDCT_ADD_10 0
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cglobal h264_idct_add_10, 3,3
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movsxdifnidn r2, r2d
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IDCT4_ADD_10 r0, r1, r2
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RET
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%endmacro
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@ -134,6 +135,7 @@ ADD4x4IDCT
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%macro IDCT_ADD16_10 0
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cglobal h264_idct_add16_10, 5,6
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movsxdifnidn r3, r3d
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ADD16_OP 0, 4+1*8
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ADD16_OP 1, 5+1*8
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ADD16_OP 2, 4+2*8
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@ -190,6 +192,7 @@ IDCT_ADD16_10
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INIT_MMX mmxext
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cglobal h264_idct_dc_add_10,3,3
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movsxdifnidn r2, r2d
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movd m0, [r1]
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mov dword [r1], 0
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paddd m0, [pd_32]
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@ -205,6 +208,7 @@ cglobal h264_idct_dc_add_10,3,3
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;-----------------------------------------------------------------------------
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%macro IDCT8_DC_ADD 0
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cglobal h264_idct8_dc_add_10,3,4,7
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movsxdifnidn r2, r2d
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movd m0, [r1]
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mov dword[r1], 0
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paddd m0, [pd_32]
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@ -272,6 +276,7 @@ idct_dc_add %+ SUFFIX:
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ret
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cglobal h264_idct_add16intra_10,5,7,8
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movsxdifnidn r3, r3d
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ADD16_OP_INTRA 0, 4+1*8
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ADD16_OP_INTRA 2, 4+2*8
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ADD16_OP_INTRA 4, 6+1*8
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@ -304,6 +309,7 @@ IDCT_ADD16INTRA_10
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;-----------------------------------------------------------------------------
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%macro IDCT_ADD8 0
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cglobal h264_idct_add8_10,5,8,7
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movsxdifnidn r3, r3d
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%if ARCH_X86_64
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mov r7, r0
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%endif
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@ -438,6 +444,7 @@ IDCT_ADD8
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%macro IDCT8_ADD 0
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cglobal h264_idct8_add_10, 3,4,16
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movsxdifnidn r2, r2d
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%if UNIX64 == 0
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%assign pad 16-gprsize-(stack_offset&15)
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sub rsp, pad
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@ -560,6 +567,7 @@ IDCT8_ADD
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%macro IDCT8_ADD4 0
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cglobal h264_idct8_add4_10, 0,7,16
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movsxdifnidn r3, r3d
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%assign pad 16-gprsize-(stack_offset&15)
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SUB rsp, pad
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mov r5, r0mp
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