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avcodec/nvdec: Add support for decoding HEVC 4:4:4 content
The latest generation video decoder on the Turing chips supports decoding HEVC 4:4:4. Supporting this is relatively straight-forward; we need to account for the different chroma format and pick the right output and sw formats at the right times. There was one bug which was the hard-coded assumption that the first chroma plane would be half-height; I fixed this to use the actual shift value on the plane. We also need to pass the SPS and PPS range extension flags.
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f4ea930a11
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@ -409,6 +409,9 @@ static enum AVPixelFormat get_format(HEVCContext *s, const HEVCSPS *sps)
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#endif
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break;
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case AV_PIX_FMT_YUV420P12:
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case AV_PIX_FMT_YUV444P:
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case AV_PIX_FMT_YUV444P10:
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case AV_PIX_FMT_YUV444P12:
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#if CONFIG_HEVC_NVDEC_HWACCEL
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*fmt++ = AV_PIX_FMT_CUDA;
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#endif
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@ -35,6 +35,11 @@
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#include "nvdec.h"
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#include "internal.h"
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#if !NVDECAPI_CHECK_VERSION(9, 0)
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#define cudaVideoSurfaceFormat_YUV444 2
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#define cudaVideoSurfaceFormat_YUV444_16Bit 3
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#endif
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typedef struct NVDECDecoder {
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CUvideodecoder decoder;
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@ -274,7 +279,8 @@ int ff_nvdec_decode_init(AVCodecContext *avctx)
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CUVIDDECODECREATEINFO params = { 0 };
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int cuvid_codec_type, cuvid_chroma_format;
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cudaVideoSurfaceFormat output_format;
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int cuvid_codec_type, cuvid_chroma_format, chroma_444;
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int ret = 0;
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sw_desc = av_pix_fmt_desc_get(avctx->sw_pix_fmt);
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@ -292,6 +298,7 @@ int ff_nvdec_decode_init(AVCodecContext *avctx)
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av_log(avctx, AV_LOG_ERROR, "Unsupported chroma format\n");
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return AVERROR(ENOSYS);
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}
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chroma_444 = cuvid_chroma_format == cudaVideoChromaFormat_444;
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if (!avctx->hw_frames_ctx) {
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ret = ff_decode_get_hw_frames_ctx(avctx, AV_HWDEVICE_TYPE_CUDA);
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@ -299,6 +306,21 @@ int ff_nvdec_decode_init(AVCodecContext *avctx)
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return ret;
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}
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switch (sw_desc->comp[0].depth) {
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case 8:
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output_format = chroma_444 ? cudaVideoSurfaceFormat_YUV444 :
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cudaVideoSurfaceFormat_NV12;
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break;
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case 10:
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case 12:
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output_format = chroma_444 ? cudaVideoSurfaceFormat_YUV444_16Bit :
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cudaVideoSurfaceFormat_P016;
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break;
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default:
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av_log(avctx, AV_LOG_ERROR, "Unsupported bit depth\n");
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return AVERROR(ENOSYS);
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}
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frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
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params.ulWidth = avctx->coded_width;
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@ -306,8 +328,7 @@ int ff_nvdec_decode_init(AVCodecContext *avctx)
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params.ulTargetWidth = avctx->coded_width;
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params.ulTargetHeight = avctx->coded_height;
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params.bitDepthMinus8 = sw_desc->comp[0].depth - 8;
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params.OutputFormat = params.bitDepthMinus8 ?
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cudaVideoSurfaceFormat_P016 : cudaVideoSurfaceFormat_NV12;
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params.OutputFormat = output_format;
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params.CodecType = cuvid_codec_type;
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params.ChromaFormat = cuvid_chroma_format;
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params.ulNumDecodeSurfaces = frames_ctx->initial_pool_size;
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@ -386,6 +407,8 @@ static int nvdec_retrieve_data(void *logctx, AVFrame *frame)
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NVDECFrame *cf = (NVDECFrame*)fdd->hwaccel_priv;
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NVDECDecoder *decoder = (NVDECDecoder*)cf->decoder_ref->data;
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AVHWFramesContext *hwctx = (AVHWFramesContext *)frame->hw_frames_ctx->data;
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CUVIDPROCPARAMS vpp = { 0 };
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NVDECFrame *unmap_data = NULL;
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@ -394,6 +417,7 @@ static int nvdec_retrieve_data(void *logctx, AVFrame *frame)
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unsigned int pitch, i;
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unsigned int offset = 0;
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int shift_h = 0, shift_v = 0;
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int ret = 0;
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vpp.progressive_frame = 1;
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@ -427,10 +451,11 @@ static int nvdec_retrieve_data(void *logctx, AVFrame *frame)
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unmap_data->idx_ref = av_buffer_ref(cf->idx_ref);
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unmap_data->decoder_ref = av_buffer_ref(cf->decoder_ref);
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av_pix_fmt_get_chroma_sub_sample(hwctx->sw_format, &shift_h, &shift_v);
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for (i = 0; frame->linesize[i]; i++) {
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frame->data[i] = (uint8_t*)(devptr + offset);
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frame->linesize[i] = pitch;
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offset += pitch * (frame->height >> (i ? 1 : 0));
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offset += pitch * (frame->height >> (i ? shift_v : 0));
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}
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goto finish;
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@ -566,7 +591,7 @@ int ff_nvdec_frame_params(AVCodecContext *avctx,
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{
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AVHWFramesContext *frames_ctx = (AVHWFramesContext*)hw_frames_ctx->data;
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const AVPixFmtDescriptor *sw_desc;
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int cuvid_codec_type, cuvid_chroma_format;
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int cuvid_codec_type, cuvid_chroma_format, chroma_444;
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sw_desc = av_pix_fmt_desc_get(avctx->sw_pix_fmt);
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if (!sw_desc)
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@ -583,6 +608,7 @@ int ff_nvdec_frame_params(AVCodecContext *avctx,
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av_log(avctx, AV_LOG_VERBOSE, "Unsupported chroma format\n");
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return AVERROR(EINVAL);
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}
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chroma_444 = cuvid_chroma_format == cudaVideoChromaFormat_444;
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frames_ctx->format = AV_PIX_FMT_CUDA;
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frames_ctx->width = (avctx->coded_width + 1) & ~1;
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@ -601,13 +627,13 @@ int ff_nvdec_frame_params(AVCodecContext *avctx,
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switch (sw_desc->comp[0].depth) {
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case 8:
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frames_ctx->sw_format = AV_PIX_FMT_NV12;
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frames_ctx->sw_format = chroma_444 ? AV_PIX_FMT_YUV444P : AV_PIX_FMT_NV12;
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break;
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case 10:
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frames_ctx->sw_format = AV_PIX_FMT_P010;
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frames_ctx->sw_format = chroma_444 ? AV_PIX_FMT_YUV444P16 : AV_PIX_FMT_P010;
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break;
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case 12:
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frames_ctx->sw_format = AV_PIX_FMT_P016;
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frames_ctx->sw_format = chroma_444 ? AV_PIX_FMT_YUV444P16 : AV_PIX_FMT_P016;
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break;
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default:
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return AVERROR(EINVAL);
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@ -131,6 +131,17 @@ static int nvdec_hevc_start_frame(AVCodecContext *avctx,
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.IdrPicFlag = IS_IDR(s),
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.bit_depth_luma_minus8 = sps->bit_depth - 8,
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.bit_depth_chroma_minus8 = sps->bit_depth - 8,
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#if NVDECAPI_CHECK_VERSION(9, 0)
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.sps_range_extension_flag = sps->sps_range_extension_flag,
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.transform_skip_rotation_enabled_flag = sps->transform_skip_rotation_enabled_flag,
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.transform_skip_context_enabled_flag = sps->transform_skip_context_enabled_flag,
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.implicit_rdpcm_enabled_flag = sps->implicit_rdpcm_enabled_flag,
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.explicit_rdpcm_enabled_flag = sps->explicit_rdpcm_enabled_flag,
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.extended_precision_processing_flag = sps->extended_precision_processing_flag,
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.intra_smoothing_disabled_flag = sps->intra_smoothing_disabled_flag,
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.persistent_rice_adaptation_enabled_flag = sps->persistent_rice_adaptation_enabled_flag,
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.cabac_bypass_alignment_enabled_flag = sps->cabac_bypass_alignment_enabled_flag,
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#endif
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.dependent_slice_segments_enabled_flag = pps->dependent_slice_segments_enabled_flag,
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.slice_segment_header_extension_present_flag = pps->slice_header_extension_present_flag,
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@ -164,6 +175,13 @@ static int nvdec_hevc_start_frame(AVCodecContext *avctx,
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.uniform_spacing_flag = pps->uniform_spacing_flag,
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.num_tile_columns_minus1 = pps->num_tile_columns - 1,
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.num_tile_rows_minus1 = pps->num_tile_rows - 1,
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#if NVDECAPI_CHECK_VERSION(9, 0)
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.pps_range_extension_flag = pps->pps_range_extensions_flag,
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.cross_component_prediction_enabled_flag = pps->cross_component_prediction_enabled_flag,
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.chroma_qp_offset_list_enabled_flag = pps->chroma_qp_offset_list_enabled_flag,
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.diff_cu_chroma_qp_offset_depth = pps->diff_cu_chroma_qp_offset_depth,
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.chroma_qp_offset_list_len_minus1 = pps->chroma_qp_offset_list_len_minus1,
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#endif
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.NumBitsForShortTermRPSInSlice = s->sh.short_term_rps ? s->sh.short_term_ref_pic_set_size : 0,
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.NumDeltaPocsOfRefRpsIdx = s->sh.short_term_rps ? s->sh.short_term_rps->rps_idx_num_delta_pocs : 0,
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@ -185,6 +203,18 @@ static int nvdec_hevc_start_frame(AVCodecContext *avctx,
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for (i = 0; i < pps->num_tile_rows; i++)
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ppc->row_height_minus1[i] = pps->row_height[i] - 1;
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#if NVDECAPI_CHECK_VERSION(9, 0)
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if (pps->chroma_qp_offset_list_len_minus1 > FF_ARRAY_ELEMS(ppc->cb_qp_offset_list) ||
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pps->chroma_qp_offset_list_len_minus1 > FF_ARRAY_ELEMS(ppc->cr_qp_offset_list)) {
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av_log(avctx, AV_LOG_ERROR, "Too many chroma_qp_offsets\n");
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return AVERROR(ENOSYS);
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}
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for (i = 0; i <= pps->chroma_qp_offset_list_len_minus1; i++) {
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ppc->cb_qp_offset_list[i] = pps->cb_qp_offset_list[i];
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ppc->cr_qp_offset_list[i] = pps->cr_qp_offset_list[i];
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}
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#endif
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if (s->rps[LT_CURR].nb_refs > FF_ARRAY_ELEMS(ppc->RefPicSetLtCurr) ||
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s->rps[ST_CURR_BEF].nb_refs > FF_ARRAY_ELEMS(ppc->RefPicSetStCurrBefore) ||
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s->rps[ST_CURR_AFT].nb_refs > FF_ARRAY_ELEMS(ppc->RefPicSetStCurrAfter)) {
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