mirror of https://git.ffmpeg.org/ffmpeg.git
MMX, MMX2, SSE2 and SSSE3 optimizations for pred16x16/8x8_plane H264 intra
prediction (plus some with different rounding for svq3/rv40). Speedup (for SSSE3) about ~6-fold, 3.6% faster overall with cathedral sample. Originally committed as revision 25361 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Ronald S. Bultje
parent
2f412421e8
commit
dd68d4db43
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@ -48,6 +48,7 @@ DECLARE_ALIGNED(16, const xmm_reg, ff_pw_8 ) = {0x0008000800080008ULL, 0x00080
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DECLARE_ALIGNED(16, const xmm_reg, ff_pw_9 ) = {0x0009000900090009ULL, 0x0009000900090009ULL};
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DECLARE_ALIGNED(8, const uint64_t, ff_pw_15 ) = 0x000F000F000F000FULL;
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DECLARE_ALIGNED(16, const xmm_reg, ff_pw_16 ) = {0x0010001000100010ULL, 0x0010001000100010ULL};
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DECLARE_ALIGNED(16, const xmm_reg, ff_pw_17 ) = {0x0011001100110011ULL, 0x0011001100110011ULL};
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DECLARE_ALIGNED(16, const xmm_reg, ff_pw_18 ) = {0x0012001200120012ULL, 0x0012001200120012ULL};
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DECLARE_ALIGNED(8, const uint64_t, ff_pw_20 ) = 0x0014001400140014ULL;
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DECLARE_ALIGNED(16, const xmm_reg, ff_pw_27 ) = {0x001B001B001B001BULL, 0x001B001B001B001BULL};
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@ -24,11 +24,23 @@
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SECTION_RODATA
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tm_shuf: times 8 db 0x03, 0x80
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plane_shuf: db -8, -7, -6, -5, -4, -3, -2, -1
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db 1, 2, 3, 4, 5, 6, 7, 8
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plane8_shuf: db -4, -3, -2, -1, 0, 0, 0, 0
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db 1, 2, 3, 4, 0, 0, 0, 0
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pw_0to7: dw 0, 1, 2, 3, 4, 5, 6, 7
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pw_1to8: dw 1, 2, 3, 4, 5, 6, 7, 8
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pw_m8tom1: dw -8, -7, -6, -5, -4, -3, -2, -1
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pw_m4to4: dw -4, -3, -2, -1, 1, 2, 3, 4
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SECTION .text
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cextern pb_1
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cextern pb_3
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cextern pw_5
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cextern pw_16
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cextern pw_17
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cextern pw_32
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;-----------------------------------------------------------------------------
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; void pred16x16_vertical(uint8_t *src, int stride)
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@ -265,6 +277,498 @@ cglobal pred16x16_tm_vp8_sse2, 2,6,6
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jg .loop
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REP_RET
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;-----------------------------------------------------------------------------
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; void pred16x16_plane(uint8_t *src, int stride)
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;-----------------------------------------------------------------------------
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%macro H264_PRED16x16_PLANE 3
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cglobal pred16x16_plane_%3_%1, 2, 7, %2
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mov r2, r1 ; +stride
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neg r1 ; -stride
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movh m0, [r0+r1 -1]
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%if mmsize == 8
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pxor m4, m4
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movh m1, [r0+r1 +3 ]
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movh m2, [r0+r1 +8 ]
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movh m3, [r0+r1 +12]
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punpcklbw m0, m4
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punpcklbw m1, m4
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punpcklbw m2, m4
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punpcklbw m3, m4
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pmullw m0, [pw_m8tom1 ]
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pmullw m1, [pw_m8tom1+8]
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pmullw m2, [pw_1to8 ]
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pmullw m3, [pw_1to8 +8]
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paddw m0, m2
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paddw m1, m3
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%else ; mmsize == 16
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%ifidn %1, sse2
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pxor m2, m2
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movh m1, [r0+r1 +8]
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punpcklbw m0, m2
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punpcklbw m1, m2
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pmullw m0, [pw_m8tom1]
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pmullw m1, [pw_1to8]
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paddw m0, m1
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%else ; ssse3
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movhps m0, [r0+r1 +8]
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pmaddubsw m0, [plane_shuf] ; H coefficients
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%endif
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movhlps m1, m0
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%endif
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paddw m0, m1
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%ifidn %1, mmx
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mova m1, m0
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psrlq m1, 32
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%elifidn %1, mmx2
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pshufw m1, m0, 0xE
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%else ; mmsize == 16
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pshuflw m1, m0, 0xE
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%endif
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paddw m0, m1
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%ifidn %1, mmx
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mova m1, m0
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psrlq m1, 16
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%elifidn %1, mmx2
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pshufw m1, m0, 0x1
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%else
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pshuflw m1, m0, 0x1
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%endif
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paddw m0, m1 ; sum of H coefficients
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%ifidn %3, h264
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pmullw m0, [pw_5]
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paddw m0, [pw_32]
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psraw m0, 6
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%elifidn %3, rv40
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pmullw m0, [pw_5]
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psraw m0, 6
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%elifidn %3, svq3
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movd r3, m0
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movsx r3, r3w
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test r3, r3
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lea r4, [r3+3]
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cmovs r3, r4
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sar r3, 2 ; H/4
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lea r3, [r3*5] ; 5*(H/4)
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test r3, r3
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lea r4, [r3+15]
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cmovs r3, r4
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sar r3, 4 ; (5*(H/4))/16
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movd m0, r3d
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%endif
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lea r4, [r0+r2*8-1]
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lea r3, [r0+r2*4-1]
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add r4, r2
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%ifdef ARCH_X86_64
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%define e_reg r11
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%else
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%define e_reg r0
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%endif
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movzx e_reg, byte [r3+r2*2 ]
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movzx r5, byte [r4+r1 ]
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sub r5, e_reg
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movzx e_reg, byte [r3+r2 ]
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movzx r6, byte [r4 ]
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sub r6, e_reg
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lea r5, [r5+r6*2]
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movzx e_reg, byte [r3+r1 ]
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movzx r6, byte [r4+r2*2 ]
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sub r6, e_reg
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lea r5, [r5+r6*4]
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movzx e_reg, byte [r3 ]
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%ifdef ARCH_X86_64
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movzx r10, byte [r4+r2 ]
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sub r10, e_reg
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%else
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movzx r6, byte [r4+r2 ]
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sub r6, e_reg
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lea r5, [r5+r6*4]
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sub r5, r6
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%endif
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lea e_reg, [r3+r1*4]
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lea r3, [r4+r2*4]
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movzx r4, byte [e_reg+r2 ]
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movzx r6, byte [r3 ]
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sub r6, r4
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%ifdef ARCH_X86_64
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lea r6, [r10+r6*2]
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lea r5, [r5+r6*2]
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add r5, r6
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%else
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lea r5, [r5+r6*4]
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lea r5, [r5+r6*2]
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%endif
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movzx r4, byte [e_reg ]
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%ifdef ARCH_X86_64
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movzx r10, byte [r3 +r2 ]
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sub r10, r4
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sub r5, r10
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%else
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movzx r6, byte [r3 +r2 ]
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sub r6, r4
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lea r5, [r5+r6*8]
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sub r5, r6
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%endif
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movzx r4, byte [e_reg+r1 ]
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movzx r6, byte [r3 +r2*2]
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sub r6, r4
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%ifdef ARCH_X86_64
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add r6, r10
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%endif
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lea r5, [r5+r6*8]
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movzx r4, byte [e_reg+r2*2]
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movzx r6, byte [r3 +r1 ]
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sub r6, r4
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lea r5, [r5+r6*4]
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add r5, r6 ; sum of V coefficients
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%ifndef ARCH_X86_64
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mov r0, r0m
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%endif
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%ifidn %3, h264
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lea r5, [r5*5+32]
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sar r5, 6
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%elifidn %3, rv40
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lea r5, [r5*5]
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sar r5, 6
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%elifidn %3, svq3
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test r5, r5
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lea r6, [r5+3]
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cmovs r5, r6
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sar r5, 2 ; V/4
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lea r5, [r5*5] ; 5*(V/4)
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test r5, r5
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lea r6, [r5+15]
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cmovs r5, r6
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sar r5, 4 ; (5*(V/4))/16
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%endif
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movzx r4, byte [r0+r1 +15]
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movzx r3, byte [r3+r2*2 ]
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lea r3, [r3+r4+1]
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shl r3, 4
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movd r1d, m0
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movsx r1d, r1w
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add r1d, r5d
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add r3d, r1d
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shl r1d, 3
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sub r3d, r1d ; a
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movd m1, r5d
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movd m3, r3d
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%ifidn %1, mmx
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punpcklwd m0, m0
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punpcklwd m1, m1
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punpcklwd m3, m3
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punpckldq m0, m0
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punpckldq m1, m1
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punpckldq m3, m3
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%elifidn %1, mmx2
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pshufw m0, m0, 0x0
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pshufw m1, m1, 0x0
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pshufw m3, m3, 0x0
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%else
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pshuflw m0, m0, 0x0
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pshuflw m1, m1, 0x0
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pshuflw m3, m3, 0x0
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punpcklqdq m0, m0 ; splat H (words)
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punpcklqdq m1, m1 ; splat V (words)
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punpcklqdq m3, m3 ; splat a (words)
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%endif
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%ifidn %3, svq3
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SWAP 0, 1
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%endif
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mova m2, m0
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%if mmsize == 8
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mova m5, m0
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%endif
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pmullw m0, [pw_0to7] ; 0*H, 1*H, ..., 7*H (words)
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%if mmsize == 16
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psllw m2, 3
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%else
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psllw m5, 3
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psllw m2, 2
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mova m6, m5
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paddw m6, m2
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%endif
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paddw m0, m3 ; a + {0,1,2,3,4,5,6,7}*H
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paddw m2, m0 ; a + {8,9,10,11,12,13,14,15}*H
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%if mmsize == 8
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paddw m5, m0 ; a + {8,9,10,11}*H
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paddw m6, m0 ; a + {12,13,14,15}*H
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%endif
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mov r4, 8
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.loop
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mova m3, m0 ; b[0..7]
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mova m4, m2 ; b[8..15]
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psraw m3, 5
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psraw m4, 5
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packuswb m3, m4
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mova [r0], m3
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%if mmsize == 8
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mova m3, m5 ; b[8..11]
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mova m4, m6 ; b[12..15]
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psraw m3, 5
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psraw m4, 5
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packuswb m3, m4
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mova [r0+8], m3
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%endif
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paddw m0, m1
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paddw m2, m1
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%if mmsize == 8
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paddw m5, m1
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paddw m6, m1
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%endif
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mova m3, m0 ; b[0..7]
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mova m4, m2 ; b[8..15]
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psraw m3, 5
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psraw m4, 5
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packuswb m3, m4
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mova [r0+r2], m3
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%if mmsize == 8
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mova m3, m5 ; b[8..11]
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mova m4, m6 ; b[12..15]
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psraw m3, 5
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psraw m4, 5
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packuswb m3, m4
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mova [r0+r2+8], m3
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%endif
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paddw m0, m1
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paddw m2, m1
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%if mmsize == 8
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paddw m5, m1
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paddw m6, m1
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%endif
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lea r0, [r0+r2*2]
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dec r4
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jg .loop
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REP_RET
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%endmacro
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INIT_MMX
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H264_PRED16x16_PLANE mmx, 0, h264
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H264_PRED16x16_PLANE mmx, 0, rv40
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H264_PRED16x16_PLANE mmx, 0, svq3
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H264_PRED16x16_PLANE mmx2, 0, h264
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H264_PRED16x16_PLANE mmx2, 0, rv40
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H264_PRED16x16_PLANE mmx2, 0, svq3
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INIT_XMM
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H264_PRED16x16_PLANE sse2, 8, h264
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H264_PRED16x16_PLANE sse2, 8, rv40
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H264_PRED16x16_PLANE sse2, 8, svq3
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H264_PRED16x16_PLANE ssse3, 8, h264
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H264_PRED16x16_PLANE ssse3, 8, rv40
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H264_PRED16x16_PLANE ssse3, 8, svq3
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;-----------------------------------------------------------------------------
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; void pred8x8_plane(uint8_t *src, int stride)
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;-----------------------------------------------------------------------------
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%macro H264_PRED8x8_PLANE 2
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cglobal pred8x8_plane_%1, 2, 7, %2
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mov r2, r1 ; +stride
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neg r1 ; -stride
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movd m0, [r0+r1 -1]
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%if mmsize == 8
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pxor m2, m2
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movh m1, [r0+r1 +4 ]
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punpcklbw m0, m2
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punpcklbw m1, m2
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pmullw m0, [pw_m4to4]
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pmullw m1, [pw_m4to4+8]
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%else ; mmsize == 16
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%ifidn %1, sse2
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pxor m2, m2
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movd m1, [r0+r1 +4]
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punpckldq m0, m1
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punpcklbw m0, m2
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pmullw m0, [pw_m4to4]
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%else ; ssse3
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movhps m0, [r0+r1 +4] ; this reads 4 bytes more than necessary
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pmaddubsw m0, [plane8_shuf] ; H coefficients
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%endif
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movhlps m1, m0
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%endif
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paddw m0, m1
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%ifnidn %1, ssse3
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%ifidn %1, mmx
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mova m1, m0
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psrlq m1, 32
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%elifidn %1, mmx2
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pshufw m1, m0, 0xE
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%else ; mmsize == 16
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pshuflw m1, m0, 0xE
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%endif
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paddw m0, m1
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%endif ; !ssse3
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%ifidn %1, mmx
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mova m1, m0
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psrlq m1, 16
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%elifidn %1, mmx2
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pshufw m1, m0, 0x1
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%else
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pshuflw m1, m0, 0x1
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%endif
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paddw m0, m1 ; sum of H coefficients
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pmullw m0, [pw_17]
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paddw m0, [pw_16]
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psraw m0, 5
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lea r4, [r0+r2*4-1]
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lea r3, [r0 -1]
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add r4, r2
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%ifdef ARCH_X86_64
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%define e_reg r11
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%else
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%define e_reg r0
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%endif
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movzx e_reg, byte [r3+r2*2 ]
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movzx r5, byte [r4+r1 ]
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sub r5, e_reg
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movzx e_reg, byte [r3 ]
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%ifdef ARCH_X86_64
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movzx r10, byte [r4+r2 ]
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sub r10, e_reg
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sub r5, r10
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%else
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movzx r6, byte [r4+r2 ]
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sub r6, e_reg
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lea r5, [r5+r6*4]
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sub r5, r6
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%endif
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movzx e_reg, byte [r3+r1 ]
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movzx r6, byte [r4+r2*2 ]
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sub r6, e_reg
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%ifdef ARCH_X86_64
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add r6, r10
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%endif
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lea r5, [r5+r6*4]
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movzx e_reg, byte [r3+r2 ]
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movzx r6, byte [r4 ]
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sub r6, e_reg
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lea r6, [r5+r6*2]
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lea r5, [r6*9+16]
|
||||
lea r5, [r5+r6*8]
|
||||
sar r5, 5
|
||||
|
||||
%ifndef ARCH_X86_64
|
||||
mov r0, r0m
|
||||
%endif
|
||||
|
||||
movzx r3, byte [r4+r2*2 ]
|
||||
movzx r4, byte [r0+r1 +7]
|
||||
lea r3, [r3+r4+1]
|
||||
shl r3, 4
|
||||
movd r1d, m0
|
||||
movsx r1d, r1w
|
||||
add r1d, r5d
|
||||
sub r3d, r1d
|
||||
add r1d, r1d
|
||||
sub r3d, r1d ; a
|
||||
|
||||
movd m1, r5d
|
||||
movd m3, r3d
|
||||
%ifidn %1, mmx
|
||||
punpcklwd m0, m0
|
||||
punpcklwd m1, m1
|
||||
punpcklwd m3, m3
|
||||
punpckldq m0, m0
|
||||
punpckldq m1, m1
|
||||
punpckldq m3, m3
|
||||
%elifidn %1, mmx2
|
||||
pshufw m0, m0, 0x0
|
||||
pshufw m1, m1, 0x0
|
||||
pshufw m3, m3, 0x0
|
||||
%else
|
||||
pshuflw m0, m0, 0x0
|
||||
pshuflw m1, m1, 0x0
|
||||
pshuflw m3, m3, 0x0
|
||||
punpcklqdq m0, m0 ; splat H (words)
|
||||
punpcklqdq m1, m1 ; splat V (words)
|
||||
punpcklqdq m3, m3 ; splat a (words)
|
||||
%endif
|
||||
%if mmsize == 8
|
||||
mova m2, m0
|
||||
%endif
|
||||
pmullw m0, [pw_0to7] ; 0*H, 1*H, ..., 7*H (words)
|
||||
paddw m0, m3 ; a + {0,1,2,3,4,5,6,7}*H
|
||||
%if mmsize == 8
|
||||
psllw m2, 2
|
||||
paddw m2, m0 ; a + {4,5,6,7}*H
|
||||
%endif
|
||||
|
||||
mov r4, 4
|
||||
ALIGN 16
|
||||
.loop
|
||||
%if mmsize == 16
|
||||
mova m3, m0 ; b[0..7]
|
||||
paddw m0, m1
|
||||
psraw m3, 5
|
||||
mova m4, m0 ; V+b[0..7]
|
||||
paddw m0, m1
|
||||
psraw m4, 5
|
||||
packuswb m3, m4
|
||||
movh [r0], m3
|
||||
movhps [r0+r2], m3
|
||||
%else ; mmsize == 8
|
||||
mova m3, m0 ; b[0..3]
|
||||
mova m4, m2 ; b[4..7]
|
||||
paddw m0, m1
|
||||
paddw m2, m1
|
||||
psraw m3, 5
|
||||
psraw m4, 5
|
||||
mova m5, m0 ; V+b[0..3]
|
||||
mova m6, m2 ; V+b[4..7]
|
||||
paddw m0, m1
|
||||
paddw m2, m1
|
||||
psraw m5, 5
|
||||
psraw m6, 5
|
||||
packuswb m3, m4
|
||||
packuswb m5, m6
|
||||
mova [r0], m3
|
||||
mova [r0+r2], m5
|
||||
%endif
|
||||
|
||||
lea r0, [r0+r2*2]
|
||||
dec r4
|
||||
jg .loop
|
||||
REP_RET
|
||||
%endmacro
|
||||
|
||||
INIT_MMX
|
||||
H264_PRED8x8_PLANE mmx, 0
|
||||
H264_PRED8x8_PLANE mmx2, 0
|
||||
INIT_XMM
|
||||
H264_PRED8x8_PLANE sse2, 8
|
||||
H264_PRED8x8_PLANE ssse3, 8
|
||||
|
||||
;-----------------------------------------------------------------------------
|
||||
; void pred8x8_vertical(uint8_t *src, int stride)
|
||||
;-----------------------------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -29,6 +29,18 @@ void ff_pred16x16_horizontal_ssse3 (uint8_t *src, int stride);
|
|||
void ff_pred16x16_dc_mmxext (uint8_t *src, int stride);
|
||||
void ff_pred16x16_dc_sse2 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_dc_ssse3 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_h264_mmx (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_h264_mmx2 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_h264_sse2 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_h264_ssse3 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_rv40_mmx (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_rv40_mmx2 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_rv40_sse2 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_rv40_ssse3 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_svq3_mmx (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_svq3_mmx2 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_svq3_sse2 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_plane_svq3_ssse3 (uint8_t *src, int stride);
|
||||
void ff_pred16x16_tm_vp8_mmx (uint8_t *src, int stride);
|
||||
void ff_pred16x16_tm_vp8_mmxext (uint8_t *src, int stride);
|
||||
void ff_pred16x16_tm_vp8_sse2 (uint8_t *src, int stride);
|
||||
|
|
@ -37,6 +49,10 @@ void ff_pred8x8_vertical_mmx (uint8_t *src, int stride);
|
|||
void ff_pred8x8_horizontal_mmx (uint8_t *src, int stride);
|
||||
void ff_pred8x8_horizontal_mmxext (uint8_t *src, int stride);
|
||||
void ff_pred8x8_horizontal_ssse3 (uint8_t *src, int stride);
|
||||
void ff_pred8x8_plane_mmx (uint8_t *src, int stride);
|
||||
void ff_pred8x8_plane_mmx2 (uint8_t *src, int stride);
|
||||
void ff_pred8x8_plane_sse2 (uint8_t *src, int stride);
|
||||
void ff_pred8x8_plane_ssse3 (uint8_t *src, int stride);
|
||||
void ff_pred8x8_tm_vp8_mmx (uint8_t *src, int stride);
|
||||
void ff_pred8x8_tm_vp8_mmxext (uint8_t *src, int stride);
|
||||
void ff_pred8x8_tm_vp8_sse2 (uint8_t *src, int stride);
|
||||
|
|
@ -61,6 +77,15 @@ void ff_h264_pred_init_x86(H264PredContext *h, int codec_id)
|
|||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_tm_vp8_mmx;
|
||||
h->pred8x8 [PLANE_PRED8x8] = ff_pred8x8_tm_vp8_mmx;
|
||||
h->pred4x4 [TM_VP8_PRED ] = ff_pred4x4_tm_vp8_mmx;
|
||||
} else {
|
||||
h->pred8x8 [PLANE_PRED8x8] = ff_pred8x8_plane_mmx;
|
||||
if (codec_id == CODEC_ID_SVQ3) {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_svq3_mmx;
|
||||
} else if (codec_id == CODEC_ID_RV40) {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_rv40_mmx;
|
||||
} else {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_h264_mmx;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -75,6 +100,15 @@ void ff_h264_pred_init_x86(H264PredContext *h, int codec_id)
|
|||
h->pred8x8 [PLANE_PRED8x8] = ff_pred8x8_tm_vp8_mmxext;
|
||||
h->pred4x4 [TM_VP8_PRED ] = ff_pred4x4_tm_vp8_mmxext;
|
||||
h->pred4x4 [VERT_PRED ] = ff_pred4x4_vertical_vp8_mmxext;
|
||||
} else {
|
||||
h->pred8x8 [PLANE_PRED8x8] = ff_pred8x8_plane_mmx2;
|
||||
if (codec_id == CODEC_ID_SVQ3) {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_svq3_mmx2;
|
||||
} else if (codec_id == CODEC_ID_RV40) {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_rv40_mmx2;
|
||||
} else {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_h264_mmx2;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -87,6 +121,15 @@ void ff_h264_pred_init_x86(H264PredContext *h, int codec_id)
|
|||
if (codec_id == CODEC_ID_VP8) {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_tm_vp8_sse2;
|
||||
h->pred8x8 [PLANE_PRED8x8] = ff_pred8x8_tm_vp8_sse2;
|
||||
} else {
|
||||
h->pred8x8 [PLANE_PRED8x8] = ff_pred8x8_plane_sse2;
|
||||
if (codec_id == CODEC_ID_SVQ3) {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_svq3_sse2;
|
||||
} else if (codec_id == CODEC_ID_RV40) {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_rv40_sse2;
|
||||
} else {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_h264_sse2;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -97,6 +140,15 @@ void ff_h264_pred_init_x86(H264PredContext *h, int codec_id)
|
|||
if (codec_id == CODEC_ID_VP8) {
|
||||
h->pred8x8 [PLANE_PRED8x8] = ff_pred8x8_tm_vp8_ssse3;
|
||||
h->pred4x4 [TM_VP8_PRED ] = ff_pred4x4_tm_vp8_ssse3;
|
||||
} else {
|
||||
h->pred8x8 [PLANE_PRED8x8] = ff_pred8x8_plane_ssse3;
|
||||
if (codec_id == CODEC_ID_SVQ3) {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_svq3_ssse3;
|
||||
} else if (codec_id == CODEC_ID_RV40) {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_rv40_ssse3;
|
||||
} else {
|
||||
h->pred16x16[PLANE_PRED8x8] = ff_pred16x16_plane_h264_ssse3;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue