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avcodec/x86/hevc_mc: add qpel_h8_8_avx512icl and qpel_hv8_8_avx512icl
This commit uses the instruction `vpdpbusd` introduced by AVX512 VNNI to calculate the horizontal filter. ff_hevc_put_hevc_qpel_h8_8_sse4 1039169 ff_hevc_put_hevc_qpel_h8_8_avx512icl 677153 ff_hevc_put_hevc_qpel_hv8_8_sse4 3603511 ff_hevc_put_hevc_qpel_hv8_8_avx512icl 2995354 Reviewed-by: Henrik Gramner <henrik@gramner.com> Signed-off-by: Wu Jianhua <jianhua.wu@intel.com>
This commit is contained in:
Wu Jianhua
Haihao Xiang
parent
fe85afbf8c
commit
d4cd8830bd
@ -87,6 +87,26 @@ QPEL_TABLE 12, 4, w, sse4
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QPEL_TABLE 8,16, b, avx2
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QPEL_TABLE 10, 8, w, avx2
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QPEL_TABLE 8, 1, b, avx512icl_h
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QPEL_TABLE 8, 1, d, avx512icl_v
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pb_qpel_shuffle_index: db 0, 1, 2, 3
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db 1, 2, 3, 4
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db 2, 3, 4, 5
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db 3, 4, 5, 6
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db 4, 5, 6, 7
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db 5, 6, 7, 8
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db 6, 7, 8, 9
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db 7, 8, 9, 10
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db 4, 5, 6, 7
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db 5, 6, 7, 8
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db 6, 7, 8, 9
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db 7, 8, 9, 10
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db 8, 9, 10, 11
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db 9, 10, 11, 12
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db 10, 11, 12, 13
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db 11, 12, 13, 14
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SECTION .text
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%define MAX_PB_SIZE 64
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@ -1670,3 +1690,120 @@ HEVC_PUT_HEVC_QPEL_HV 16, 10
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%endif ;AVX2
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%endif ; ARCH_X86_64
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%macro QPEL_FILTER_H 5
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%define %%table hevc_qpel_filters_avx512icl_h_%1
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%assign %%offset 4
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dec %2q
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shl %2q, 3
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%ifdef PIC
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lea %5q, [%%table]
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%define FILTER %5q
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%else
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%define FILTER %%table
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%endif
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vpbroadcastd m%3, [FILTER + %2q + 0*%%offset]
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vpbroadcastd m%4, [FILTER + %2q + 1*%%offset]
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%endmacro
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%macro QPEL_FILTER_V 5
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vpbroadcastd m%3, [%5 + %2q + 4*%4]
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%endmacro
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%macro QPEL_LOAD_SHUF 2
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movu m%1, [pb_qpel_shuffle_index + 0]
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movu m%2, [pb_qpel_shuffle_index + 32]
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%endmacro
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; required: m0-m5
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; %1: dst register index
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; %2: name for src
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%macro QPEL_H_LOAD_COMPUTE 2
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pxor m%1, m%1
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movu xm4, [%2q - 3]
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vpermb m5, m2, m4
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vpermb m4, m3, m4
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vpdpbusd m%1, m5, m0
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vpdpbusd m%1, m4, m1
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%endmacro
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%macro HEVC_PUT_HEVC_QPEL_AVX512ICL 2
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cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 8, dst, src, srcstride, height, mx, tmp
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QPEL_FILTER_H %1, mx, 0, 1, tmp
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QPEL_LOAD_SHUF 2, 3
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.loop:
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QPEL_H_LOAD_COMPUTE 6, src
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vpmovdw [dstq], m6
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LOOP_END dst, src, srcstride
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RET
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%endmacro
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%macro HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 2
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cglobal hevc_put_hevc_qpel_hv%1_%2, 6, 7, 27, dst, src, srcstride, height, mx, my, tmp
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%assign %%shift 6
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%assign %%extra 7
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QPEL_FILTER_H %1, mx, 0, 1, tmp
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QPEL_LOAD_SHUF 2, 3
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lea tmpq, [srcstrideq*3]
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sub srcq, tmpq
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sub myq, 1
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shl myq, 5
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%ifdef PIC
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%define %%table hevc_qpel_filters_avx512icl_v_%1
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lea tmpq, [%%table]
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%define FILTER tmpq
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%else
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%define FILTER %%table
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%endif
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%assign %%i 6
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%assign %%j 0
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%rep %1
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QPEL_FILTER_V %1, my, %%i, %%j, FILTER
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%assign %%i %%i+1
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%assign %%j %%j+1
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%endrep
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%rep %%extra
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QPEL_H_LOAD_COMPUTE %%i, src
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add srcq, srcstrideq
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%assign %%i %%i+1
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%endrep
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.loop:
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QPEL_H_LOAD_COMPUTE %%i, src
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vpmulld m22, m14, m6
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vpmulld m23, m15, m7
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vpmulld m24, m16, m8
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vpmulld m25, m17, m9
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vpaddd m26, m22, m23
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vpaddd m24, m25
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vpaddd m26, m24
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vpmulld m22, m18, m10
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vpmulld m23, m19, m11
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vpmulld m24, m20, m12
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vpmulld m25, m21, m13
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vpaddd m22, m22, m23
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vpaddd m24, m25
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vpaddd m26, m24
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vpaddd m22, m26
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mova m14, m15
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mova m15, m16
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mova m16, m17
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mova m17, m18
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mova m18, m19
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mova m19, m20
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mova m20, m21
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vpsrad m22, %%shift
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vpmovdw [dstq], m22
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LOOP_END dst, src, srcstride
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RET
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%endmacro
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%if ARCH_X86_64
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%if HAVE_AVX512ICL_EXTERNAL
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INIT_YMM avx512icl
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HEVC_PUT_HEVC_QPEL_AVX512ICL 8, 8
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HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 8, 8
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%endif
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%endif
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@ -233,6 +233,9 @@ WEIGHTING_PROTOTYPES(8, sse4);
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WEIGHTING_PROTOTYPES(10, sse4);
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WEIGHTING_PROTOTYPES(12, sse4);
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void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
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void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
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///////////////////////////////////////////////////////////////////////////////
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// TRANSFORM_ADD
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///////////////////////////////////////////////////////////////////////////////
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@ -878,6 +878,10 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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c->add_residual[3] = ff_hevc_add_residual_32_8_avx2;
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}
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if (EXTERNAL_AVX512ICL(cpu_flags) && ARCH_X86_64) {
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c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl;
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c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl;
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}
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} else if (bit_depth == 10) {
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if (EXTERNAL_MMXEXT(cpu_flags)) {
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c->add_residual[0] = ff_hevc_add_residual_4_10_mmxext;
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