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lavu/floatdsp: RISC-V V vector_dmac_scalar
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@ -34,6 +34,8 @@ void ff_vector_fmul_scalar_rvv(float *dst, const float *src, float mul,
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void ff_vector_dmul_rvv(double *dst, const double *src0, const double *src1,
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int len);
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void ff_vector_dmac_scalar_rvv(double *dst, const double *src, double mul,
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int len);
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void ff_vector_dmul_scalar_rvv(double *dst, const double *src, double mul,
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int len);
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@ -50,6 +52,7 @@ av_cold void ff_float_dsp_init_riscv(AVFloatDSPContext *fdsp)
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if (flags & AV_CPU_FLAG_RVV_F64) {
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fdsp->vector_dmul = ff_vector_dmul_rvv;
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fdsp->vector_dmac_scalar = ff_vector_dmac_scalar_rvv;
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fdsp->vector_dmul_scalar = ff_vector_dmul_scalar_rvv;
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}
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#endif
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@ -91,6 +91,24 @@ func ff_vector_dmul_rvv, zve64d
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ret
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endfunc
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// (a0) += (a1) * fa0 [0..a2-1]
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func ff_vector_dmac_scalar_rvv, zve64d
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NOHWD fmv.d.x fa0, a2
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NOHWD mv a2, a3
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1:
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vsetvli t0, a2, e64, m1, ta, ma
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vle64.v v24, (a1)
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sub a2, a2, t0
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vle64.v v16, (a0)
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sh3add a1, t0, a1
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vfmacc.vf v16, fa0, v24
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vse64.v v16, (a0)
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sh3add a0, t0, a0
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bnez a2, 1b
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ret
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endfunc
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// (a0) = (a1) * fa0 [0..a2-1]
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func ff_vector_dmul_scalar_rvv, zve64d
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NOHWD fmv.d.x fa0, a2
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