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checkasm/riscv: test misaligned before V 

Otherwise V functions mask scalar misaligned ones.
This commit is contained in:
Rémi Denis-Courmont 2024-05-21 20:50:03 +03:00
parent 0920f506a7
commit d03cdfa2b6
1 changed files with 1 additions and 1 deletions
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2
tests/checkasm/checkasm.c
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@ -281,6 +281,7 @@ static const struct {
{ "POWER8", "power8", AV_CPU_FLAG_POWER8 }, { "POWER8", "power8", AV_CPU_FLAG_POWER8 },
#elif ARCH_RISCV #elif ARCH_RISCV
{ "RVI", "rvi", AV_CPU_FLAG_RVI }, { "RVI", "rvi", AV_CPU_FLAG_RVI },
{ "misaligned", "misaligned", AV_CPU_FLAG_RV_MISALIGNED },
{ "RVF", "rvf", AV_CPU_FLAG_RVF }, { "RVF", "rvf", AV_CPU_FLAG_RVF },
{ "RVD", "rvd", AV_CPU_FLAG_RVD }, { "RVD", "rvd", AV_CPU_FLAG_RVD },
{ "RVBaddr", "rvb_a", AV_CPU_FLAG_RVB_ADDR }, { "RVBaddr", "rvb_a", AV_CPU_FLAG_RVB_ADDR },
@ -290,7 +291,6 @@ static const struct {
{ "RVVi64", "rvv_i64", AV_CPU_FLAG_RVV_I64 }, { "RVVi64", "rvv_i64", AV_CPU_FLAG_RVV_I64 },
{ "RVVf64", "rvv_f64", AV_CPU_FLAG_RVV_F64 }, { "RVVf64", "rvv_f64", AV_CPU_FLAG_RVV_F64 },
{ "RV_Zvbb", "rv_zvbb", AV_CPU_FLAG_RV_ZVBB }, { "RV_Zvbb", "rv_zvbb", AV_CPU_FLAG_RV_ZVBB },
{ "misaligned", "misaligned", AV_CPU_FLAG_RV_MISALIGNED },
#elif ARCH_MIPS #elif ARCH_MIPS
{ "MMI", "mmi", AV_CPU_FLAG_MMI }, { "MMI", "mmi", AV_CPU_FLAG_MMI },
{ "MSA", "msa", AV_CPU_FLAG_MSA }, { "MSA", "msa", AV_CPU_FLAG_MSA },