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Merge commit '87552d54d3337c3241e8a9e1a05df16eaa821496'
* commit '87552d54d3337c3241e8a9e1a05df16eaa821496': armv6: Accelerate ff_fft_calc for general case (nbits != 4) Merged-by: Michael Niedermayer <michaelni@gmx.at>
This commit is contained in:
Michael Niedermayer
commit
c27adb37ef
@ -23,6 +23,8 @@
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#include "libavcodec/rdft.h"
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#include "libavcodec/synth_filter.h"
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void ff_fft_calc_vfp(FFTContext *s, FFTComplex *z);
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void ff_fft_permute_neon(FFTContext *s, FFTComplex *z);
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void ff_fft_calc_neon(FFTContext *s, FFTComplex *z);
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@ -38,10 +40,10 @@ av_cold void ff_fft_init_arm(FFTContext *s)
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{
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int cpu_flags = av_get_cpu_flags();
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if (have_vfp(cpu_flags)) {
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if (have_vfp(cpu_flags) && !have_vfpv3(cpu_flags)) {
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s->fft_calc = ff_fft_calc_vfp;
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#if CONFIG_MDCT
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if (!have_vfpv3(cpu_flags))
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s->imdct_half = ff_imdct_half_vfp;
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s->imdct_half = ff_imdct_half_vfp;
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#endif
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}
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@ -21,8 +21,39 @@
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#include "libavutil/arm/asm.S"
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@ TODO: * FFTs wider than 16
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@ * dispatch code
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@ The fftx_internal_vfp versions of the functions obey a modified AAPCS:
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@ VFP is in RunFast mode, vector length 4, stride 1 thoroughout, and
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@ all single-precision VFP registers may be corrupted on exit. The a2
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@ register may not be clobbered in these functions, as it holds the
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@ stored original FPSCR.
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function ff_fft_calc_vfp, export=1
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ldr ip, [a1, #0] @ nbits
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mov a1, a2
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A ldr pc, [pc, ip, lsl #2]
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A .word 0
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A .word 0
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A .word 0
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T movrel a2, (fft_tab_vfp - 8)
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T ldr pc, [a2, ip, lsl #2]
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T endfunc
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T const fft_tab_vfp
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.word fft4_vfp
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.word fft8_vfp
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.word X(ff_fft16_vfp) @ this one alone is exported
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.word fft32_vfp
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.word fft64_vfp
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.word fft128_vfp
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.word fft256_vfp
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.word fft512_vfp
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.word fft1024_vfp
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.word fft2048_vfp
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.word fft4096_vfp
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.word fft8192_vfp
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.word fft16384_vfp
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.word fft32768_vfp
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.word fft65536_vfp
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A endfunc
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function fft4_vfp
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vldr d0, [a1, #0*2*4] @ s0,s1 = z[0]
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@ -131,18 +162,22 @@ endfunc
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vstr d9, [a1, #3 * 2*4]
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.endm
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function .Lfft8_internal_vfp
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macro_fft8_head
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macro_fft8_tail
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bx lr
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endfunc
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function fft8_vfp
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ldr a3, =0x03030000 @ RunFast mode, vector length 4, stride 1
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fmrx a2, FPSCR
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fmxr FPSCR, a3
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vpush {s16-s31}
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macro_fft8_head
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macro_fft8_tail
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mov ip, lr
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bl .Lfft8_internal_vfp
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vpop {s16-s31}
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fmxr FPSCR, a2
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bx lr
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bx ip
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endfunc
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.align 3
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@ -153,12 +188,7 @@ cos1pi8: @ cos(1*pi/8) = sqrt(2+sqrt(2))/2
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cos3pi8: @ cos(2*pi/8) = sqrt(2-sqrt(2))/2
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.float 0.3826834261417388916015625
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function ff_fft16_vfp, export=1
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ldr a3, =0x03030000 @ RunFast mode, vector length 4, stride 1
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fmrx a2, FPSCR
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fmxr FPSCR, a3
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vpush {s16-s31}
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function .Lfft16_internal_vfp
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macro_fft8_head
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@ FFT4(z+8)
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vldr d10, [a1, #8 * 2*4]
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@ -292,7 +322,213 @@ function ff_fft16_vfp, export=1
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vstr d8, [a1, #0 * 2*4]
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vstr d9, [a1, #4 * 2*4]
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vpop {s16-s31}
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fmxr FPSCR, a2
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bx lr
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endfunc
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function ff_fft16_vfp, export=1
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ldr a3, =0x03030000 @ RunFast mode, vector length 4, stride 1
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fmrx a2, FPSCR
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fmxr FPSCR, a3
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vpush {s16-s31}
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mov ip, lr
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bl .Lfft16_internal_vfp
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vpop {s16-s31}
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fmxr FPSCR, a2
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bx ip
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endfunc
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.macro pass n, z0, z1, z2, z3
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add v6, v5, #4*2*\n
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@ TRANSFORM_ZERO(z[0],z[o1],z[o2],z[o3])
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@ TRANSFORM(z[1],z[o1+1],z[o2+1],z[o3+1],wre[1],wim[-1])
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@ TRANSFORM(z[0],z[o1],z[o2],z[o3],wre[0],wim[0])
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@ TRANSFORM(z[1],z[o1+1],z[o2+1],z[o3+1],wre[1],wim[-1])
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vldr d8, [\z2, #8*(o2+1)] @ s16,s17
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vldmdb v6!, {s2}
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vldr d9, [\z3, #8*(o3+1)] @ s18,s19
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vldmia v5!, {s0,s1} @ s0 is unused
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vldr s7, [\z2, #8*o2] @ t1
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vmul.f s20, s16, s2 @ vector * scalar
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vldr s0, [\z3, #8*o3] @ t5
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vldr s6, [\z2, #8*o2+4] @ t2
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vldr s3, [\z3, #8*o3+4] @ t6
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vmul.f s16, s16, s1 @ vector * scalar
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ldr a4, =\n-1
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1: add \z0, \z0, #8*2
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.if \n*4*2 >= 512
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add \z1, \z1, #8*2
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.endif
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.if \n*4*2 >= 256
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add \z2, \z2, #8*2
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.endif
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.if \n*4*2 >= 512
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add \z3, \z3, #8*2
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.endif
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@ up to 2 stalls (VFP vector issuing / waiting for s0)
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@ depending upon whether this is the first iteration and
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@ how many add instructions are inserted above
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vadd.f s4, s0, s7 @ t5
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vadd.f s5, s6, s3 @ t6
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vsub.f s6, s6, s3 @ t4
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vsub.f s7, s0, s7 @ t3
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vldr d6, [\z0, #8*0-8*2] @ s12,s13
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vadd.f s0, s16, s21 @ t1
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vldr d7, [\z1, #8*o1-8*2] @ s14,s15
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vsub.f s1, s18, s23 @ t5
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vadd.f s8, s4, s12 @ vector + vector
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@ stall (VFP vector issuing)
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@ stall (VFP vector issuing)
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@ stall (VFP vector issuing)
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vsub.f s4, s12, s4
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vsub.f s5, s13, s5
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vsub.f s6, s14, s6
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vsub.f s7, s15, s7
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vsub.f s2, s17, s20 @ t2
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vadd.f s3, s19, s22 @ t6
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vstr d4, [\z0, #8*0-8*2] @ s8,s9
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vstr d5, [\z1, #8*o1-8*2] @ s10,s11
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@ stall (waiting for s5)
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vstr d2, [\z2, #8*o2-8*2] @ s4,s5
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vadd.f s4, s1, s0 @ t5
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vstr d3, [\z3, #8*o3-8*2] @ s6,s7
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vsub.f s7, s1, s0 @ t3
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vadd.f s5, s2, s3 @ t6
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vsub.f s6, s2, s3 @ t4
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vldr d6, [\z0, #8*1-8*2] @ s12,s13
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vldr d7, [\z1, #8*(o1+1)-8*2] @ s14,s15
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vldr d4, [\z2, #8*o2] @ s8,s9
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vldmdb v6!, {s2,s3}
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vldr d5, [\z3, #8*o3] @ s10,s11
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vadd.f s20, s4, s12 @ vector + vector
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vldmia v5!, {s0,s1}
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vldr d8, [\z2, #8*(o2+1)] @ s16,s17
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@ stall (VFP vector issuing)
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vsub.f s4, s12, s4
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vsub.f s5, s13, s5
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vsub.f s6, s14, s6
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vsub.f s7, s15, s7
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vmul.f s12, s8, s3 @ vector * scalar
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vstr d10, [\z0, #8*1-8*2] @ s20,s21
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vldr d9, [\z3, #8*(o3+1)] @ s18,s19
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vstr d11, [\z1, #8*(o1+1)-8*2] @ s22,s23
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vmul.f s8, s8, s0 @ vector * scalar
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vstr d2, [\z2, #8*(o2+1)-8*2] @ s4,s5
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@ stall (waiting for s7)
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vstr d3, [\z3, #8*(o3+1)-8*2] @ s6,s7
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vmul.f s20, s16, s2 @ vector * scalar
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@ stall (VFP vector issuing)
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@ stall (VFP vector issuing)
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@ stall (VFP vector issuing)
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vadd.f s7, s8, s13 @ t1
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vsub.f s6, s9, s12 @ t2
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vsub.f s0, s10, s15 @ t5
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vadd.f s3, s11, s14 @ t6
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vmul.f s16, s16, s1 @ vector * scalar
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subs a4, a4, #1
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bne 1b
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@ What remains is identical to the first two indentations of
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@ the above, but without the increment of z
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vadd.f s4, s0, s7 @ t5
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vadd.f s5, s6, s3 @ t6
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vsub.f s6, s6, s3 @ t4
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vsub.f s7, s0, s7 @ t3
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vldr d6, [\z0, #8*0] @ s12,s13
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vadd.f s0, s16, s21 @ t1
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vldr d7, [\z1, #8*o1] @ s14,s15
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vsub.f s1, s18, s23 @ t5
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vadd.f s8, s4, s12 @ vector + vector
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vsub.f s4, s12, s4
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vsub.f s5, s13, s5
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vsub.f s6, s14, s6
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vsub.f s7, s15, s7
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vsub.f s2, s17, s20 @ t2
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vadd.f s3, s19, s22 @ t6
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vstr d4, [\z0, #8*0] @ s8,s9
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vstr d5, [\z1, #8*o1] @ s10,s11
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vstr d2, [\z2, #8*o2] @ s4,s5
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vadd.f s4, s1, s0 @ t5
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vstr d3, [\z3, #8*o3] @ s6,s7
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vsub.f s7, s1, s0 @ t3
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vadd.f s5, s2, s3 @ t6
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vsub.f s6, s2, s3 @ t4
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vldr d6, [\z0, #8*1] @ s12,s13
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vldr d7, [\z1, #8*(o1+1)] @ s14,s15
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vadd.f s20, s4, s12 @ vector + vector
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vsub.f s4, s12, s4
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vsub.f s5, s13, s5
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vsub.f s6, s14, s6
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vsub.f s7, s15, s7
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vstr d10, [\z0, #8*1] @ s20,s21
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vstr d11, [\z1, #8*(o1+1)] @ s22,s23
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vstr d2, [\z2, #8*(o2+1)] @ s4,s5
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vstr d3, [\z3, #8*(o3+1)] @ s6,s7
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.endm
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.macro def_fft n, n2, n4
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function .Lfft\n\()_internal_vfp
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.if \n >= 512
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push {v1-v6,lr}
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.elseif \n >= 256
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push {v1-v2,v5-v6,lr}
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.else
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push {v1,v5-v6,lr}
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.endif
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mov v1, a1
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bl .Lfft\n2\()_internal_vfp
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add a1, v1, #8*(\n/4)*2
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bl .Lfft\n4\()_internal_vfp
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movrelx v5, X(ff_cos_\n), a1
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add a1, v1, #8*(\n/4)*3
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bl .Lfft\n4\()_internal_vfp
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.if \n >= 512
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.set o1, 0*(\n/4/2)
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.set o2, 0*(\n/4/2)
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.set o3, 0*(\n/4/2)
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add v2, v1, #8*2*(\n/4/2)
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add v3, v1, #8*4*(\n/4/2)
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add v4, v1, #8*6*(\n/4/2)
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pass (\n/4/2), v1, v2, v3, v4
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pop {v1-v6,pc}
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.elseif \n >= 256
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.set o1, 2*(\n/4/2)
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.set o2, 0*(\n/4/2)
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.set o3, 2*(\n/4/2)
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add v2, v1, #8*4*(\n/4/2)
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pass (\n/4/2), v1, v1, v2, v2
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pop {v1-v2,v5-v6,pc}
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.else
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.set o1, 2*(\n/4/2)
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.set o2, 4*(\n/4/2)
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.set o3, 6*(\n/4/2)
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pass (\n/4/2), v1, v1, v1, v1
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pop {v1,v5-v6,pc}
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.endif
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endfunc
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function fft\n\()_vfp
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ldr a3, =0x03030000 /* RunFast mode, vector length 4, stride 1 */
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fmrx a2, FPSCR
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fmxr FPSCR, a3
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vpush {s16-s31}
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mov ip, lr
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bl .Lfft\n\()_internal_vfp
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vpop {s16-s31}
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fmxr FPSCR, a2
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bx ip
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endfunc
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.ltorg
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.endm
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def_fft 32, 16, 8
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def_fft 64, 32, 16
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def_fft 128, 64, 32
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def_fft 256, 128, 64
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def_fft 512, 256, 128
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def_fft 1024, 512, 256
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def_fft 2048, 1024, 512
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def_fft 4096, 2048, 1024
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def_fft 8192, 4096, 2048
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def_fft 16384, 8192, 4096
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def_fft 32768, 16384, 8192
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def_fft 65536, 32768, 16384
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