mirror of https://git.ffmpeg.org/ffmpeg.git
lavc/vc1dsp: match C block layout in inv_trans_4x8_rvv
Although checkasm does not verify this, the decoder requires that the transform updates the input block exactly like the C code does. This fixes vc1-ism, vc1_ilaced_twomv, vc1_sa00040, vc1_sa10091, vc1_sa10143, vc1_sa20021, vc1test_smm0005 and wmv3-drm-dec tests.
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@ -303,15 +303,24 @@ func ff_vc1_inv_trans_4x8_rvv, zve32x
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vlsseg4e16.v v0, (a2), a3
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li t1, 3
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jal t0, ff_vc1_inv_trans_4_rvv
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addi t1, a2, 1 * 8 * 2
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vse16.v v0, (a2)
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addi t2, a2, 2 * 8 * 2
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vse16.v v1, (t1)
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addi t3, a2, 3 * 8 * 2
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vse16.v v2, (t2)
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vse16.v v3, (t3)
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vssseg4e16.v v0, (a2), a3
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vsetivli zero, 4, e16, mf2, ta, ma
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vlseg8e16.v v0, (a2)
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addi t1, a2, 1 * 8 * 2
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vle16.v v0, (a2)
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addi t2, a2, 2 * 8 * 2
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vle16.v v1, (t1)
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addi t3, a2, 3 * 8 * 2
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vle16.v v2, (t2)
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addi t4, a2, 4 * 8 * 2
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vle16.v v3, (t3)
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addi t5, a2, 5 * 8 * 2
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vle16.v v4, (t4)
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addi t6, a2, 6 * 8 * 2
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vle16.v v5, (t5)
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addi t1, a2, 7 * 8 * 2
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vle16.v v6, (t6)
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vle16.v v7, (t1)
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jal t0, ff_vc1_inv_trans_8_rvv
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vadd.vi v4, v4, 1
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add t0, a1, a0
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