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https://git.ffmpeg.org/ffmpeg.git
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avcodec/nvenc: CUDA frames support
Signed-off-by: Timo Rothenpieler <timo@rothenpieler.org>
This commit is contained in:
Andrey Turkin
Timo Rothenpieler
parent
cfb49fc6f7
commit
a8cf25dd92
@ -33,16 +33,31 @@
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#include "libavutil/avassert.h"
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#include "libavutil/opt.h"
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#include "libavutil/mem.h"
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#include "libavutil/hwcontext.h"
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#include "avcodec.h"
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#include "internal.h"
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#include "thread.h"
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#if CONFIG_CUDA
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#include <cuda.h>
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#include "libavutil/hwcontext_cuda.h"
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#else
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#if defined(_WIN32)
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#define CUDAAPI __stdcall
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#else
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#define CUDAAPI
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#endif
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typedef enum cudaError_enum {
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CUDA_SUCCESS = 0
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} CUresult;
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typedef int CUdevice;
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typedef void* CUcontext;
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typedef void* CUdeviceptr;
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#endif
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#if defined(_WIN32)
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#define LOAD_FUNC(l, s) GetProcAddress(l, s)
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#define DL_CLOSE_FUNC(l) FreeLibrary(l)
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@ -51,12 +66,6 @@
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#define DL_CLOSE_FUNC(l) dlclose(l)
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#endif
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typedef enum cudaError_enum {
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CUDA_SUCCESS = 0
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} CUresult;
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typedef int CUdevice;
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typedef void* CUcontext;
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typedef CUresult(CUDAAPI *PCUINIT)(unsigned int Flags);
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typedef CUresult(CUDAAPI *PCUDEVICEGETCOUNT)(int *count);
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typedef CUresult(CUDAAPI *PCUDEVICEGET)(CUdevice *device, int ordinal);
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@ -68,9 +77,13 @@ typedef CUresult(CUDAAPI *PCUCTXDESTROY)(CUcontext ctx);
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typedef NVENCSTATUS (NVENCAPI* PNVENCODEAPICREATEINSTANCE)(NV_ENCODE_API_FUNCTION_LIST *functionList);
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#define MAX_REGISTERED_FRAMES 64
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typedef struct NvencSurface
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{
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NV_ENC_INPUT_PTR input_surface;
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AVFrame *in_ref;
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NV_ENC_MAP_INPUT_RESOURCE in_map;
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int reg_idx;
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int width;
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int height;
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@ -105,11 +118,16 @@ typedef struct NvencDynLoadFunctions
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int nvenc_device_count;
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CUdevice nvenc_devices[16];
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#if !CONFIG_CUDA
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#if defined(_WIN32)
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HMODULE cuda_lib;
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HMODULE nvenc_lib;
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#else
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void* cuda_lib;
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#endif
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#endif
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#if defined(_WIN32)
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HMODULE nvenc_lib;
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#else
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void* nvenc_lib;
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#endif
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} NvencDynLoadFunctions;
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@ -129,6 +147,7 @@ typedef struct NvencContext
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NV_ENC_INITIALIZE_PARAMS init_encode_params;
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NV_ENC_CONFIG encode_config;
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CUcontext cu_context;
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CUcontext cu_context_internal;
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int max_surface_count;
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NvencSurface *surfaces;
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@ -138,6 +157,17 @@ typedef struct NvencContext
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AVFifoBuffer *timestamp_list;
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int64_t last_dts;
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struct {
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CUdeviceptr ptr;
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NV_ENC_REGISTERED_PTR regptr;
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int mapped;
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} registered_frames[MAX_REGISTERED_FRAMES];
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int nb_registered_frames;
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/* the actual data pixel format, different from
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* AVCodecContext.pix_fmt when using hwaccel frames on input */
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enum AVPixelFormat data_pix_fmt;
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void *nvencoder;
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char *preset;
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@ -299,6 +329,18 @@ static av_cold int nvenc_dyload_cuda(AVCodecContext *avctx)
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NvencContext *ctx = avctx->priv_data;
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NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
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#if CONFIG_CUDA
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dl_fn->cu_init = cuInit;
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dl_fn->cu_device_get_count = cuDeviceGetCount;
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dl_fn->cu_device_get = cuDeviceGet;
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dl_fn->cu_device_get_name = cuDeviceGetName;
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dl_fn->cu_device_compute_capability = cuDeviceComputeCapability;
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dl_fn->cu_ctx_create = cuCtxCreate_v2;
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dl_fn->cu_ctx_pop_current = cuCtxPopCurrent_v2;
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dl_fn->cu_ctx_destroy = cuCtxDestroy_v2;
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return 1;
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#else
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if (dl_fn->cuda_lib)
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return 1;
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@ -332,6 +374,7 @@ error:
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dl_fn->cuda_lib = NULL;
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return 0;
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#endif
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}
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static av_cold int check_cuda_errors(AVCodecContext *avctx, CUresult err, const char *func)
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@ -357,7 +400,7 @@ static av_cold int nvenc_check_cuda(AVCodecContext *avctx)
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switch (avctx->codec->id) {
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case AV_CODEC_ID_H264:
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target_smver = avctx->pix_fmt == AV_PIX_FMT_YUV444P ? 0x52 : 0x30;
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target_smver = ctx->data_pix_fmt == AV_PIX_FMT_YUV444P ? 0x52 : 0x30;
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break;
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case AV_CODEC_ID_H265:
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target_smver = 0x52;
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@ -481,8 +524,10 @@ static av_cold void nvenc_unload_nvenc(AVCodecContext *avctx)
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dl_fn->nvenc_device_count = 0;
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#if !CONFIG_CUDA
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DL_CLOSE_FUNC(dl_fn->cuda_lib);
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dl_fn->cuda_lib = NULL;
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#endif
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dl_fn->cu_init = NULL;
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dl_fn->cu_device_get_count = NULL;
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@ -504,13 +549,33 @@ static av_cold int nvenc_setup_device(AVCodecContext *avctx)
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CUresult cu_res;
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CUcontext cu_context_curr;
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ctx->data_pix_fmt = avctx->pix_fmt;
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#if CONFIG_CUDA
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
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AVHWFramesContext *frames_ctx;
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AVCUDADeviceContext *device_hwctx;
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if (!avctx->hw_frames_ctx) {
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av_log(avctx, AV_LOG_ERROR, "hw_frames_ctx must be set when using GPU frames as input\n");
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return AVERROR(EINVAL);
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}
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frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
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device_hwctx = frames_ctx->device_ctx->hwctx;
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ctx->cu_context = device_hwctx->cuda_ctx;
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ctx->data_pix_fmt = frames_ctx->sw_format;
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return 0;
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}
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#endif
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if (ctx->gpu >= dl_fn->nvenc_device_count) {
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av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->gpu, dl_fn->nvenc_device_count);
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return AVERROR(EINVAL);
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}
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ctx->cu_context = NULL;
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cu_res = dl_fn->cu_ctx_create(&ctx->cu_context, 4, dl_fn->nvenc_devices[ctx->gpu]); // CU_CTX_SCHED_BLOCKING_SYNC=4, avoid CPU spins
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cu_res = dl_fn->cu_ctx_create(&ctx->cu_context_internal, 4, dl_fn->nvenc_devices[ctx->gpu]); // CU_CTX_SCHED_BLOCKING_SYNC=4, avoid CPU spins
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if (cu_res != CUDA_SUCCESS) {
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av_log(avctx, AV_LOG_FATAL, "Failed creating CUDA context for NVENC: 0x%x\n", (int)cu_res);
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@ -524,6 +589,8 @@ static av_cold int nvenc_setup_device(AVCodecContext *avctx)
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return AVERROR_EXTERNAL;
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}
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ctx->cu_context = ctx->cu_context_internal;
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return 0;
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}
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@ -688,7 +755,7 @@ static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx, int lossless)
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ctx->encode_config.encodeCodecConfig.h264Config.h264VUIParameters.colourPrimaries = avctx->color_primaries;
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ctx->encode_config.encodeCodecConfig.h264Config.h264VUIParameters.transferCharacteristics = avctx->color_trc;
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ctx->encode_config.encodeCodecConfig.h264Config.h264VUIParameters.videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
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|| avctx->pix_fmt == AV_PIX_FMT_YUVJ420P || avctx->pix_fmt == AV_PIX_FMT_YUVJ422P || avctx->pix_fmt == AV_PIX_FMT_YUVJ444P);
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|| ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
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ctx->encode_config.encodeCodecConfig.h264Config.h264VUIParameters.colourDescriptionPresentFlag =
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(avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
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@ -746,7 +813,7 @@ static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx, int lossless)
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}
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// force setting profile as high444p if input is AV_PIX_FMT_YUV444P
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if (avctx->pix_fmt == AV_PIX_FMT_YUV444P) {
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if (ctx->data_pix_fmt == AV_PIX_FMT_YUV444P) {
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ctx->encode_config.profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
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avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
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}
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@ -776,7 +843,7 @@ static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
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ctx->encode_config.encodeCodecConfig.hevcConfig.hevcVUIParameters.colourPrimaries = avctx->color_primaries;
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ctx->encode_config.encodeCodecConfig.hevcConfig.hevcVUIParameters.transferCharacteristics = avctx->color_trc;
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ctx->encode_config.encodeCodecConfig.hevcConfig.hevcVUIParameters.videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
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|| avctx->pix_fmt == AV_PIX_FMT_YUVJ420P || avctx->pix_fmt == AV_PIX_FMT_YUVJ422P || avctx->pix_fmt == AV_PIX_FMT_YUVJ444P);
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|| ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
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ctx->encode_config.encodeCodecConfig.hevcConfig.hevcVUIParameters.colourDescriptionPresentFlag =
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(avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
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@ -1054,28 +1121,20 @@ static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
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NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
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NVENCSTATUS nv_status;
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NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
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NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
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allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
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allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
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allocSurf.width = (avctx->width + 31) & ~31;
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allocSurf.height = (avctx->height + 31) & ~31;
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allocSurf.memoryHeap = NV_ENC_MEMORY_HEAP_SYSMEM_CACHED;
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switch (avctx->pix_fmt) {
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switch (ctx->data_pix_fmt) {
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case AV_PIX_FMT_YUV420P:
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allocSurf.bufferFmt = NV_ENC_BUFFER_FORMAT_YV12_PL;
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ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_YV12_PL;
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break;
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case AV_PIX_FMT_NV12:
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allocSurf.bufferFmt = NV_ENC_BUFFER_FORMAT_NV12_PL;
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ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_NV12_PL;
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break;
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case AV_PIX_FMT_YUV444P:
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allocSurf.bufferFmt = NV_ENC_BUFFER_FORMAT_YUV444_PL;
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ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_YUV444_PL;
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break;
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default:
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@ -1083,16 +1142,29 @@ static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
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return AVERROR(EINVAL);
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}
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nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
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if (nv_status != NV_ENC_SUCCESS) {
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return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
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ctx->surfaces[idx].in_ref = av_frame_alloc();
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if (!ctx->surfaces[idx].in_ref)
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return AVERROR(ENOMEM);
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} else {
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NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
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allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
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allocSurf.width = (avctx->width + 31) & ~31;
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allocSurf.height = (avctx->height + 31) & ~31;
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allocSurf.memoryHeap = NV_ENC_MEMORY_HEAP_SYSMEM_CACHED;
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allocSurf.bufferFmt = ctx->surfaces[idx].format;
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nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
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if (nv_status != NV_ENC_SUCCESS) {
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return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
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}
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ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
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ctx->surfaces[idx].width = allocSurf.width;
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ctx->surfaces[idx].height = allocSurf.height;
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}
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ctx->surfaces[idx].lockCount = 0;
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ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
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ctx->surfaces[idx].format = allocSurf.bufferFmt;
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ctx->surfaces[idx].width = allocSurf.width;
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ctx->surfaces[idx].height = allocSurf.height;
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/* 1MB is large enough to hold most output frames. NVENC increases this automaticaly if it's not enough. */
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allocOut.size = 1024 * 1024;
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@ -1102,7 +1174,9 @@ static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
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nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
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if (nv_status != NV_ENC_SUCCESS) {
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int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
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p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
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if (avctx->pix_fmt != AV_PIX_FMT_CUDA)
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p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
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av_frame_free(&ctx->surfaces[idx].in_ref);
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return err;
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}
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@ -1218,22 +1292,23 @@ error:
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av_fifo_freep(&ctx->output_surface_queue);
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for (i = 0; i < surfaceCount; ++i) {
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p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
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if (avctx->pix_fmt != AV_PIX_FMT_CUDA)
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p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
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av_frame_free(&ctx->surfaces[i].in_ref);
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p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
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}
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av_freep(&ctx->surfaces);
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if (ctx->nvencoder)
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p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
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ctx->nvencoder = NULL;
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if (ctx->cu_context)
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dl_fn->cu_ctx_destroy(ctx->cu_context);
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if (ctx->cu_context_internal)
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dl_fn->cu_ctx_destroy(ctx->cu_context_internal);
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ctx->cu_context = ctx->cu_context_internal = NULL;
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nvenc_unload_nvenc(avctx);
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ctx->nvencoder = NULL;
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ctx->cu_context = NULL;
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return res;
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}
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@ -1248,8 +1323,23 @@ static av_cold int nvenc_encode_close(AVCodecContext *avctx)
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av_fifo_freep(&ctx->output_surface_ready_queue);
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av_fifo_freep(&ctx->output_surface_queue);
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
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for (i = 0; i < ctx->max_surface_count; ++i) {
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if (ctx->surfaces[i].input_surface) {
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p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->surfaces[i].in_map.mappedResource);
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}
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}
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for (i = 0; i < ctx->nb_registered_frames; i++) {
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if (ctx->registered_frames[i].regptr)
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p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
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}
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ctx->nb_registered_frames = 0;
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}
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for (i = 0; i < ctx->max_surface_count; ++i) {
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p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
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if (avctx->pix_fmt != AV_PIX_FMT_CUDA)
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p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
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av_frame_free(&ctx->surfaces[i].in_ref);
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p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
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}
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av_freep(&ctx->surfaces);
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@ -1258,8 +1348,9 @@ static av_cold int nvenc_encode_close(AVCodecContext *avctx)
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p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
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ctx->nvencoder = NULL;
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dl_fn->cu_ctx_destroy(ctx->cu_context);
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ctx->cu_context = NULL;
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if (ctx->cu_context_internal)
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dl_fn->cu_ctx_destroy(ctx->cu_context_internal);
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ctx->cu_context = ctx->cu_context_internal = NULL;
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nvenc_unload_nvenc(avctx);
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@ -1286,7 +1377,7 @@ static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *inSurf,
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uint8_t *buf = lockBufferParams->bufferDataPtr;
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int off = inSurf->height * lockBufferParams->pitch;
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if (avctx->pix_fmt == AV_PIX_FMT_YUV420P) {
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if (frame->format == AV_PIX_FMT_YUV420P) {
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av_image_copy_plane(buf, lockBufferParams->pitch,
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frame->data[0], frame->linesize[0],
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avctx->width, avctx->height);
|
||||
@ -1302,7 +1393,7 @@ static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *inSurf,
|
||||
av_image_copy_plane(buf, lockBufferParams->pitch >> 1,
|
||||
frame->data[1], frame->linesize[1],
|
||||
avctx->width >> 1, avctx->height >> 1);
|
||||
} else if (avctx->pix_fmt == AV_PIX_FMT_NV12) {
|
||||
} else if (frame->format == AV_PIX_FMT_NV12) {
|
||||
av_image_copy_plane(buf, lockBufferParams->pitch,
|
||||
frame->data[0], frame->linesize[0],
|
||||
avctx->width, avctx->height);
|
||||
@ -1312,7 +1403,7 @@ static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *inSurf,
|
||||
av_image_copy_plane(buf, lockBufferParams->pitch,
|
||||
frame->data[1], frame->linesize[1],
|
||||
avctx->width, avctx->height >> 1);
|
||||
} else if (avctx->pix_fmt == AV_PIX_FMT_YUV444P) {
|
||||
} else if (frame->format == AV_PIX_FMT_YUV444P) {
|
||||
av_image_copy_plane(buf, lockBufferParams->pitch,
|
||||
frame->data[0], frame->linesize[0],
|
||||
avctx->width, avctx->height);
|
||||
@ -1336,6 +1427,71 @@ static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *inSurf,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
|
||||
{
|
||||
NvencContext *ctx = avctx->priv_data;
|
||||
NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
|
||||
NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
|
||||
|
||||
int i;
|
||||
|
||||
if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
|
||||
for (i = 0; i < ctx->nb_registered_frames; i++) {
|
||||
if (!ctx->registered_frames[i].mapped) {
|
||||
if (ctx->registered_frames[i].regptr) {
|
||||
p_nvenc->nvEncUnregisterResource(ctx->nvencoder,
|
||||
ctx->registered_frames[i].regptr);
|
||||
ctx->registered_frames[i].regptr = NULL;
|
||||
}
|
||||
return i;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
return ctx->nb_registered_frames++;
|
||||
}
|
||||
|
||||
av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
|
||||
return AVERROR(ENOMEM);
|
||||
}
|
||||
|
||||
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
|
||||
{
|
||||
NvencContext *ctx = avctx->priv_data;
|
||||
NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
|
||||
NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
|
||||
|
||||
AVHWFramesContext *frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
|
||||
NV_ENC_REGISTER_RESOURCE reg;
|
||||
int i, idx, ret;
|
||||
|
||||
for (i = 0; i < ctx->nb_registered_frames; i++) {
|
||||
if (ctx->registered_frames[i].ptr == (CUdeviceptr)frame->data[0])
|
||||
return i;
|
||||
}
|
||||
|
||||
idx = nvenc_find_free_reg_resource(avctx);
|
||||
if (idx < 0)
|
||||
return idx;
|
||||
|
||||
reg.version = NV_ENC_REGISTER_RESOURCE_VER;
|
||||
reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
|
||||
reg.width = frames_ctx->width;
|
||||
reg.height = frames_ctx->height;
|
||||
reg.bufferFormat = ctx->surfaces[0].format;
|
||||
reg.pitch = frame->linesize[0];
|
||||
reg.resourceToRegister = frame->data[0];
|
||||
|
||||
ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, ®);
|
||||
if (ret != NV_ENC_SUCCESS) {
|
||||
nvenc_print_error(avctx, ret, "Error registering an input resource");
|
||||
return AVERROR_UNKNOWN;
|
||||
}
|
||||
|
||||
ctx->registered_frames[idx].ptr = (CUdeviceptr)frame->data[0];
|
||||
ctx->registered_frames[idx].regptr = reg.registeredResource;
|
||||
return idx;
|
||||
}
|
||||
|
||||
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
|
||||
NvencSurface *nvenc_frame)
|
||||
{
|
||||
@ -1345,24 +1501,50 @@ static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
|
||||
|
||||
int res;
|
||||
NVENCSTATUS nv_status;
|
||||
NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
|
||||
|
||||
lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
|
||||
lockBufferParams.inputBuffer = nvenc_frame->input_surface;
|
||||
if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
|
||||
int reg_idx = nvenc_register_frame(avctx, frame);
|
||||
if (reg_idx < 0) {
|
||||
av_log(avctx, AV_LOG_ERROR, "Could not register an input CUDA frame\n");
|
||||
return reg_idx;
|
||||
}
|
||||
|
||||
nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
|
||||
if (nv_status != NV_ENC_SUCCESS) {
|
||||
return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
|
||||
res = av_frame_ref(nvenc_frame->in_ref, frame);
|
||||
if (res < 0)
|
||||
return res;
|
||||
|
||||
nvenc_frame->in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
|
||||
nvenc_frame->in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
|
||||
nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &nvenc_frame->in_map);
|
||||
if (nv_status != NV_ENC_SUCCESS) {
|
||||
av_frame_unref(nvenc_frame->in_ref);
|
||||
return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
|
||||
}
|
||||
|
||||
ctx->registered_frames[reg_idx].mapped = 1;
|
||||
nvenc_frame->reg_idx = reg_idx;
|
||||
nvenc_frame->input_surface = nvenc_frame->in_map.mappedResource;
|
||||
return 0;
|
||||
} else {
|
||||
NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
|
||||
|
||||
lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
|
||||
lockBufferParams.inputBuffer = nvenc_frame->input_surface;
|
||||
|
||||
nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
|
||||
if (nv_status != NV_ENC_SUCCESS) {
|
||||
return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
|
||||
}
|
||||
|
||||
res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
|
||||
|
||||
nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
|
||||
if (nv_status != NV_ENC_SUCCESS) {
|
||||
return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
|
||||
|
||||
nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
|
||||
if (nv_status != NV_ENC_SUCCESS) {
|
||||
return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx,
|
||||
@ -1436,6 +1618,15 @@ static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSur
|
||||
if (nv_status != NV_ENC_SUCCESS)
|
||||
nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
|
||||
|
||||
|
||||
if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
|
||||
p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, tmpoutsurf->in_map.mappedResource);
|
||||
av_frame_unref(tmpoutsurf->in_ref);
|
||||
ctx->registered_frames[tmpoutsurf->reg_idx].mapped = 0;
|
||||
|
||||
tmpoutsurf->input_surface = NULL;
|
||||
}
|
||||
|
||||
switch (lock_params.pictureType) {
|
||||
case NV_ENC_PIC_TYPE_IDR:
|
||||
pkt->flags |= AV_PKT_FLAG_KEY;
|
||||
@ -1597,6 +1788,9 @@ static const enum AVPixelFormat pix_fmts_nvenc[] = {
|
||||
AV_PIX_FMT_YUV420P,
|
||||
AV_PIX_FMT_NV12,
|
||||
AV_PIX_FMT_YUV444P,
|
||||
#if CONFIG_CUDA
|
||||
AV_PIX_FMT_CUDA,
|
||||
#endif
|
||||
AV_PIX_FMT_NONE
|
||||
};
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user